ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 1.
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                              1 ;MIT License
                              2 
                              3 ;Copyright (c) 2021 Fedora Adventures Pixeltronics
                              4 
                              5 ;Permission is hereby granted, free of charge, to any person obtaining a copy
                              6 ;of this software and associated documentation files (the "Software"), to deal
                              7 ;in the Software without restriction, including without limitation the rights
                              8 ;to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
                              9 ;copies of the Software, and to permit persons to whom the Software is
                             10 ;furnished to do so, subject to the following conditions:
                             11 
                             12 ;The above copyright notice and this permission notice shall be included in all
                             13 ;copies or substantial portions of the Software.
                             14 
                             15 ;THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
                             16 ;IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
                             17 ;FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
                             18 ;AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
                             19 ;LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
                             20 ;OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
                             21 ;SOFTWARE.
                             22 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 2.
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                             23 .include "levels.h.s"
                              1 ;MIT License
                              2 
                              3 ;Copyright (c) 2021 Fedora Adventures Pixeltronics
                              4 
                              5 ;Permission is hereby granted, free of charge, to any person obtaining a copy
                              6 ;of this software and associated documentation files (the "Software"), to deal
                              7 ;in the Software without restriction, including without limitation the rights
                              8 ;to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
                              9 ;copies of the Software, and to permit persons to whom the Software is
                             10 ;furnished to do so, subject to the following conditions:
                             11 
                             12 ;The above copyright notice and this permission notice shall be included in all
                             13 ;copies or substantial portions of the Software.
                             14 
                             15 ;THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
                             16 ;IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
                             17 ;FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
                             18 ;AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
                             19 ;LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
                             20 ;OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
                             21 ;SOFTWARE.
                             22 
                             23 .globl man_levels_load_level_1
                             24 .globl man_levels_load_level_2
                             25 .globl man_levels_load_level_3
                             26 .globl man_levels_load_level_4
                             27 .globl man_levels_load_level_5
                             28 .globl man_levels_load_level_6
                             29 .globl man_levels_load_level_7
                             30 .globl man_levels_get_level
                             31 .globl man_levels_reload_level
                             32 .globl man_levels_load_next_level
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 3.
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                             24 .include "entity.h.s"
                              1 ;MIT License
                              2 
                              3 ;Copyright (c) 2021 Fedora Adventures Pixeltronics
                              4 
                              5 ;Permission is hereby granted, free of charge, to any person obtaining a copy
                              6 ;of this software and associated documentation files (the "Software"), to deal
                              7 ;in the Software without restriction, including without limitation the rights
                              8 ;to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
                              9 ;copies of the Software, and to permit persons to whom the Software is
                             10 ;furnished to do so, subject to the following conditions:
                             11 
                             12 ;The above copyright notice and this permission notice shall be included in all
                             13 ;copies or substantial portions of the Software.
                             14 
                             15 ;THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
                             16 ;IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
                             17 ;FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
                             18 ;AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
                             19 ;LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
                             20 ;OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
                             21 ;SOFTWARE.
                             22 ;;archivo de cabecera para hacer include de las funciones
                             23 ;;
                             24 .globl _fedora_sprites_00
                             25 .globl _fedora_sprites_01
                             26 
                     0011    27 entity_size = 17
                     001E    28 max_entities = 30
                             29 ;;Constantes para definir en que byte está cada dato
                             30 ;; Nuestros datos de cada entidad son:
                             31 ;; Com
                     0000    32 e_cmps = 0
                     0001    33 e_cmps_physics = 1
                     0002    34 e_h = 2
                     0003    35 e_w = 3
                     0004    36 e_vx = 4
                     0005    37 e_vy = 5
                     0006    38 e_altura_salto = 6
                     0007    39 e_maxy = 7
                             40 ;e_color = 10
                     0008    41 e_ptr_sprite = 8 ;; esto usa 2 bytes
                     000A    42 e_prev_ptr = 10  ;; puntero 2 bytes
                     000C    43 e_movimiento1 = 12
                     000D    44 e_movimiento2 = 13
                     000E    45 e_movimiento3 = 14
                     000F    46 e_x = 15
                     0010    47 e_y = 16
                             48 
                     0080    49 e_cmps_alive = 0x80
                     0040    50 e_cmps_render = 0x40
                     0020    51 e_cmps_player = 0x20
                     0010    52 e_cmps_door = 0x10
                     0008    53 e_cmps_treasure = 0x08
                     0004    54 e_cmps_platform = 0x04
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 4.
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                             55 
                     0080    56 e_cmps_phy_left = 0x80
                     0040    57 e_cmps_phy_right = 0x40
                     0020    58 e_cmps_phy_jumping = 0x20
                     0010    59 e_cmps_phy_falling = 0x10
                             60 
                             61 
                             62 
                             63 ;;FUNCIONES PUBLICAS
                             64 .globl getEntityInArray
                             65 .globl getNumEntities
                             66 .globl create_entity
                             67 .globl man_entity_put_player_in_ix
                             68 .globl man_entity_put_platforms_in_iy
                             69 .globl man_entity_put_treasure_in_iy
                             70 .globl man_entity_put_door_in_iy
                             71 .globl man_entity_reset
                             72 .globl man_entity_init
                             73 .globl man_map_init
                             74 .globl create_entity_1
                             75 .globl create_entity_2
                             76 ;;CONSTANTES
                             77 .globl entity_size
                             78 .globl max_entities
                             79 .globl e_cmps
                             80 .globl e_cmps_physics
                             81 .globl e_h
                             82 .globl e_w
                             83 .globl e_x
                             84 .globl e_y
                             85 .globl e_vx
                             86 .globl e_vy
                             87 .globl e_altura_salto
                             88 .globl e_maxy
                             89 ;.globl e_color
                             90 .globl e_ptr_sprite
                             91 .globl e_cmps_alive
                             92 .globl e_cmps_render
                             93 .globl e_cmps_phy_left
                             94 .globl e_cmps_phy_right
                             95 .globl e_cmps_phy_jumping
                             96 .globl e_cmps_phy_falling
                             97 .globl e_movimiento1
                             98 .globl e_movimiento2
                             99 .globl e_movimiento3
                            100 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 5.
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                             25 .include "cpct_functions.h.s"
                              1 ;MIT License
                              2 
                              3 ;Copyright (c) 2021 Fedora Adventures Pixeltronics
                              4 
                              5 ;Permission is hereby granted, free of charge, to any person obtaining a copy
                              6 ;of this software and associated documentation files (the "Software"), to deal
                              7 ;in the Software without restriction, including without limitation the rights
                              8 ;to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
                              9 ;copies of the Software, and to permit persons to whom the Software is
                             10 ;furnished to do so, subject to the following conditions:
                             11 
                             12 ;The above copyright notice and this permission notice shall be included in all
                             13 ;copies or substantial portions of the Software.
                             14 
                             15 ;THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
                             16 ;IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
                             17 ;FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
                             18 ;AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
                             19 ;LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
                             20 ;OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
                             21 ;SOFTWARE.
                             22 
                             23 ;;funciones de cpctelera
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 6.
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                             24 .include "cpctelera.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;; All CPCtelera include files
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 7.
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                             20 .include "macros/allmacros.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 8.
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                             19 .include "macros/cpct_maths.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Math Macros
                             21 ;;
                             22 ;;    Useful assembler macros for doing common math operations
                             23 ;;
                             24 
                             25 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             26 ;; Macro: add_REGPAIR_a 
                             27 ;;
                             28 ;;    Performs the operation REGPAIR = REGPAIR + A. REGPAIR is any given pair of 8-bit registers.
                             29 ;;
                             30 ;; ASM Definition:
                             31 ;;    .macro <add_REGPAIR_a> RH, RL
                             32 ;;
                             33 ;; Parameters:
                             34 ;;    RH    - Register 1 of the REGPAIR. Holds higher-byte value
                             35 ;;    RL    - Register 2 of the REGPAIR. Holds lower-byte value
                             36 ;; 
                             37 ;; Input Registers: 
                             38 ;;    RH:RL - 16-value used as left-operand and final storage for the sum
                             39 ;;    A     - Second sum operand
                             40 ;;
                             41 ;; Return Value:
                             42 ;;    RH:RL - Holds the sum of RH:RL + A
                             43 ;;
                             44 ;; Details:
                             45 ;;    This macro performs the sum of RH:RL + A and stores it directly on RH:RL.
                             46 ;; It uses only RH:RL and A to perform the operation.
                             47 ;;
                             48 ;; Modified Registers: 
                             49 ;;    A, RH, RL
                             50 ;;
                             51 ;; Required memory:
                             52 ;;    5 bytes
                             53 ;;
                             54 ;; Time Measures:
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 9.
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                             55 ;; (start code)
                             56 ;;  Case | microSecs(us) | CPU Cycles
                             57 ;; ------------------------------------
                             58 ;;  Any  |       5       |     20
                             59 ;; ------------------------------------
                             60 ;; (end code)
                             61 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             62 .macro add_REGPAIR_a rh, rl
                             63    ;; First Perform RH = E + A
                             64    add rl    ;; [1] A' = RL + A 
                             65    ld  rl, a ;; [1] RL' = A' = RL + A. It might generate Carry that must be added to RH
                             66    
                             67    ;; Then Perform RH = RH + Carry 
                             68    adc rh    ;; [1] A'' = A' + RH + Carry = RL + A + RH + Carry
                             69    sub rl    ;; [1] Remove RL'. A''' = A'' - RL' = RL + A + RH + Carry - (RL + A) = RH + Carry
                             70    ld  rh, a ;; [1] Save into RH (RH' = A''' = RH + Carry)
                             71 .endm
                             72 
                             73 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             74 ;; Macro: add_de_a
                             75 ;;
                             76 ;;    Performs the operation DE = DE + A
                             77 ;;
                             78 ;; ASM Definition:
                             79 ;;    .macro <add_de_a>
                             80 ;;
                             81 ;; Parameters:
                             82 ;;    None
                             83 ;; 
                             84 ;; Input Registers: 
                             85 ;;    DE    - First sum operand and Destination Register
                             86 ;;    A     - Second sum operand
                             87 ;;
                             88 ;; Return Value:
                             89 ;;    DE - Holds the sum of DE + A
                             90 ;;
                             91 ;; Details:
                             92 ;;    This macro performs the sum of DE + A and stores it directly on DE.
                             93 ;; It uses only DE and A to perform the operation.
                             94 ;;    This macro is a direct instantiation of the macro <add_REGPAIR_a>.
                             95 ;;
                             96 ;; Modified Registers: 
                             97 ;;    A, DE
                             98 ;;
                             99 ;; Required memory:
                            100 ;;    5 bytes
                            101 ;;
                            102 ;; Time Measures:
                            103 ;; (start code)
                            104 ;;  Case | microSecs(us) | CPU Cycles
                            105 ;; ------------------------------------
                            106 ;;  Any  |       5       |     20
                            107 ;; ------------------------------------
                            108 ;; (end code)
                            109 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 10.
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                            110 .macro add_de_a
                            111    add_REGPAIR_a  d, e
                            112 .endm
                            113 
                            114 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            115 ;; Macro: add_hl_a
                            116 ;;
                            117 ;;    Performs the operation HL = HL + A
                            118 ;;
                            119 ;; ASM Definition:
                            120 ;;    .macro <add_hl_a>
                            121 ;;
                            122 ;; Parameters:
                            123 ;;    None
                            124 ;; 
                            125 ;; Input Registers: 
                            126 ;;    HL    - First sum operand and Destination Register
                            127 ;;    A     - Second sum operand
                            128 ;;
                            129 ;; Return Value:
                            130 ;;    HL - Holds the sum of HL + A
                            131 ;;
                            132 ;; Details:
                            133 ;;    This macro performs the sum of HL + A and stores it directly on HL.
                            134 ;; It uses only HL and A to perform the operation.
                            135 ;;    This macro is a direct instantiation of the macro <add_REGPAIR_a>.
                            136 ;;
                            137 ;; Modified Registers: 
                            138 ;;    A, HL
                            139 ;;
                            140 ;; Required memory:
                            141 ;;    5 bytes
                            142 ;;
                            143 ;; Time Measures:
                            144 ;; (start code)
                            145 ;;  Case | microSecs(us) | CPU Cycles
                            146 ;; ------------------------------------
                            147 ;;  Any  |       5       |     20
                            148 ;; ------------------------------------
                            149 ;; (end code)
                            150 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            151 .macro add_hl_a
                            152    add_REGPAIR_a  h, l
                            153 .endm
                            154 
                            155 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            156 ;; Macro: add_bc_a
                            157 ;;
                            158 ;;    Performs the operation BC = BC + A
                            159 ;;
                            160 ;; ASM Definition:
                            161 ;;    .macro <add_bc_a>
                            162 ;;
                            163 ;; Parameters:
                            164 ;;    None
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 11.
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                            165 ;; 
                            166 ;; Input Registers: 
                            167 ;;    BC    - First sum operand and Destination Register
                            168 ;;    A     - Second sum operand
                            169 ;;
                            170 ;; Return Value:
                            171 ;;    BC - Holds the sum of BC + A
                            172 ;;
                            173 ;; Details:
                            174 ;;    This macro performs the sum of BC + A and stores it directly on BC.
                            175 ;; It uses only BC and A to perform the operation.
                            176 ;;    This macro is a direct instantiation of the macro <add_REGPAIR_a>.
                            177 ;;
                            178 ;; Modified Registers: 
                            179 ;;    A, BC
                            180 ;;
                            181 ;; Required memory:
                            182 ;;    5 bytes
                            183 ;;
                            184 ;; Time Measures:
                            185 ;; (start code)
                            186 ;;  Case | microSecs(us) | CPU Cycles
                            187 ;; ------------------------------------
                            188 ;;  Any  |       5       |     20
                            189 ;; ------------------------------------
                            190 ;; (end code)
                            191 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            192 .macro add_bc_a
                            193    add_REGPAIR_a  b, c
                            194 .endm
                            195 
                            196 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            197 ;; Macro: sub_REGPAIR_a 
                            198 ;;
                            199 ;;    Performs the operation REGPAIR = REGPAIR - A. REGPAIR is any given pair of 8-bit registers.
                            200 ;;
                            201 ;; ASM Definition:
                            202 ;;    .macro <sub_REGPAIR_a> RH, RL
                            203 ;;
                            204 ;; Parameters:
                            205 ;;    RH    - Register 1 of the REGPAIR. Holds higher-byte value
                            206 ;;    RL    - Register 2 of the REGPAIR. Holds lower-byte value
                            207 ;;  ?JMPLBL - Optional Jump label. A temporal one will be produced if none is given.
                            208 ;; 
                            209 ;; Input Registers: 
                            210 ;;    RH:RL - 16-value used as left-operand and final storage for the subtraction
                            211 ;;    A     - Second subtraction operand (A > 0)
                            212 ;;
                            213 ;; Preconditions:
                            214 ;;    A > 0 - Value in register A is considered to be unsigned and must be greater
                            215 ;;            than 0 for this macro to work properly.
                            216 ;;
                            217 ;; Return Value:
                            218 ;;    RH:RL - Holds the result of RH:RL - A
                            219 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 12.
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                            220 ;; Details:
                            221 ;;    This macro performs the subtraction of RH:RL - A and stores it directly on RH:RL.
                            222 ;; It uses only RH:RL and A to perform the operation.
                            223 ;;    With respect to the optional label ?JMPLBL, it is often better not to provide 
                            224 ;; this parameter. A temporal local symbol will be automatically generated for that label.
                            225 ;; Only provide it when you have a specific reason to do that.
                            226 ;;
                            227 ;; Modified Registers: 
                            228 ;;    A, RH, RL
                            229 ;;
                            230 ;; Required memory:
                            231 ;;    7 bytes
                            232 ;;
                            233 ;; Time Measures:
                            234 ;; (start code)
                            235 ;;  Case | microSecs(us) | CPU Cycles
                            236 ;; ------------------------------------
                            237 ;;  Any  |       7       |     28
                            238 ;; ------------------------------------
                            239 ;; (end code)
                            240 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            241 .macro sub_REGPAIR_a rh, rl, ?jmplbl
                            242    ;; First Perform A' = A - 1 - RL 
                            243    ;; (Inverse subtraction minus 1, used  to test for Carry, needed to know when to subtract 1 from RH)
                            244    dec    a          ;; [1] --A (In case A == RL, inverse subtraction should produce carry not to decrement RH)
                            245    sub   rl          ;; [1] A' = A - 1 - RL
                            246    jr     c, jmplbl  ;; [2/3] If A <= RL, Carry will be produced, and no decrement of RH is required, so jump over it
                            247      dec   rh        ;; [1] --RH (A > RL, so RH must be decremented)
                            248 jmplbl:   
                            249    ;; Now invert A to get the subtraction we wanted 
                            250    ;; { RL' = -A' - 1 = -(A - 1 - RL) - 1 = RL - A }
                            251    cpl            ;; [1] A'' = RL - A (Original subtraction we wanted, calculated trough one's complement of A')
                            252    ld    rl, a    ;; [1] Save into RL (RL' = RL - A)
                            253 .endm
                            254 
                            255 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            256 ;; Macro: sub_de_a 
                            257 ;;
                            258 ;;    Performs the operation DE = DE - A. DE is any given pair of 8-bit registers.
                            259 ;;
                            260 ;; ASM Definition:
                            261 ;;    .macro <sub_de_a>
                            262 ;; 
                            263 ;; Input Registers: 
                            264 ;;    DE - 16-value used as left-operand and final storage for the subtraction
                            265 ;;    A  - Second subtraction operand
                            266 ;;
                            267 ;; Return Value:
                            268 ;;    DE - Holds the result of DE - A
                            269 ;;
                            270 ;; Details:
                            271 ;;    This macro performs the subtraction of DE - A and stores it directly on DE.
                            272 ;; It uses only DE and A to perform the operation.
                            273 ;;
                            274 ;; Modified Registers: 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 13.
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                            275 ;;    A, DE
                            276 ;;
                            277 ;; Required memory:
                            278 ;;    7 bytes
                            279 ;;
                            280 ;; Time Measures:
                            281 ;; (start code)
                            282 ;;  Case | microSecs(us) | CPU Cycles
                            283 ;; ------------------------------------
                            284 ;;  Any  |       7       |     28
                            285 ;; ------------------------------------
                            286 ;; (end code)
                            287 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            288 .macro sub_de_a
                            289    sub_REGPAIR_a  d, e
                            290 .endm
                            291 
                            292 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            293 ;; Macro: sub_hl_a 
                            294 ;;
                            295 ;;    Performs the operation HL = HL - A. HL is any given pair of 8-bit registers.
                            296 ;;
                            297 ;; ASM Definition:
                            298 ;;    .macro <sub_hl_a>
                            299 ;; 
                            300 ;; Input Registers: 
                            301 ;;    HL - 16-value used as left-operand and final storage for the subtraction
                            302 ;;    A  - Second subtraction operand
                            303 ;;
                            304 ;; Return Value:
                            305 ;;    HL - Holds the result of HL - A
                            306 ;;
                            307 ;; Details:
                            308 ;;    This macro performs the subtraction of HL - A and stores it directly on HL.
                            309 ;; It uses only HL and A to perform the operation.
                            310 ;;
                            311 ;; Modified Registers: 
                            312 ;;    A, HL
                            313 ;;
                            314 ;; Required memory:
                            315 ;;    7 bytes
                            316 ;;
                            317 ;; Time Measures:
                            318 ;; (start code)
                            319 ;;  Case | microSecs(us) | CPU Cycles
                            320 ;; ------------------------------------
                            321 ;;  Any  |       7       |     28
                            322 ;; ------------------------------------
                            323 ;; (end code)
                            324 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            325 .macro sub_hl_a
                            326    sub_REGPAIR_a  h, l
                            327 .endm
                            328 
                            329 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 14.
Hexadecimal [16-Bits]



                            330 ;; Macro: sub_bc_a 
                            331 ;;
                            332 ;;    Performs the operation BC = BC - A. BC is any given pair of 8-bit registers.
                            333 ;;
                            334 ;; ASM Definition:
                            335 ;;    .macro <sub_bc_a>
                            336 ;; 
                            337 ;; Input Registers: 
                            338 ;;    BC - 16-value used as left-operand and final storage for the subtraction
                            339 ;;    A  - Second subtraction operand
                            340 ;;
                            341 ;; Return Value:
                            342 ;;    BC - Holds the result of BC - A
                            343 ;;
                            344 ;; Details:
                            345 ;;    This macro performs the subtraction of BC - A and stores it directly on BC.
                            346 ;; It uses only BC and A to perform the operation.
                            347 ;;
                            348 ;; Modified Registers: 
                            349 ;;    A, BC
                            350 ;;
                            351 ;; Required memory:
                            352 ;;    7 bytes
                            353 ;;
                            354 ;; Time Measures:
                            355 ;; (start code)
                            356 ;;  Case | microSecs(us) | CPU Cycles
                            357 ;; ------------------------------------
                            358 ;;  Any  |       7       |     28
                            359 ;; ------------------------------------
                            360 ;; (end code)
                            361 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            362 .macro sub_bc_a
                            363    sub_REGPAIR_a  b, c
                            364 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 15.
Hexadecimal [16-Bits]



                             20 .include "macros/cpct_opcodeConstants.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2016 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Opcodes
                             21 ;;
                             22 ;;    Constant definitions of Z80 opcodes. This will be normally used as data
                             23 ;; for self-modifying code.
                             24 ;;
                             25 
                             26 ;; Constant: opc_JR
                             27 ;;    Opcode for "JR xx" instruction. Requires 1-byte parameter (xx)
                     0018    28 opc_JR   = 0x18
                             29 
                             30 ;; Constant: opc_LD_D
                             31 ;;    Opcode for "LD d, xx" instruction. Requires 1-byte parameter (xx)
                     0016    32 opc_LD_D = 0x16
                             33 
                             34 ;; Constant: opc_EI
                             35 ;;    Opcode for "EI" instruction. 
                     00FB    36 opc_EI = 0xFB
                             37 
                             38 ;; Constant: opc_DI
                             39 ;;    Opcode for "DI" instruction. 
                     00F3    40 opc_DI = 0xF3
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 16.
Hexadecimal [16-Bits]



                             21 .include "macros/cpct_reverseBits.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2016 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Reverse Bits
                             21 ;;
                             22 ;;    Useful macros for bit reversing and selecting in different ways. Only
                             23 ;; valid to be used from assembly language (not from C).
                             24 ;;
                             25 
                             26 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             27 ;; Macro: cpctm_reverse_and_select_bits_of_A
                             28 ;;
                             29 ;;    Reorders the bits of A and mixes them letting the user select the 
                             30 ;; new order for the bits by using a selection mask.
                             31 ;;
                             32 ;; Parameters:
                             33 ;;    TReg          - An 8-bits register that will be used for intermediate calculations.
                             34 ;; This register may be one of these: B, C, D, E, H, L
                             35 ;;    SelectionMask - An 8-bits mask that will be used to select the bits to get from 
                             36 ;; the reordered bits. It might be an 8-bit register or even (hl).
                             37 ;; 
                             38 ;; Input Registers: 
                             39 ;;    A     - Byte to be reversed
                             40 ;;    TReg  - Should have a copy of A (same exact value)
                             41 ;;
                             42 ;; Return Value:
                             43 ;;    A - Resulting value with bits reversed and selected 
                             44 ;;
                             45 ;; Details:
                             46 ;;    This macro reorders the bits in A and mixes them with the same bits in
                             47 ;; their original order by using a *SelectionMask*. The process is as follows:
                             48 ;;
                             49 ;;    1. Consider the 8 bits of A = TReg = [01234567]
                             50 ;;    2. Reorder the 8 bits of A, producing A2 = [32547610]
                             51 ;;    2. Reorder the bits of TReg, producing TReg2 = [76103254]
                             52 ;;    3. Combines both reorders into final result using a *SelectionMask*. Each 
                             53 ;; 0 bit from the selection mask means "select bit from A2", whereas each 1 bit
                             54 ;; means "select bit from TReg2".
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 17.
Hexadecimal [16-Bits]



                             55 ;;
                             56 ;;    For instance, a selection mask 0b11001100 will produce this result:
                             57 ;;
                             58 ;; (start code)
                             59 ;;       A2 = [ 32 54 76 10 ]
                             60 ;;    TReg2 = [ 76 10 32 54 ]
                             61 ;;  SelMask = [ 11 00 11 00 ] // 1 = TReg2-bits, 0 = A2-bits
                             62 ;;  ---------------------------
                             63 ;;   Result = [ 76 54 32 10 ]
                             64 ;; (end code)
                             65 ;;
                             66 ;;    Therefore, mask 0b11001100 produces the effect of reversing the bits of A
                             67 ;; completely. Other masks will produce different reorders of the bits in A, for
                             68 ;; different requirements or needs.
                             69 ;;
                             70 ;; Modified Registers: 
                             71 ;;    AF, TReg
                             72 ;;
                             73 ;; Required memory:
                             74 ;;    16 bytes
                             75 ;;
                             76 ;; Time Measures:
                             77 ;; (start code)
                             78 ;;  Case | microSecs(us) | CPU Cycles
                             79 ;; ------------------------------------
                             80 ;;  Any  |      16       |     64
                             81 ;; ------------------------------------
                             82 ;; (end code)
                             83 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             84 .macro cpctm_reverse_and_select_bits_of_A  TReg, SelectionMask
                             85    rlca            ;; [1] | Rotate left twice so that...
                             86    rlca            ;; [1] | ... A=[23456701]
                             87 
                             88    ;; Mix bits of TReg and A so that all bits are in correct relative order
                             89    ;; but displaced from their final desired location
                             90    xor TReg        ;; [1] TReg = [01234567] (original value)
                             91    and #0b01010101 ;; [2]    A = [23456701] (bits rotated twice left)
                             92    xor TReg        ;; [1]   A2 = [03254761] (TReg mixed with A to get bits in order)
                             93    
                             94    ;; Now get bits 54 and 10 in their right location and save them into TReg
                             95    rlca            ;; [1]    A = [ 32 54 76 10 ] (54 and 10 are in their desired place)
                             96    ld TReg, a      ;; [1] TReg = A (Save this bit location into TReg)
                             97    
                             98    ;; Now get bits 76 and 32 in their right location in A
                             99    rrca            ;; [1] | Rotate A right 4 times to...
                            100    rrca            ;; [1] | ... get bits 76 and 32 located at their ...
                            101    rrca            ;; [1] | ... desired location :
                            102    rrca            ;; [1] | ... A = [ 76 10 32 54 ] (76 and 32 are in their desired place)
                            103    
                            104    ;; Finally, mix bits from TReg and A to get all bits reversed and selected
                            105    xor TReg          ;; [1] TReg = [32547610] (Mixed bits with 54 & 10 in their right place)
                            106    and SelectionMask ;; [2]    A = [76103254] (Mixed bits with 76 & 32 in their right place)
                            107    xor TReg          ;; [1]   A2 = [xxxxxxxx] final value: bits of A reversed and selected using *SelectionMask*
                            108 .endm
                            109 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 18.
Hexadecimal [16-Bits]



                            110 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            111 ;; Macro: cpctm_reverse_bits_of_A 
                            112 ;; Macro: cpctm_reverse_mode_2_pixels_of_A
                            113 ;;
                            114 ;;    Reverses the 8-bits of A, from [01234567] to [76543210]. This also reverses
                            115 ;; all pixels contained in A when A is in screen pixel format, mode 2.
                            116 ;;
                            117 ;; Parameters:
                            118 ;;    TReg - An 8-bits register that will be used for intermediate calculations.
                            119 ;; This register may be one of these: B, C, D, E, H, L
                            120 ;; 
                            121 ;; Input Registers: 
                            122 ;;    A    - Byte to be reversed
                            123 ;;    TReg - Should have a copy of A (same exact value)
                            124 ;;
                            125 ;; Return Value:
                            126 ;;    A - Resulting value with bits reversed 
                            127 ;;
                            128 ;; Requires:
                            129 ;;   - Uses the macro <cpctm_reverse_and_select_bits_of_A>.
                            130 ;;
                            131 ;; Details:
                            132 ;;    This macro reverses the bits in A. If bits of A = [01234567], the final
                            133 ;; result after processing this macro will be A = [76543210]. Register TReg is
                            134 ;; used for intermediate calculations and its value is destroyed.
                            135 ;;
                            136 ;; Modified Registers: 
                            137 ;;    AF, TReg
                            138 ;;
                            139 ;; Required memory:
                            140 ;;    16 bytes
                            141 ;;
                            142 ;; Time Measures:
                            143 ;; (start code)
                            144 ;;  Case | microSecs(us) | CPU Cycles
                            145 ;; ------------------------------------
                            146 ;;  Any  |      16       |     64
                            147 ;; ------------------------------------
                            148 ;; (end code)
                            149 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            150 .macro cpctm_reverse_bits_of_A  TReg
                            151    cpctm_reverse_and_select_bits_of_A  TReg, #0b11001100
                            152 .endm
                            153 .macro cpctm_reverse_mode_2_pixels_of_A   TReg
                            154    cpctm_reverse_bits_of_A  TReg
                            155 .endm
                            156 
                            157 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            158 ;; Macro: cpctm_reverse_mode_1_pixels_of_A
                            159 ;;
                            160 ;;    Reverses the order of pixel values contained in register A, assuming A is 
                            161 ;; in screen pixel format, mode 1.
                            162 ;;
                            163 ;; Parameters:
                            164 ;;    TReg - An 8-bits register that will be used for intermediate calculations.
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 19.
Hexadecimal [16-Bits]



                            165 ;; This register may be one of these: B, C, D, E, H, L
                            166 ;; 
                            167 ;; Input Registers: 
                            168 ;;    A    - Byte with pixel values to be reversed
                            169 ;;    TReg - Should have a copy of A (same exact value)
                            170 ;;
                            171 ;; Return Value:
                            172 ;;    A - Resulting byte with the 4 pixels values reversed in order
                            173 ;;
                            174 ;; Requires:
                            175 ;;   - Uses the macro <cpctm_reverse_and_select_bits_of_A>.
                            176 ;;
                            177 ;; Details:
                            178 ;;    This macro considers that A contains a byte that codifies 4 pixels in 
                            179 ;; screen pixel format, mode 1. It modifies A to reverse the order of its 4 
                            180 ;; contained pixel values left-to-right (1234 -> 4321). With respect to the 
                            181 ;; order of the 8-bits of A, the concrete operations performed is:
                            182 ;; (start code)
                            183 ;;    A = [01234567] == reverse-pixels ==> [32107654] = A2
                            184 ;; (end code)
                            185 ;;    You may want to check <cpct_px2byteM1> to know how bits codify both pixels
                            186 ;; in one single byte for screen pixel format, mode 1.
                            187 ;;
                            188 ;;    *TReg* is an 8-bit register that will be used for intermediate calculations,
                            189 ;; destroying its original value (that should be same as A, at the start).
                            190 ;;
                            191 ;; Modified Registers: 
                            192 ;;    AF, TReg
                            193 ;;
                            194 ;; Required memory:
                            195 ;;    16 bytes
                            196 ;;
                            197 ;; Time Measures:
                            198 ;; (start code)
                            199 ;;  Case | microSecs(us) | CPU Cycles
                            200 ;; ------------------------------------
                            201 ;;  Any  |      16       |     64
                            202 ;; ------------------------------------
                            203 ;; (end code)
                            204 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            205 .macro cpctm_reverse_mode_1_pixels_of_A  TReg
                            206    cpctm_reverse_and_select_bits_of_A  TReg, #0b00110011
                            207 .endm
                            208 
                            209 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            210 ;; Macro: cpctm_reverse_mode_0_pixels_of_A
                            211 ;;
                            212 ;;    Reverses the order of pixel values contained in register A, assuming A is 
                            213 ;; in screen pixel format, mode 0.
                            214 ;;
                            215 ;; Parameters:
                            216 ;;    TReg - An 8-bits register that will be used for intermediate calculations.
                            217 ;; This register may be one of these: B, C, D, E, H, L
                            218 ;; 
                            219 ;; Input Registers: 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 20.
Hexadecimal [16-Bits]



                            220 ;;    A    - Byte with pixel values to be reversed
                            221 ;;    TReg - Should have a copy of A (same exact value)
                            222 ;;
                            223 ;; Return Value:
                            224 ;;    A - Resulting byte with the 2 pixels values reversed in order
                            225 ;;
                            226 ;; Details:
                            227 ;;    This macro considers that A contains a byte that codifies 2 pixels in 
                            228 ;; screen pixel format, mode 0. It modifies A to reverse the order of its 2 
                            229 ;; contained pixel values left-to-right (12 -> 21). With respect to the 
                            230 ;; order of the 8-bits of A, the concrete operation performed is:
                            231 ;; (start code)
                            232 ;;    A = [01234567] == reverse-pixels ==> [10325476] = A2
                            233 ;; (end code)
                            234 ;;    You may want to check <cpct_px2byteM0> to know how bits codify both pixels
                            235 ;; in one single byte for screen pixel format, mode 0.
                            236 ;;
                            237 ;;    *TReg* is an 8-bit register that will be used for intermediate calculations,
                            238 ;; destroying its original value (that should be same as A, at the start).
                            239 ;;
                            240 ;; Modified Registers: 
                            241 ;;    AF, TReg
                            242 ;;
                            243 ;; Required memory:
                            244 ;;    7 bytes
                            245 ;;
                            246 ;; Time Measures:
                            247 ;; (start code)
                            248 ;;  Case | microSecs(us) | CPU Cycles
                            249 ;; ------------------------------------
                            250 ;;  Any  |       7       |     28
                            251 ;; ------------------------------------
                            252 ;; (end code)
                            253 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            254 .macro cpctm_reverse_mode_0_pixels_of_A  TReg
                            255    rlca            ;; [1] | Rotate A twice to the left to get bits ordered...
                            256    rlca            ;; [1] | ... in the way we need for mixing, A = [23456701]
                            257   
                            258    ;; Mix TReg with A to get pixels reversed by reordering bits
                            259    xor TReg        ;; [1] | TReg = [01234567]
                            260    and #0b01010101 ;; [2] |    A = [23456701]
                            261    xor TReg        ;; [1] |   A2 = [03254761]
                            262    rrca            ;; [1] Rotate right to get pixels reversed A = [10325476]
                            263 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 21.
Hexadecimal [16-Bits]



                             22 .include "macros/cpct_undocumentedOpcodes.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Undocumented Opcodes
                             21 ;;
                             22 ;;    Macros to clarify source code when using undocumented opcodes. Only
                             23 ;; valid to be used from assembly language (not from C).
                             24 ;;
                             25 
                             26 ;; Macro: jr__0
                             27 ;;    Opcode for "JR #0" instruction
                             28 ;; 
                             29 .mdelete jr__0
                             30 .macro jr__0
                             31    .DW #0x0018  ;; JR #00 (Normally used as a modifiable jump, as jr 0 is an infinite loop)
                             32 .endm
                             33 
                             34 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             35 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             36 ;; SLL Instructions
                             37 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             38 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             39 
                             40 ;; Macro: sll__b
                             41 ;;    Opcode for "SLL b" instruction
                             42 ;; 
                             43 .mdelete sll__b
                             44 .macro sll__b
                             45    .db #0xCB, #0x30  ;; Opcode for sll b
                             46 .endm
                             47 
                             48 ;; Macro: sll__c
                             49 ;;    Opcode for "SLL c" instruction
                             50 ;; 
                             51 .mdelete sll__c
                             52 .macro sll__c
                             53    .db #0xCB, #0x31  ;; Opcode for sll c
                             54 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 22.
Hexadecimal [16-Bits]



                             55 
                             56 ;; Macro: sll__d
                             57 ;;    Opcode for "SLL d" instruction
                             58 ;; 
                             59 .mdelete sll__d
                             60 .macro sll__d
                             61    .db #0xCB, #0x32  ;; Opcode for sll d
                             62 .endm
                             63 
                             64 ;; Macro: sll__e
                             65 ;;    Opcode for "SLL e" instruction
                             66 ;; 
                             67 .mdelete sll__e
                             68 .macro sll__e
                             69    .db #0xCB, #0x33  ;; Opcode for sll e
                             70 .endm
                             71 
                             72 ;; Macro: sll__h
                             73 ;;    Opcode for "SLL h" instruction
                             74 ;; 
                             75 .mdelete sll__h
                             76 .macro sll__h
                             77    .db #0xCB, #0x34  ;; Opcode for sll h
                             78 .endm
                             79 
                             80 ;; Macro: sll__l
                             81 ;;    Opcode for "SLL l" instruction
                             82 ;; 
                             83 .mdelete sll__l
                             84 .macro sll__l
                             85    .db #0xCB, #0x35  ;; Opcode for sll l
                             86 .endm
                             87 
                             88 ;; Macro: sll___hl_
                             89 ;;    Opcode for "SLL (hl)" instruction
                             90 ;; 
                             91 .mdelete sll___hl_
                             92 .macro sll___hl_
                             93    .db #0xCB, #0x36  ;; Opcode for sll (hl)
                             94 .endm
                             95 
                             96 ;; Macro: sll__a
                             97 ;;    Opcode for "SLL a" instruction
                             98 ;; 
                             99 .mdelete sll__a
                            100 .macro sll__a
                            101    .db #0xCB, #0x37  ;; Opcode for sll a
                            102 .endm
                            103 
                            104 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            105 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            106 ;; IXL Related Macros
                            107 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            108 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            109 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 23.
Hexadecimal [16-Bits]



                            110 ;; Macro: ld__ixl    Value
                            111 ;;    Opcode for "LD ixl, Value" instruction
                            112 ;;  
                            113 ;; Parameters:
                            114 ;;    Value - An inmediate 8-bits value that will be loaded into ixl
                            115 ;; 
                            116 .mdelete ld__ixl
                            117 .macro ld__ixl    Value 
                            118    .db #0xDD, #0x2E, Value  ;; Opcode for ld ixl, Value
                            119 .endm
                            120 
                            121 ;; Macro: ld__ixl_a
                            122 ;;    Opcode for "LD ixl, a" instruction
                            123 ;; 
                            124 .mdelete ld__ixl_a
                            125 .macro ld__ixl_a
                            126    .dw #0x6FDD  ;; Opcode for ld ixl, a
                            127 .endm
                            128 
                            129 ;; Macro: ld__ixl_b
                            130 ;;    Opcode for "LD ixl, B" instruction
                            131 ;; 
                            132 .mdelete ld__ixl_b
                            133 .macro ld__ixl_b
                            134    .dw #0x68DD  ;; Opcode for ld ixl, b
                            135 .endm
                            136 
                            137 ;; Macro: ld__ixl_c
                            138 ;;    Opcode for "LD ixl, C" instruction
                            139 ;; 
                            140 .mdelete ld__ixl_c
                            141 .macro ld__ixl_c
                            142    .dw #0x69DD  ;; Opcode for ld ixl, c
                            143 .endm
                            144 
                            145 ;; Macro: ld__ixl_d
                            146 ;;    Opcode for "LD ixl, D" instruction
                            147 ;; 
                            148 .mdelete ld__ixl_d
                            149 .macro ld__ixl_d
                            150    .dw #0x6ADD  ;; Opcode for ld ixl, d
                            151 .endm
                            152 
                            153 ;; Macro: ld__ixl_e
                            154 ;;    Opcode for "LD ixl, E" instruction
                            155 ;; 
                            156 .mdelete ld__ixl_e
                            157 .macro ld__ixl_e
                            158    .dw #0x6BDD  ;; Opcode for ld ixl, e
                            159 .endm
                            160 
                            161 ;; Macro: ld__ixl_ixh
                            162 ;;    Opcode for "LD ixl, IXH" instruction
                            163 ;; 
                            164 .mdelete  ld__ixl_ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 24.
Hexadecimal [16-Bits]



                            165 .macro ld__ixl_ixh
                            166    .dw #0x6CDD  ;; Opcode for ld ixl, ixh
                            167 .endm
                            168 
                            169 ;; Macro: ld__a_ixl
                            170 ;;    Opcode for "LD A, ixl" instruction
                            171 ;; 
                            172 .mdelete ld__a_ixl
                            173 .macro ld__a_ixl
                            174    .dw #0x7DDD  ;; Opcode for ld a, ixl
                            175 .endm
                            176 
                            177 ;; Macro: ld__b_ixl
                            178 ;;    Opcode for "LD B, ixl" instruction
                            179 ;; 
                            180 .mdelete ld__b_ixl
                            181 .macro ld__b_ixl
                            182    .dw #0x45DD  ;; Opcode for ld b, ixl
                            183 .endm
                            184 
                            185 ;; Macro: ld__c_ixl
                            186 ;;    Opcode for "LD c, ixl" instruction
                            187 ;; 
                            188 .mdelete ld__c_ixl
                            189 .macro ld__c_ixl
                            190    .dw #0x4DDD  ;; Opcode for ld c, ixl
                            191 .endm
                            192 
                            193 ;; Macro: ld__d_ixl
                            194 ;;    Opcode for "LD D, ixl" instruction
                            195 ;; 
                            196 .mdelete ld__d_ixl
                            197 .macro ld__d_ixl
                            198    .dw #0x55DD  ;; Opcode for ld d, ixl
                            199 .endm
                            200 
                            201 ;; Macro: ld__e_ixl
                            202 ;;    Opcode for "LD e, ixl" instruction
                            203 ;; 
                            204 .mdelete ld__e_ixl
                            205 .macro ld__e_ixl
                            206    .dw #0x5DDD  ;; Opcode for ld e, ixl
                            207 .endm
                            208 
                            209 ;; Macro: add__ixl
                            210 ;;    Opcode for "Add ixl" instruction
                            211 ;; 
                            212 .mdelete add__ixl
                            213 .macro add__ixl
                            214    .dw #0x85DD  ;; Opcode for add ixl
                            215 .endm
                            216 
                            217 ;; Macro: sub__ixl
                            218 ;;    Opcode for "SUB ixl" instruction
                            219 ;; 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 25.
Hexadecimal [16-Bits]



                            220 .mdelete sub__ixl
                            221 .macro sub__ixl
                            222    .dw #0x95DD  ;; Opcode for sub ixl
                            223 .endm
                            224 
                            225 ;; Macro: adc__ixl
                            226 ;;    Opcode for "ADC ixl" instruction
                            227 ;; 
                            228 .mdelete adc__ixl
                            229 .macro adc__ixl
                            230    .dw #0x8DDD  ;; Opcode for adc ixl
                            231 .endm
                            232 
                            233 ;; Macro: sbc__ixl
                            234 ;;    Opcode for "SBC ixl" instruction
                            235 ;; 
                            236 .mdelete sbc__ixl
                            237 .macro sbc__ixl
                            238    .dw #0x9DDD  ;; Opcode for sbc ixl
                            239 .endm
                            240 
                            241 ;; Macro: and__ixl
                            242 ;;    Opcode for "AND ixl" instruction
                            243 ;; 
                            244 .mdelete and__ixl
                            245 .macro and__ixl
                            246    .dw #0xA5DD  ;; Opcode for and ixl
                            247 .endm
                            248 
                            249 ;; Macro: or__ixl
                            250 ;;    Opcode for "OR ixl" instruction
                            251 ;; 
                            252 .mdelete or__ixl
                            253 .macro or__ixl
                            254    .dw #0xB5DD  ;; Opcode for or ixl
                            255 .endm
                            256 
                            257 ;; Macro: xor__ixl
                            258 ;;    Opcode for "XOR ixl" instruction
                            259 ;; 
                            260 .mdelete xor__ixl
                            261 .macro xor__ixl
                            262    .dw #0xADDD  ;; Opcode for xor ixl
                            263 .endm
                            264 
                            265 ;; Macro: cp__ixl
                            266 ;;    Opcode for "CP ixl" instruction
                            267 ;; 
                            268 .mdelete cp__ixl
                            269 .macro cp__ixl
                            270    .dw #0xBDDD  ;; Opcode for cp ixl
                            271 .endm
                            272 
                            273 ;; Macro: dec__ixl
                            274 ;;    Opcode for "DEC ixl" instruction
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 26.
Hexadecimal [16-Bits]



                            275 ;; 
                            276 .mdelete dec__ixl
                            277 .macro dec__ixl
                            278    .dw #0x2DDD  ;; Opcode for dec ixl
                            279 .endm
                            280 
                            281 ;; Macro: inc__ixl
                            282 ;;    Opcode for "INC ixl" instruction
                            283 ;; 
                            284 .mdelete inc__ixl
                            285 .macro inc__ixl
                            286    .dw #0x2CDD  ;; Opcode for inc ixl
                            287 .endm
                            288 
                            289 
                            290 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            291 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            292 ;; IXH Related Macros
                            293 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            294 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            295 
                            296 ;; Macro: ld__ixh    Value
                            297 ;;    Opcode for "LD IXH, Value" instruction
                            298 ;;  
                            299 ;; Parameters:
                            300 ;;    Value - An inmediate 8-bits value that will be loaded into IXH
                            301 ;; 
                            302 .mdelete  ld__ixh
                            303 .macro ld__ixh    Value 
                            304    .db #0xDD, #0x26, Value  ;; Opcode for ld ixh, Value
                            305 .endm
                            306 
                            307 ;; Macro: ld__ixh_a
                            308 ;;    Opcode for "LD IXH, a" instruction
                            309 ;; 
                            310 .mdelete ld__ixh_a
                            311 .macro ld__ixh_a
                            312    .dw #0x67DD  ;; Opcode for ld ixh, a
                            313 .endm
                            314 
                            315 ;; Macro: ld__ixh_b
                            316 ;;    Opcode for "LD IXH, B" instruction
                            317 ;; 
                            318 .mdelete ld__ixh_b
                            319 .macro ld__ixh_b
                            320    .dw #0x60DD  ;; Opcode for ld ixh, b
                            321 .endm
                            322 
                            323 ;; Macro: ld__ixh_c
                            324 ;;    Opcode for "LD IXH, C" instruction
                            325 ;; 
                            326 .mdelete ld__ixh_c
                            327 .macro ld__ixh_c
                            328    .dw #0x61DD  ;; Opcode for ld ixh, c
                            329 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 27.
Hexadecimal [16-Bits]



                            330 
                            331 ;; Macro: ld__ixh_d
                            332 ;;    Opcode for "LD IXH, D" instruction
                            333 ;; 
                            334 .mdelete ld__ixh_d
                            335 .macro ld__ixh_d
                            336    .dw #0x62DD  ;; Opcode for ld ixh, d
                            337 .endm
                            338 
                            339 ;; Macro: ld__ixh_e
                            340 ;;    Opcode for "LD IXH, E" instruction
                            341 ;; 
                            342 .mdelete ld__ixh_e
                            343 .macro ld__ixh_e
                            344    .dw #0x63DD  ;; Opcode for ld ixh, e
                            345 .endm
                            346 
                            347 ;; Macro: ld__ixh_ixl
                            348 ;;    Opcode for "LD IXH, IXL" instruction
                            349 ;; 
                            350 .mdelete ld__ixh_ixl
                            351 .macro ld__ixh_ixl
                            352    .dw #0x65DD  ;; Opcode for ld ixh, ixl
                            353 .endm
                            354 
                            355 ;; Macro: ld__a_ixh
                            356 ;;    Opcode for "LD A, IXH" instruction
                            357 ;; 
                            358 .mdelete ld__a_ixh
                            359 .macro ld__a_ixh
                            360    .dw #0x7CDD  ;; Opcode for ld a, ixh
                            361 .endm
                            362 
                            363 ;; Macro: ld__b_ixh
                            364 ;;    Opcode for "LD B, IXH" instruction
                            365 ;; 
                            366 .mdelete ld__b_ixh
                            367 .macro ld__b_ixh
                            368    .dw #0x44DD  ;; Opcode for ld b, ixh
                            369 .endm
                            370 
                            371 ;; Macro: ld__c_ixh
                            372 ;;    Opcode for "LD c, IXH" instruction
                            373 ;; 
                            374 .mdelete ld__c_ixh
                            375 .macro ld__c_ixh
                            376    .dw #0x4CDD  ;; Opcode for ld c, ixh
                            377 .endm
                            378 
                            379 ;; Macro: ld__d_ixh
                            380 ;;    Opcode for "LD D, IXH" instruction
                            381 ;; 
                            382 .mdelete ld__d_ixh
                            383 .macro ld__d_ixh
                            384    .dw #0x54DD  ;; Opcode for ld d, ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 28.
Hexadecimal [16-Bits]



                            385 .endm
                            386 
                            387 ;; Macro: ld__e_ixh
                            388 ;;    Opcode for "LD e, IXH" instruction
                            389 ;; 
                            390 .mdelete ld__e_ixh
                            391 .macro ld__e_ixh
                            392    .dw #0x5CDD  ;; Opcode for ld e, ixh
                            393 .endm
                            394 
                            395 ;; Macro: add__ixh
                            396 ;;    Opcode for "ADD IXH" instruction
                            397 ;; 
                            398 .mdelete add__ixh
                            399 .macro add__ixh
                            400    .dw #0x84DD  ;; Opcode for add ixh
                            401 .endm
                            402 
                            403 ;; Macro: sub__ixh
                            404 ;;    Opcode for "SUB IXH" instruction
                            405 ;; 
                            406 .mdelete sub__ixh
                            407 .macro sub__ixh
                            408    .dw #0x94DD  ;; Opcode for sub ixh
                            409 .endm
                            410 
                            411 ;; Macro: adc__ixh
                            412 ;;    Opcode for "ADC IXH" instruction
                            413 ;; 
                            414 .mdelete adc__ixh
                            415 .macro adc__ixh
                            416    .dw #0x8CDD  ;; Opcode for adc ixh
                            417 .endm
                            418 
                            419 ;; Macro: sbc__ixh
                            420 ;;    Opcode for "SBC IXH" instruction
                            421 ;; 
                            422 .mdelete sbc__ixh
                            423 .macro sbc__ixh
                            424    .dw #0x9CDD  ;; Opcode for sbc ixh
                            425 .endm
                            426 
                            427 ;; Macro: and__ixh
                            428 ;;    Opcode for "AND IXH" instruction
                            429 ;; 
                            430 .mdelete and__ixh
                            431 .macro and__ixh
                            432    .dw #0xA4DD  ;; Opcode for and ixh
                            433 .endm
                            434 
                            435 ;; Macro: or__ixh
                            436 ;;    Opcode for "OR IXH" instruction
                            437 ;; 
                            438 .mdelete or__ixh
                            439 .macro or__ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 29.
Hexadecimal [16-Bits]



                            440    .dw #0xB4DD  ;; Opcode for or ixh
                            441 .endm
                            442 
                            443 ;; Macro: xor__ixh
                            444 ;;    Opcode for "XOR IXH" instruction
                            445 ;; 
                            446 .mdelete xor__ixh
                            447 .macro xor__ixh
                            448    .dw #0xACDD  ;; Opcode for xor ixh
                            449 .endm
                            450 
                            451 ;; Macro: cp__ixh
                            452 ;;    Opcode for "CP IXH" instruction
                            453 ;; 
                            454 .mdelete cp__ixh
                            455 .macro cp__ixh
                            456    .dw #0xBCDD  ;; Opcode for cp ixh
                            457 .endm
                            458 
                            459 ;; Macro: dec__ixh
                            460 ;;    Opcode for "DEC IXH" instruction
                            461 ;; 
                            462 .mdelete dec__ixh
                            463 .macro dec__ixh
                            464    .dw #0x25DD  ;; Opcode for dec ixh
                            465 .endm
                            466 
                            467 ;; Macro: inc__ixh
                            468 ;;    Opcode for "INC IXH" instruction
                            469 ;; 
                            470 .mdelete inc__ixh
                            471 .macro inc__ixh
                            472    .dw #0x24DD  ;; Opcode for inc ixh
                            473 .endm
                            474 
                            475 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            476 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            477 ;; IYL Related Macros
                            478 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            479 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            480 
                            481 ;; Macro: ld__iyl    Value
                            482 ;;    Opcode for "LD iyl, Value" instruction
                            483 ;;  
                            484 ;; Parameters:
                            485 ;;    Value - An inmediate 8-bits value that will be loaded into iyl
                            486 ;; 
                            487 .mdelete  ld__iyl
                            488 .macro ld__iyl    Value 
                            489    .db #0xFD, #0x2E, Value  ;; Opcode for ld iyl, Value
                            490 .endm
                            491 
                            492 ;; Macro: ld__iyl_a
                            493 ;;    Opcode for "LD iyl, a" instruction
                            494 ;; 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 30.
Hexadecimal [16-Bits]



                            495 .mdelete ld__iyl_a
                            496 .macro ld__iyl_a
                            497    .dw #0x6FFD  ;; Opcode for ld iyl, a
                            498 .endm
                            499 
                            500 ;; Macro: ld__iyl_b
                            501 ;;    Opcode for "LD iyl, B" instruction
                            502 ;; 
                            503 .mdelete ld__iyl_b
                            504 .macro ld__iyl_b
                            505    .dw #0x68FD  ;; Opcode for ld iyl, b
                            506 .endm
                            507 
                            508 ;; Macro: ld__iyl_c
                            509 ;;    Opcode for "LD iyl, C" instruction
                            510 ;; 
                            511 .mdelete ld__iyl_c
                            512 .macro ld__iyl_c
                            513    .dw #0x69FD  ;; Opcode for ld iyl, c
                            514 .endm
                            515 
                            516 ;; Macro: ld__iyl_d
                            517 ;;    Opcode for "LD iyl, D" instruction
                            518 ;; 
                            519 .mdelete ld__iyl_d
                            520 .macro ld__iyl_d
                            521    .dw #0x6AFD  ;; Opcode for ld iyl, d
                            522 .endm
                            523 
                            524 ;; Macro: ld__iyl_e
                            525 ;;    Opcode for "LD iyl, E" instruction
                            526 ;; 
                            527 .mdelete ld__iyl_e
                            528 .macro ld__iyl_e
                            529    .dw #0x6BFD  ;; Opcode for ld iyl, e
                            530 .endm
                            531 
                            532 ;; Macro: ld__iyl_iyh
                            533 ;;    Opcode for "LD iyl, IXL" instruction
                            534 ;; 
                            535 .mdelete  ld__iyl_iyh
                            536 .macro ld__iyl_iyh
                            537    .dw #0x6CFD  ;; Opcode for ld iyl, ixl
                            538 .endm
                            539 
                            540 ;; Macro: ld__a_iyl
                            541 ;;    Opcode for "LD A, iyl" instruction
                            542 ;; 
                            543 .mdelete ld__a_iyl
                            544 .macro ld__a_iyl
                            545    .dw #0x7DFD  ;; Opcode for ld a, iyl
                            546 .endm
                            547 
                            548 ;; Macro: ld__b_iyl
                            549 ;;    Opcode for "LD B, iyl" instruction
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 31.
Hexadecimal [16-Bits]



                            550 ;; 
                            551 .mdelete ld__b_iyl
                            552 .macro ld__b_iyl
                            553    .dw #0x45FD  ;; Opcode for ld b, iyl
                            554 .endm
                            555 
                            556 ;; Macro: ld__c_iyl
                            557 ;;    Opcode for "LD c, iyl" instruction
                            558 ;; 
                            559 .mdelete ld__c_iyl
                            560 .macro ld__c_iyl
                            561    .dw #0x4DFD  ;; Opcode for ld c, iyl
                            562 .endm
                            563 
                            564 ;; Macro: ld__d_iyl
                            565 ;;    Opcode for "LD D, iyl" instruction
                            566 ;; 
                            567 .mdelete ld__d_iyl
                            568 .macro ld__d_iyl
                            569    .dw #0x55FD  ;; Opcode for ld d, iyl
                            570 .endm
                            571 
                            572 ;; Macro: ld__e_iyl
                            573 ;;    Opcode for "LD e, iyl" instruction
                            574 ;; 
                            575 .mdelete ld__e_iyl
                            576 .macro ld__e_iyl
                            577    .dw #0x5DFD  ;; Opcode for ld e, iyl
                            578 .endm
                            579 
                            580 ;; Macro: add__iyl
                            581 ;;    Opcode for "Add iyl" instruction
                            582 ;; 
                            583 .mdelete add__iyl
                            584 .macro add__iyl
                            585    .dw #0x85FD  ;; Opcode for add iyl
                            586 .endm
                            587 
                            588 ;; Macro: sub__iyl
                            589 ;;    Opcode for "SUB iyl" instruction
                            590 ;; 
                            591 .mdelete sub__iyl
                            592 .macro sub__iyl
                            593    .dw #0x95FD  ;; Opcode for sub iyl
                            594 .endm
                            595 
                            596 ;; Macro: adc__iyl
                            597 ;;    Opcode for "ADC iyl" instruction
                            598 ;; 
                            599 .mdelete adc__iyl
                            600 .macro adc__iyl
                            601    .dw #0x8DFD  ;; Opcode for adc iyl
                            602 .endm
                            603 
                            604 ;; Macro: sbc__iyl
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 32.
Hexadecimal [16-Bits]



                            605 ;;    Opcode for "SBC iyl" instruction
                            606 ;; 
                            607 .mdelete sbc__iyl
                            608 .macro sbc__iyl
                            609    .dw #0x9DFD  ;; Opcode for sbc iyl
                            610 .endm
                            611 
                            612 ;; Macro: and__iyl
                            613 ;;    Opcode for "AND iyl" instruction
                            614 ;; 
                            615 .mdelete and__iyl
                            616 .macro and__iyl
                            617    .dw #0xA5FD  ;; Opcode for and iyl
                            618 .endm
                            619 
                            620 ;; Macro: or__iyl
                            621 ;;    Opcode for "OR iyl" instruction
                            622 ;; 
                            623 .mdelete or__iyl
                            624 .macro or__iyl
                            625    .dw #0xB5FD  ;; Opcode for or iyl
                            626 .endm
                            627 
                            628 ;; Macro: xor__iyl
                            629 ;;    Opcode for "XOR iyl" instruction
                            630 ;; 
                            631 .mdelete xor__iyl
                            632 .macro xor__iyl
                            633    .dw #0xADFD  ;; Opcode for xor iyl
                            634 .endm
                            635 
                            636 ;; Macro: cp__iyl
                            637 ;;    Opcode for "CP iyl" instruction
                            638 ;; 
                            639 .mdelete cp__iyl
                            640 .macro cp__iyl
                            641    .dw #0xBDFD  ;; Opcode for cp iyl
                            642 .endm
                            643 
                            644 ;; Macro: dec__iyl
                            645 ;;    Opcode for "DEC iyl" instruction
                            646 ;; 
                            647 .mdelete dec__iyl
                            648 .macro dec__iyl
                            649    .dw #0x2DFD  ;; Opcode for dec iyl
                            650 .endm
                            651 
                            652 ;; Macro: inc__iyl
                            653 ;;    Opcode for "INC iyl" instruction
                            654 ;; 
                            655 .mdelete inc__iyl
                            656 .macro inc__iyl
                            657    .dw #0x2CFD  ;; Opcode for inc iyl
                            658 .endm
                            659 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 33.
Hexadecimal [16-Bits]



                            660 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            661 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            662 ;; IYH Related Macros
                            663 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            664 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            665 
                            666 ;; Macro: ld__iyh    Value
                            667 ;;    Opcode for "LD iyh, Value" instruction
                            668 ;;  
                            669 ;; Parameters:
                            670 ;;    Value - An inmediate 8-bits value that will be loaded into iyh
                            671 ;; 
                            672 .mdelete  ld__iyh
                            673 .macro ld__iyh    Value 
                            674    .db #0xFD, #0x26, Value  ;; Opcode for ld iyh, Value
                            675 .endm
                            676 
                            677 ;; Macro: ld__iyh_a
                            678 ;;    Opcode for "LD iyh, a" instruction
                            679 ;; 
                            680 .mdelete ld__iyh_a
                            681 .macro ld__iyh_a
                            682    .dw #0x67FD  ;; Opcode for ld iyh, a
                            683 .endm
                            684 
                            685 ;; Macro: ld__iyh_b
                            686 ;;    Opcode for "LD iyh, B" instruction
                            687 ;; 
                            688 .mdelete ld__iyh_b
                            689 .macro ld__iyh_b
                            690    .dw #0x60FD  ;; Opcode for ld iyh, b
                            691 .endm
                            692 
                            693 ;; Macro: ld__iyh_c
                            694 ;;    Opcode for "LD iyh, C" instruction
                            695 ;; 
                            696 .mdelete ld__iyh_c
                            697 .macro ld__iyh_c
                            698    .dw #0x61FD  ;; Opcode for ld iyh, c
                            699 .endm
                            700 
                            701 ;; Macro: ld__iyh_d
                            702 ;;    Opcode for "LD iyh, D" instruction
                            703 ;; 
                            704 .mdelete ld__iyh_d
                            705 .macro ld__iyh_d
                            706    .dw #0x62FD  ;; Opcode for ld iyh, d
                            707 .endm
                            708 
                            709 ;; Macro: ld__iyh_e
                            710 ;;    Opcode for "LD iyh, E" instruction
                            711 ;; 
                            712 .mdelete ld__iyh_e
                            713 .macro ld__iyh_e
                            714    .dw #0x63FD  ;; Opcode for ld iyh, e
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 34.
Hexadecimal [16-Bits]



                            715 .endm
                            716 
                            717 ;; Macro: ld__iyh_iyl
                            718 ;;    Opcode for "LD iyh, IyL" instruction
                            719 ;; 
                            720 .mdelete  ld__iyh_iyl
                            721 .macro ld__iyh_iyl
                            722    .dw #0x65FD  ;; Opcode for ld iyh, iyl
                            723 .endm
                            724 
                            725 ;; Macro: ld__a_iyh
                            726 ;;    Opcode for "LD A, iyh" instruction
                            727 ;; 
                            728 .mdelete ld__a_iyh
                            729 .macro ld__a_iyh
                            730    .dw #0x7CFD  ;; Opcode for ld a, iyh
                            731 .endm
                            732 
                            733 ;; Macro: ld__b_iyh
                            734 ;;    Opcode for "LD B, iyh" instruction
                            735 ;; 
                            736 .mdelete ld__b_iyh
                            737 .macro ld__b_iyh
                            738    .dw #0x44FD  ;; Opcode for ld b, iyh
                            739 .endm
                            740 
                            741 ;; Macro: ld__c_iyh
                            742 ;;    Opcode for "LD c, iyh" instruction
                            743 ;; 
                            744 .mdelete ld__c_iyh
                            745 .macro ld__c_iyh
                            746    .dw #0x4CFD  ;; Opcode for ld c, iyh
                            747 .endm
                            748 
                            749 ;; Macro: ld__d_iyh
                            750 ;;    Opcode for "LD D, iyh" instruction
                            751 ;; 
                            752 .mdelete ld__d_iyh
                            753 .macro ld__d_iyh
                            754    .dw #0x54FD  ;; Opcode for ld d, iyh
                            755 .endm
                            756 
                            757 ;; Macro: ld__e_iyh
                            758 ;;    Opcode for "LD e, iyh" instruction
                            759 ;; 
                            760 .mdelete ld__e_iyh
                            761 .macro ld__e_iyh
                            762    .dw #0x5CFD  ;; Opcode for ld e, iyh
                            763 .endm
                            764 
                            765 ;; Macro: add__iyh
                            766 ;;    Opcode for "Add iyh" instruction
                            767 ;; 
                            768 .mdelete add__iyh
                            769 .macro add__iyh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 35.
Hexadecimal [16-Bits]



                            770    .dw #0x84FD  ;; Opcode for add iyh
                            771 .endm
                            772 
                            773 ;; Macro: sub__iyh
                            774 ;;    Opcode for "SUB iyh" instruction
                            775 ;; 
                            776 .mdelete sub__iyh
                            777 .macro sub__iyh
                            778    .dw #0x94FD  ;; Opcode for sub iyh
                            779 .endm
                            780 
                            781 ;; Macro: adc__iyh
                            782 ;;    Opcode for "ADC iyh" instruction
                            783 ;; 
                            784 .mdelete adc__iyh
                            785 .macro adc__iyh
                            786    .dw #0x8CFD  ;; Opcode for adc iyh
                            787 .endm
                            788 
                            789 ;; Macro: sbc__iyh
                            790 ;;    Opcode for "SBC iyh" instruction
                            791 ;; 
                            792 .mdelete sbc__iyh
                            793 .macro sbc__iyh
                            794    .dw #0x9CFD  ;; Opcode for sbc iyh
                            795 .endm
                            796 
                            797 ;; Macro: and__iyh
                            798 ;;    Opcode for "AND iyh" instruction
                            799 ;; 
                            800 .mdelete and__iyh
                            801 .macro and__iyh
                            802    .dw #0xA4FD  ;; Opcode for and iyh
                            803 .endm
                            804 
                            805 ;; Macro: or__iyh
                            806 ;;    Opcode for "OR iyh" instruction
                            807 ;; 
                            808 .mdelete or__iyh
                            809 .macro or__iyh
                            810    .dw #0xB4FD  ;; Opcode for or iyh
                            811 .endm
                            812 
                            813 ;; Macro: xor__iyh
                            814 ;;    Opcode for "XOR iyh" instruction
                            815 ;; 
                            816 .mdelete xor__iyh
                            817 .macro xor__iyh
                            818    .dw #0xACFD  ;; Opcode for xor iyh
                            819 .endm
                            820 
                            821 ;; Macro: cp__iyh
                            822 ;;    Opcode for "CP iyh" instruction
                            823 ;; 
                            824 .mdelete cp__iyh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 36.
Hexadecimal [16-Bits]



                            825 .macro cp__iyh
                            826    .dw #0xBCFD  ;; Opcode for cp iyh
                            827 .endm
                            828 
                            829 ;; Macro: dec__iyh
                            830 ;;    Opcode for "DEC iyh" instruction
                            831 ;; 
                            832 .mdelete dec__iyh
                            833 .macro dec__iyh
                            834    .dw #0x25FD  ;; Opcode for dec iyh
                            835 .endm
                            836 
                            837 ;; Macro: inc__iyh
                            838 ;;    Opcode for "INC iyh" instruction
                            839 ;; 
                            840 .mdelete inc__iyh
                            841 .macro inc__iyh
                            842    .dw #0x24FD  ;; Opcode for inc iyh
                            843 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 37.
Hexadecimal [16-Bits]



                             23 .include "macros/cpct_combinedOperations.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Combined operations
                             21 ;;
                             22 ;;    Macros to clarify source code that combine several operations in one macro.
                             23 ;; For instance, macros to copy HL to DE or IX to DE, that require 2 or more 
                             24 ;; instructions but are commonly used.
                             25 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 38.
Hexadecimal [16-Bits]



                             26 .include "macros/cpct_undocumentedOpcodes.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Undocumented Opcodes
                             21 ;;
                             22 ;;    Macros to clarify source code when using undocumented opcodes. Only
                             23 ;; valid to be used from assembly language (not from C).
                             24 ;;
                             25 
                             26 ;; Macro: jr__0
                             27 ;;    Opcode for "JR #0" instruction
                             28 ;; 
                             29 .mdelete jr__0
                             30 .macro jr__0
                             31    .DW #0x0018  ;; JR #00 (Normally used as a modifiable jump, as jr 0 is an infinite loop)
                             32 .endm
                             33 
                             34 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             35 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             36 ;; SLL Instructions
                             37 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             38 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             39 
                             40 ;; Macro: sll__b
                             41 ;;    Opcode for "SLL b" instruction
                             42 ;; 
                             43 .mdelete sll__b
                             44 .macro sll__b
                             45    .db #0xCB, #0x30  ;; Opcode for sll b
                             46 .endm
                             47 
                             48 ;; Macro: sll__c
                             49 ;;    Opcode for "SLL c" instruction
                             50 ;; 
                             51 .mdelete sll__c
                             52 .macro sll__c
                             53    .db #0xCB, #0x31  ;; Opcode for sll c
                             54 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 39.
Hexadecimal [16-Bits]



                             55 
                             56 ;; Macro: sll__d
                             57 ;;    Opcode for "SLL d" instruction
                             58 ;; 
                             59 .mdelete sll__d
                             60 .macro sll__d
                             61    .db #0xCB, #0x32  ;; Opcode for sll d
                             62 .endm
                             63 
                             64 ;; Macro: sll__e
                             65 ;;    Opcode for "SLL e" instruction
                             66 ;; 
                             67 .mdelete sll__e
                             68 .macro sll__e
                             69    .db #0xCB, #0x33  ;; Opcode for sll e
                             70 .endm
                             71 
                             72 ;; Macro: sll__h
                             73 ;;    Opcode for "SLL h" instruction
                             74 ;; 
                             75 .mdelete sll__h
                             76 .macro sll__h
                             77    .db #0xCB, #0x34  ;; Opcode for sll h
                             78 .endm
                             79 
                             80 ;; Macro: sll__l
                             81 ;;    Opcode for "SLL l" instruction
                             82 ;; 
                             83 .mdelete sll__l
                             84 .macro sll__l
                             85    .db #0xCB, #0x35  ;; Opcode for sll l
                             86 .endm
                             87 
                             88 ;; Macro: sll___hl_
                             89 ;;    Opcode for "SLL (hl)" instruction
                             90 ;; 
                             91 .mdelete sll___hl_
                             92 .macro sll___hl_
                             93    .db #0xCB, #0x36  ;; Opcode for sll (hl)
                             94 .endm
                             95 
                             96 ;; Macro: sll__a
                             97 ;;    Opcode for "SLL a" instruction
                             98 ;; 
                             99 .mdelete sll__a
                            100 .macro sll__a
                            101    .db #0xCB, #0x37  ;; Opcode for sll a
                            102 .endm
                            103 
                            104 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            105 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            106 ;; IXL Related Macros
                            107 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            108 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            109 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 40.
Hexadecimal [16-Bits]



                            110 ;; Macro: ld__ixl    Value
                            111 ;;    Opcode for "LD ixl, Value" instruction
                            112 ;;  
                            113 ;; Parameters:
                            114 ;;    Value - An inmediate 8-bits value that will be loaded into ixl
                            115 ;; 
                            116 .mdelete ld__ixl
                            117 .macro ld__ixl    Value 
                            118    .db #0xDD, #0x2E, Value  ;; Opcode for ld ixl, Value
                            119 .endm
                            120 
                            121 ;; Macro: ld__ixl_a
                            122 ;;    Opcode for "LD ixl, a" instruction
                            123 ;; 
                            124 .mdelete ld__ixl_a
                            125 .macro ld__ixl_a
                            126    .dw #0x6FDD  ;; Opcode for ld ixl, a
                            127 .endm
                            128 
                            129 ;; Macro: ld__ixl_b
                            130 ;;    Opcode for "LD ixl, B" instruction
                            131 ;; 
                            132 .mdelete ld__ixl_b
                            133 .macro ld__ixl_b
                            134    .dw #0x68DD  ;; Opcode for ld ixl, b
                            135 .endm
                            136 
                            137 ;; Macro: ld__ixl_c
                            138 ;;    Opcode for "LD ixl, C" instruction
                            139 ;; 
                            140 .mdelete ld__ixl_c
                            141 .macro ld__ixl_c
                            142    .dw #0x69DD  ;; Opcode for ld ixl, c
                            143 .endm
                            144 
                            145 ;; Macro: ld__ixl_d
                            146 ;;    Opcode for "LD ixl, D" instruction
                            147 ;; 
                            148 .mdelete ld__ixl_d
                            149 .macro ld__ixl_d
                            150    .dw #0x6ADD  ;; Opcode for ld ixl, d
                            151 .endm
                            152 
                            153 ;; Macro: ld__ixl_e
                            154 ;;    Opcode for "LD ixl, E" instruction
                            155 ;; 
                            156 .mdelete ld__ixl_e
                            157 .macro ld__ixl_e
                            158    .dw #0x6BDD  ;; Opcode for ld ixl, e
                            159 .endm
                            160 
                            161 ;; Macro: ld__ixl_ixh
                            162 ;;    Opcode for "LD ixl, IXH" instruction
                            163 ;; 
                            164 .mdelete  ld__ixl_ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 41.
Hexadecimal [16-Bits]



                            165 .macro ld__ixl_ixh
                            166    .dw #0x6CDD  ;; Opcode for ld ixl, ixh
                            167 .endm
                            168 
                            169 ;; Macro: ld__a_ixl
                            170 ;;    Opcode for "LD A, ixl" instruction
                            171 ;; 
                            172 .mdelete ld__a_ixl
                            173 .macro ld__a_ixl
                            174    .dw #0x7DDD  ;; Opcode for ld a, ixl
                            175 .endm
                            176 
                            177 ;; Macro: ld__b_ixl
                            178 ;;    Opcode for "LD B, ixl" instruction
                            179 ;; 
                            180 .mdelete ld__b_ixl
                            181 .macro ld__b_ixl
                            182    .dw #0x45DD  ;; Opcode for ld b, ixl
                            183 .endm
                            184 
                            185 ;; Macro: ld__c_ixl
                            186 ;;    Opcode for "LD c, ixl" instruction
                            187 ;; 
                            188 .mdelete ld__c_ixl
                            189 .macro ld__c_ixl
                            190    .dw #0x4DDD  ;; Opcode for ld c, ixl
                            191 .endm
                            192 
                            193 ;; Macro: ld__d_ixl
                            194 ;;    Opcode for "LD D, ixl" instruction
                            195 ;; 
                            196 .mdelete ld__d_ixl
                            197 .macro ld__d_ixl
                            198    .dw #0x55DD  ;; Opcode for ld d, ixl
                            199 .endm
                            200 
                            201 ;; Macro: ld__e_ixl
                            202 ;;    Opcode for "LD e, ixl" instruction
                            203 ;; 
                            204 .mdelete ld__e_ixl
                            205 .macro ld__e_ixl
                            206    .dw #0x5DDD  ;; Opcode for ld e, ixl
                            207 .endm
                            208 
                            209 ;; Macro: add__ixl
                            210 ;;    Opcode for "Add ixl" instruction
                            211 ;; 
                            212 .mdelete add__ixl
                            213 .macro add__ixl
                            214    .dw #0x85DD  ;; Opcode for add ixl
                            215 .endm
                            216 
                            217 ;; Macro: sub__ixl
                            218 ;;    Opcode for "SUB ixl" instruction
                            219 ;; 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 42.
Hexadecimal [16-Bits]



                            220 .mdelete sub__ixl
                            221 .macro sub__ixl
                            222    .dw #0x95DD  ;; Opcode for sub ixl
                            223 .endm
                            224 
                            225 ;; Macro: adc__ixl
                            226 ;;    Opcode for "ADC ixl" instruction
                            227 ;; 
                            228 .mdelete adc__ixl
                            229 .macro adc__ixl
                            230    .dw #0x8DDD  ;; Opcode for adc ixl
                            231 .endm
                            232 
                            233 ;; Macro: sbc__ixl
                            234 ;;    Opcode for "SBC ixl" instruction
                            235 ;; 
                            236 .mdelete sbc__ixl
                            237 .macro sbc__ixl
                            238    .dw #0x9DDD  ;; Opcode for sbc ixl
                            239 .endm
                            240 
                            241 ;; Macro: and__ixl
                            242 ;;    Opcode for "AND ixl" instruction
                            243 ;; 
                            244 .mdelete and__ixl
                            245 .macro and__ixl
                            246    .dw #0xA5DD  ;; Opcode for and ixl
                            247 .endm
                            248 
                            249 ;; Macro: or__ixl
                            250 ;;    Opcode for "OR ixl" instruction
                            251 ;; 
                            252 .mdelete or__ixl
                            253 .macro or__ixl
                            254    .dw #0xB5DD  ;; Opcode for or ixl
                            255 .endm
                            256 
                            257 ;; Macro: xor__ixl
                            258 ;;    Opcode for "XOR ixl" instruction
                            259 ;; 
                            260 .mdelete xor__ixl
                            261 .macro xor__ixl
                            262    .dw #0xADDD  ;; Opcode for xor ixl
                            263 .endm
                            264 
                            265 ;; Macro: cp__ixl
                            266 ;;    Opcode for "CP ixl" instruction
                            267 ;; 
                            268 .mdelete cp__ixl
                            269 .macro cp__ixl
                            270    .dw #0xBDDD  ;; Opcode for cp ixl
                            271 .endm
                            272 
                            273 ;; Macro: dec__ixl
                            274 ;;    Opcode for "DEC ixl" instruction
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 43.
Hexadecimal [16-Bits]



                            275 ;; 
                            276 .mdelete dec__ixl
                            277 .macro dec__ixl
                            278    .dw #0x2DDD  ;; Opcode for dec ixl
                            279 .endm
                            280 
                            281 ;; Macro: inc__ixl
                            282 ;;    Opcode for "INC ixl" instruction
                            283 ;; 
                            284 .mdelete inc__ixl
                            285 .macro inc__ixl
                            286    .dw #0x2CDD  ;; Opcode for inc ixl
                            287 .endm
                            288 
                            289 
                            290 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            291 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            292 ;; IXH Related Macros
                            293 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            294 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            295 
                            296 ;; Macro: ld__ixh    Value
                            297 ;;    Opcode for "LD IXH, Value" instruction
                            298 ;;  
                            299 ;; Parameters:
                            300 ;;    Value - An inmediate 8-bits value that will be loaded into IXH
                            301 ;; 
                            302 .mdelete  ld__ixh
                            303 .macro ld__ixh    Value 
                            304    .db #0xDD, #0x26, Value  ;; Opcode for ld ixh, Value
                            305 .endm
                            306 
                            307 ;; Macro: ld__ixh_a
                            308 ;;    Opcode for "LD IXH, a" instruction
                            309 ;; 
                            310 .mdelete ld__ixh_a
                            311 .macro ld__ixh_a
                            312    .dw #0x67DD  ;; Opcode for ld ixh, a
                            313 .endm
                            314 
                            315 ;; Macro: ld__ixh_b
                            316 ;;    Opcode for "LD IXH, B" instruction
                            317 ;; 
                            318 .mdelete ld__ixh_b
                            319 .macro ld__ixh_b
                            320    .dw #0x60DD  ;; Opcode for ld ixh, b
                            321 .endm
                            322 
                            323 ;; Macro: ld__ixh_c
                            324 ;;    Opcode for "LD IXH, C" instruction
                            325 ;; 
                            326 .mdelete ld__ixh_c
                            327 .macro ld__ixh_c
                            328    .dw #0x61DD  ;; Opcode for ld ixh, c
                            329 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 44.
Hexadecimal [16-Bits]



                            330 
                            331 ;; Macro: ld__ixh_d
                            332 ;;    Opcode for "LD IXH, D" instruction
                            333 ;; 
                            334 .mdelete ld__ixh_d
                            335 .macro ld__ixh_d
                            336    .dw #0x62DD  ;; Opcode for ld ixh, d
                            337 .endm
                            338 
                            339 ;; Macro: ld__ixh_e
                            340 ;;    Opcode for "LD IXH, E" instruction
                            341 ;; 
                            342 .mdelete ld__ixh_e
                            343 .macro ld__ixh_e
                            344    .dw #0x63DD  ;; Opcode for ld ixh, e
                            345 .endm
                            346 
                            347 ;; Macro: ld__ixh_ixl
                            348 ;;    Opcode for "LD IXH, IXL" instruction
                            349 ;; 
                            350 .mdelete ld__ixh_ixl
                            351 .macro ld__ixh_ixl
                            352    .dw #0x65DD  ;; Opcode for ld ixh, ixl
                            353 .endm
                            354 
                            355 ;; Macro: ld__a_ixh
                            356 ;;    Opcode for "LD A, IXH" instruction
                            357 ;; 
                            358 .mdelete ld__a_ixh
                            359 .macro ld__a_ixh
                            360    .dw #0x7CDD  ;; Opcode for ld a, ixh
                            361 .endm
                            362 
                            363 ;; Macro: ld__b_ixh
                            364 ;;    Opcode for "LD B, IXH" instruction
                            365 ;; 
                            366 .mdelete ld__b_ixh
                            367 .macro ld__b_ixh
                            368    .dw #0x44DD  ;; Opcode for ld b, ixh
                            369 .endm
                            370 
                            371 ;; Macro: ld__c_ixh
                            372 ;;    Opcode for "LD c, IXH" instruction
                            373 ;; 
                            374 .mdelete ld__c_ixh
                            375 .macro ld__c_ixh
                            376    .dw #0x4CDD  ;; Opcode for ld c, ixh
                            377 .endm
                            378 
                            379 ;; Macro: ld__d_ixh
                            380 ;;    Opcode for "LD D, IXH" instruction
                            381 ;; 
                            382 .mdelete ld__d_ixh
                            383 .macro ld__d_ixh
                            384    .dw #0x54DD  ;; Opcode for ld d, ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 45.
Hexadecimal [16-Bits]



                            385 .endm
                            386 
                            387 ;; Macro: ld__e_ixh
                            388 ;;    Opcode for "LD e, IXH" instruction
                            389 ;; 
                            390 .mdelete ld__e_ixh
                            391 .macro ld__e_ixh
                            392    .dw #0x5CDD  ;; Opcode for ld e, ixh
                            393 .endm
                            394 
                            395 ;; Macro: add__ixh
                            396 ;;    Opcode for "ADD IXH" instruction
                            397 ;; 
                            398 .mdelete add__ixh
                            399 .macro add__ixh
                            400    .dw #0x84DD  ;; Opcode for add ixh
                            401 .endm
                            402 
                            403 ;; Macro: sub__ixh
                            404 ;;    Opcode for "SUB IXH" instruction
                            405 ;; 
                            406 .mdelete sub__ixh
                            407 .macro sub__ixh
                            408    .dw #0x94DD  ;; Opcode for sub ixh
                            409 .endm
                            410 
                            411 ;; Macro: adc__ixh
                            412 ;;    Opcode for "ADC IXH" instruction
                            413 ;; 
                            414 .mdelete adc__ixh
                            415 .macro adc__ixh
                            416    .dw #0x8CDD  ;; Opcode for adc ixh
                            417 .endm
                            418 
                            419 ;; Macro: sbc__ixh
                            420 ;;    Opcode for "SBC IXH" instruction
                            421 ;; 
                            422 .mdelete sbc__ixh
                            423 .macro sbc__ixh
                            424    .dw #0x9CDD  ;; Opcode for sbc ixh
                            425 .endm
                            426 
                            427 ;; Macro: and__ixh
                            428 ;;    Opcode for "AND IXH" instruction
                            429 ;; 
                            430 .mdelete and__ixh
                            431 .macro and__ixh
                            432    .dw #0xA4DD  ;; Opcode for and ixh
                            433 .endm
                            434 
                            435 ;; Macro: or__ixh
                            436 ;;    Opcode for "OR IXH" instruction
                            437 ;; 
                            438 .mdelete or__ixh
                            439 .macro or__ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 46.
Hexadecimal [16-Bits]



                            440    .dw #0xB4DD  ;; Opcode for or ixh
                            441 .endm
                            442 
                            443 ;; Macro: xor__ixh
                            444 ;;    Opcode for "XOR IXH" instruction
                            445 ;; 
                            446 .mdelete xor__ixh
                            447 .macro xor__ixh
                            448    .dw #0xACDD  ;; Opcode for xor ixh
                            449 .endm
                            450 
                            451 ;; Macro: cp__ixh
                            452 ;;    Opcode for "CP IXH" instruction
                            453 ;; 
                            454 .mdelete cp__ixh
                            455 .macro cp__ixh
                            456    .dw #0xBCDD  ;; Opcode for cp ixh
                            457 .endm
                            458 
                            459 ;; Macro: dec__ixh
                            460 ;;    Opcode for "DEC IXH" instruction
                            461 ;; 
                            462 .mdelete dec__ixh
                            463 .macro dec__ixh
                            464    .dw #0x25DD  ;; Opcode for dec ixh
                            465 .endm
                            466 
                            467 ;; Macro: inc__ixh
                            468 ;;    Opcode for "INC IXH" instruction
                            469 ;; 
                            470 .mdelete inc__ixh
                            471 .macro inc__ixh
                            472    .dw #0x24DD  ;; Opcode for inc ixh
                            473 .endm
                            474 
                            475 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            476 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            477 ;; IYL Related Macros
                            478 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            479 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            480 
                            481 ;; Macro: ld__iyl    Value
                            482 ;;    Opcode for "LD iyl, Value" instruction
                            483 ;;  
                            484 ;; Parameters:
                            485 ;;    Value - An inmediate 8-bits value that will be loaded into iyl
                            486 ;; 
                            487 .mdelete  ld__iyl
                            488 .macro ld__iyl    Value 
                            489    .db #0xFD, #0x2E, Value  ;; Opcode for ld iyl, Value
                            490 .endm
                            491 
                            492 ;; Macro: ld__iyl_a
                            493 ;;    Opcode for "LD iyl, a" instruction
                            494 ;; 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 47.
Hexadecimal [16-Bits]



                            495 .mdelete ld__iyl_a
                            496 .macro ld__iyl_a
                            497    .dw #0x6FFD  ;; Opcode for ld iyl, a
                            498 .endm
                            499 
                            500 ;; Macro: ld__iyl_b
                            501 ;;    Opcode for "LD iyl, B" instruction
                            502 ;; 
                            503 .mdelete ld__iyl_b
                            504 .macro ld__iyl_b
                            505    .dw #0x68FD  ;; Opcode for ld iyl, b
                            506 .endm
                            507 
                            508 ;; Macro: ld__iyl_c
                            509 ;;    Opcode for "LD iyl, C" instruction
                            510 ;; 
                            511 .mdelete ld__iyl_c
                            512 .macro ld__iyl_c
                            513    .dw #0x69FD  ;; Opcode for ld iyl, c
                            514 .endm
                            515 
                            516 ;; Macro: ld__iyl_d
                            517 ;;    Opcode for "LD iyl, D" instruction
                            518 ;; 
                            519 .mdelete ld__iyl_d
                            520 .macro ld__iyl_d
                            521    .dw #0x6AFD  ;; Opcode for ld iyl, d
                            522 .endm
                            523 
                            524 ;; Macro: ld__iyl_e
                            525 ;;    Opcode for "LD iyl, E" instruction
                            526 ;; 
                            527 .mdelete ld__iyl_e
                            528 .macro ld__iyl_e
                            529    .dw #0x6BFD  ;; Opcode for ld iyl, e
                            530 .endm
                            531 
                            532 ;; Macro: ld__iyl_iyh
                            533 ;;    Opcode for "LD iyl, IXL" instruction
                            534 ;; 
                            535 .mdelete  ld__iyl_iyh
                            536 .macro ld__iyl_iyh
                            537    .dw #0x6CFD  ;; Opcode for ld iyl, ixl
                            538 .endm
                            539 
                            540 ;; Macro: ld__a_iyl
                            541 ;;    Opcode for "LD A, iyl" instruction
                            542 ;; 
                            543 .mdelete ld__a_iyl
                            544 .macro ld__a_iyl
                            545    .dw #0x7DFD  ;; Opcode for ld a, iyl
                            546 .endm
                            547 
                            548 ;; Macro: ld__b_iyl
                            549 ;;    Opcode for "LD B, iyl" instruction
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 48.
Hexadecimal [16-Bits]



                            550 ;; 
                            551 .mdelete ld__b_iyl
                            552 .macro ld__b_iyl
                            553    .dw #0x45FD  ;; Opcode for ld b, iyl
                            554 .endm
                            555 
                            556 ;; Macro: ld__c_iyl
                            557 ;;    Opcode for "LD c, iyl" instruction
                            558 ;; 
                            559 .mdelete ld__c_iyl
                            560 .macro ld__c_iyl
                            561    .dw #0x4DFD  ;; Opcode for ld c, iyl
                            562 .endm
                            563 
                            564 ;; Macro: ld__d_iyl
                            565 ;;    Opcode for "LD D, iyl" instruction
                            566 ;; 
                            567 .mdelete ld__d_iyl
                            568 .macro ld__d_iyl
                            569    .dw #0x55FD  ;; Opcode for ld d, iyl
                            570 .endm
                            571 
                            572 ;; Macro: ld__e_iyl
                            573 ;;    Opcode for "LD e, iyl" instruction
                            574 ;; 
                            575 .mdelete ld__e_iyl
                            576 .macro ld__e_iyl
                            577    .dw #0x5DFD  ;; Opcode for ld e, iyl
                            578 .endm
                            579 
                            580 ;; Macro: add__iyl
                            581 ;;    Opcode for "Add iyl" instruction
                            582 ;; 
                            583 .mdelete add__iyl
                            584 .macro add__iyl
                            585    .dw #0x85FD  ;; Opcode for add iyl
                            586 .endm
                            587 
                            588 ;; Macro: sub__iyl
                            589 ;;    Opcode for "SUB iyl" instruction
                            590 ;; 
                            591 .mdelete sub__iyl
                            592 .macro sub__iyl
                            593    .dw #0x95FD  ;; Opcode for sub iyl
                            594 .endm
                            595 
                            596 ;; Macro: adc__iyl
                            597 ;;    Opcode for "ADC iyl" instruction
                            598 ;; 
                            599 .mdelete adc__iyl
                            600 .macro adc__iyl
                            601    .dw #0x8DFD  ;; Opcode for adc iyl
                            602 .endm
                            603 
                            604 ;; Macro: sbc__iyl
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 49.
Hexadecimal [16-Bits]



                            605 ;;    Opcode for "SBC iyl" instruction
                            606 ;; 
                            607 .mdelete sbc__iyl
                            608 .macro sbc__iyl
                            609    .dw #0x9DFD  ;; Opcode for sbc iyl
                            610 .endm
                            611 
                            612 ;; Macro: and__iyl
                            613 ;;    Opcode for "AND iyl" instruction
                            614 ;; 
                            615 .mdelete and__iyl
                            616 .macro and__iyl
                            617    .dw #0xA5FD  ;; Opcode for and iyl
                            618 .endm
                            619 
                            620 ;; Macro: or__iyl
                            621 ;;    Opcode for "OR iyl" instruction
                            622 ;; 
                            623 .mdelete or__iyl
                            624 .macro or__iyl
                            625    .dw #0xB5FD  ;; Opcode for or iyl
                            626 .endm
                            627 
                            628 ;; Macro: xor__iyl
                            629 ;;    Opcode for "XOR iyl" instruction
                            630 ;; 
                            631 .mdelete xor__iyl
                            632 .macro xor__iyl
                            633    .dw #0xADFD  ;; Opcode for xor iyl
                            634 .endm
                            635 
                            636 ;; Macro: cp__iyl
                            637 ;;    Opcode for "CP iyl" instruction
                            638 ;; 
                            639 .mdelete cp__iyl
                            640 .macro cp__iyl
                            641    .dw #0xBDFD  ;; Opcode for cp iyl
                            642 .endm
                            643 
                            644 ;; Macro: dec__iyl
                            645 ;;    Opcode for "DEC iyl" instruction
                            646 ;; 
                            647 .mdelete dec__iyl
                            648 .macro dec__iyl
                            649    .dw #0x2DFD  ;; Opcode for dec iyl
                            650 .endm
                            651 
                            652 ;; Macro: inc__iyl
                            653 ;;    Opcode for "INC iyl" instruction
                            654 ;; 
                            655 .mdelete inc__iyl
                            656 .macro inc__iyl
                            657    .dw #0x2CFD  ;; Opcode for inc iyl
                            658 .endm
                            659 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 50.
Hexadecimal [16-Bits]



                            660 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            661 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            662 ;; IYH Related Macros
                            663 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            664 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            665 
                            666 ;; Macro: ld__iyh    Value
                            667 ;;    Opcode for "LD iyh, Value" instruction
                            668 ;;  
                            669 ;; Parameters:
                            670 ;;    Value - An inmediate 8-bits value that will be loaded into iyh
                            671 ;; 
                            672 .mdelete  ld__iyh
                            673 .macro ld__iyh    Value 
                            674    .db #0xFD, #0x26, Value  ;; Opcode for ld iyh, Value
                            675 .endm
                            676 
                            677 ;; Macro: ld__iyh_a
                            678 ;;    Opcode for "LD iyh, a" instruction
                            679 ;; 
                            680 .mdelete ld__iyh_a
                            681 .macro ld__iyh_a
                            682    .dw #0x67FD  ;; Opcode for ld iyh, a
                            683 .endm
                            684 
                            685 ;; Macro: ld__iyh_b
                            686 ;;    Opcode for "LD iyh, B" instruction
                            687 ;; 
                            688 .mdelete ld__iyh_b
                            689 .macro ld__iyh_b
                            690    .dw #0x60FD  ;; Opcode for ld iyh, b
                            691 .endm
                            692 
                            693 ;; Macro: ld__iyh_c
                            694 ;;    Opcode for "LD iyh, C" instruction
                            695 ;; 
                            696 .mdelete ld__iyh_c
                            697 .macro ld__iyh_c
                            698    .dw #0x61FD  ;; Opcode for ld iyh, c
                            699 .endm
                            700 
                            701 ;; Macro: ld__iyh_d
                            702 ;;    Opcode for "LD iyh, D" instruction
                            703 ;; 
                            704 .mdelete ld__iyh_d
                            705 .macro ld__iyh_d
                            706    .dw #0x62FD  ;; Opcode for ld iyh, d
                            707 .endm
                            708 
                            709 ;; Macro: ld__iyh_e
                            710 ;;    Opcode for "LD iyh, E" instruction
                            711 ;; 
                            712 .mdelete ld__iyh_e
                            713 .macro ld__iyh_e
                            714    .dw #0x63FD  ;; Opcode for ld iyh, e
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 51.
Hexadecimal [16-Bits]



                            715 .endm
                            716 
                            717 ;; Macro: ld__iyh_iyl
                            718 ;;    Opcode for "LD iyh, IyL" instruction
                            719 ;; 
                            720 .mdelete  ld__iyh_iyl
                            721 .macro ld__iyh_iyl
                            722    .dw #0x65FD  ;; Opcode for ld iyh, iyl
                            723 .endm
                            724 
                            725 ;; Macro: ld__a_iyh
                            726 ;;    Opcode for "LD A, iyh" instruction
                            727 ;; 
                            728 .mdelete ld__a_iyh
                            729 .macro ld__a_iyh
                            730    .dw #0x7CFD  ;; Opcode for ld a, iyh
                            731 .endm
                            732 
                            733 ;; Macro: ld__b_iyh
                            734 ;;    Opcode for "LD B, iyh" instruction
                            735 ;; 
                            736 .mdelete ld__b_iyh
                            737 .macro ld__b_iyh
                            738    .dw #0x44FD  ;; Opcode for ld b, iyh
                            739 .endm
                            740 
                            741 ;; Macro: ld__c_iyh
                            742 ;;    Opcode for "LD c, iyh" instruction
                            743 ;; 
                            744 .mdelete ld__c_iyh
                            745 .macro ld__c_iyh
                            746    .dw #0x4CFD  ;; Opcode for ld c, iyh
                            747 .endm
                            748 
                            749 ;; Macro: ld__d_iyh
                            750 ;;    Opcode for "LD D, iyh" instruction
                            751 ;; 
                            752 .mdelete ld__d_iyh
                            753 .macro ld__d_iyh
                            754    .dw #0x54FD  ;; Opcode for ld d, iyh
                            755 .endm
                            756 
                            757 ;; Macro: ld__e_iyh
                            758 ;;    Opcode for "LD e, iyh" instruction
                            759 ;; 
                            760 .mdelete ld__e_iyh
                            761 .macro ld__e_iyh
                            762    .dw #0x5CFD  ;; Opcode for ld e, iyh
                            763 .endm
                            764 
                            765 ;; Macro: add__iyh
                            766 ;;    Opcode for "Add iyh" instruction
                            767 ;; 
                            768 .mdelete add__iyh
                            769 .macro add__iyh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 52.
Hexadecimal [16-Bits]



                            770    .dw #0x84FD  ;; Opcode for add iyh
                            771 .endm
                            772 
                            773 ;; Macro: sub__iyh
                            774 ;;    Opcode for "SUB iyh" instruction
                            775 ;; 
                            776 .mdelete sub__iyh
                            777 .macro sub__iyh
                            778    .dw #0x94FD  ;; Opcode for sub iyh
                            779 .endm
                            780 
                            781 ;; Macro: adc__iyh
                            782 ;;    Opcode for "ADC iyh" instruction
                            783 ;; 
                            784 .mdelete adc__iyh
                            785 .macro adc__iyh
                            786    .dw #0x8CFD  ;; Opcode for adc iyh
                            787 .endm
                            788 
                            789 ;; Macro: sbc__iyh
                            790 ;;    Opcode for "SBC iyh" instruction
                            791 ;; 
                            792 .mdelete sbc__iyh
                            793 .macro sbc__iyh
                            794    .dw #0x9CFD  ;; Opcode for sbc iyh
                            795 .endm
                            796 
                            797 ;; Macro: and__iyh
                            798 ;;    Opcode for "AND iyh" instruction
                            799 ;; 
                            800 .mdelete and__iyh
                            801 .macro and__iyh
                            802    .dw #0xA4FD  ;; Opcode for and iyh
                            803 .endm
                            804 
                            805 ;; Macro: or__iyh
                            806 ;;    Opcode for "OR iyh" instruction
                            807 ;; 
                            808 .mdelete or__iyh
                            809 .macro or__iyh
                            810    .dw #0xB4FD  ;; Opcode for or iyh
                            811 .endm
                            812 
                            813 ;; Macro: xor__iyh
                            814 ;;    Opcode for "XOR iyh" instruction
                            815 ;; 
                            816 .mdelete xor__iyh
                            817 .macro xor__iyh
                            818    .dw #0xACFD  ;; Opcode for xor iyh
                            819 .endm
                            820 
                            821 ;; Macro: cp__iyh
                            822 ;;    Opcode for "CP iyh" instruction
                            823 ;; 
                            824 .mdelete cp__iyh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 53.
Hexadecimal [16-Bits]



                            825 .macro cp__iyh
                            826    .dw #0xBCFD  ;; Opcode for cp iyh
                            827 .endm
                            828 
                            829 ;; Macro: dec__iyh
                            830 ;;    Opcode for "DEC iyh" instruction
                            831 ;; 
                            832 .mdelete dec__iyh
                            833 .macro dec__iyh
                            834    .dw #0x25FD  ;; Opcode for dec iyh
                            835 .endm
                            836 
                            837 ;; Macro: inc__iyh
                            838 ;;    Opcode for "INC iyh" instruction
                            839 ;; 
                            840 .mdelete inc__iyh
                            841 .macro inc__iyh
                            842    .dw #0x24FD  ;; Opcode for inc iyh
                            843 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 54.
Hexadecimal [16-Bits]



                             27 
                             28 ;; Macro: ld__hl_de
                             29 ;;    Copy DE to HL, using 2 instructions
                             30 ;; COST: 2 us (8 CPU Cycles)
                             31 ;; 
                             32 .macro ld__hl_de
                             33    ;; LD HL, DE
                             34    ;;------------
                             35    ld h, d
                             36    ld l, e
                             37    ;;------------
                             38 .endm
                             39 
                             40 ;; Macro: ld__de_hl
                             41 ;;    Copy HL to DE, using 2 instructions (ld d, h : ld e, l)
                             42 ;; COST: 2 us (8 CPU Cycles)
                             43 ;; 
                             44 .macro ld__de_hl
                             45    ;; LD DE, HL
                             46    ;;------------
                             47    ld d, h
                             48    ld e, l
                             49    ;;------------
                             50 .endm
                             51 
                             52 ;; Macro: ld__de_ix
                             53 ;;    Copy IX to DE, using 2 instructions (ld e, ixl : ld d, ixh)
                             54 ;; COST: 4 us (16 CPU Cycles)
                             55 ;; 
                             56 .macro ld__de_ix
                             57    ;; LD DE, IX
                             58    ;;------------
                             59    ld__e_ixl
                             60    ld__d_ixh
                             61    ;;------------
                             62 .endm
                             63 
                             64 ;; Macro: ld__bc_ix
                             65 ;;    Copy IX to BC, using 2 instructions (ld c, ixl : ld b, ixh)
                             66 ;; COST: 4 us (16 CPU Cycles)
                             67 ;; 
                             68 .macro ld__bc_ix
                             69    ;; LD BC, IX
                             70    ;;------------
                             71    ld__c_ixl
                             72    ld__b_ixh
                             73    ;;------------
                             74 .endm
                             75 
                             76 ;; Macro: ld__hl_ix
                             77 ;;    Copy IX to HL, using 4 instructions. 
                             78 ;;    Modifies A Register
                             79 ;; COST: 6 us (24 CPU Cycles)
                             80 ;; 
                             81 .macro ld__hl_ix
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 55.
Hexadecimal [16-Bits]



                             82    ;; LD HL, IX
                             83    ;;------------
                             84    ld__a_ixl
                             85    ld  l, a
                             86    ld__a_ixh
                             87    ld  h, a
                             88    ;;------------
                             89 .endm
                             90 
                             91 ;; Macro: ld__ix_de
                             92 ;;    Copy DE to IX, using 2 instructions (ld ixl, e : ld ixh, d)
                             93 ;; COST: 4 us (16 CPU Cycles)
                             94 ;; 
                             95 .macro ld__ix_de
                             96    ;; LD IX, DE
                             97    ;;------------
                             98    ld__ixl_e
                             99    ld__ixh_d
                            100    ;;------------
                            101 .endm
                            102 
                            103 ;; Macro: ld__ix_bc
                            104 ;;    Copy BX to IX, using 2 instructions (ld ixl, c : ld ixh, b)
                            105 ;; COST: 4 us (16 CPU Cycles)
                            106 ;; 
                            107 .macro ld__ix_bc
                            108    ;; LD IX, BC
                            109    ;;------------
                            110    ld__ixl_c
                            111    ld__ixh_b
                            112    ;;------------
                            113 .endm
                            114 
                            115 ;; Macro: ld__ix_hl
                            116 ;;    Copy HL to IX, using 4 instructions. 
                            117 ;;    Modifies A Register
                            118 ;; COST: 6 us (24 CPU Cycles)
                            119 ;; 
                            120 .macro ld__ix_hl
                            121    ;; LD IX, HL
                            122    ;;------------
                            123    ld  a, l
                            124    ld__ixl_a
                            125    ld  a, h
                            126    ld__ixh_a
                            127    ;;------------
                            128 .endm
                            129 
                            130 ;; Macro: ld__de_iy
                            131 ;;    Copy IY to DE, using 2 instructions (ld e, iyl : ld d, iyh)
                            132 ;; COST: 4 us (16 CPU Cycles)
                            133 ;; 
                            134 .macro ld__de_iy
                            135    ;; LD DE, IY
                            136    ;;------------
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 56.
Hexadecimal [16-Bits]



                            137    ld__e_iyl
                            138    ld__d_iyh
                            139    ;;------------
                            140 .endm
                            141 
                            142 ;; Macro: ld__bc_iy
                            143 ;;    Copy IY to BC, using 2 instructions (ld c, iyl : ld b, iyh)
                            144 ;; COST: 4 us (16 CPU Cycles)
                            145 ;; 
                            146 .macro ld__bc_iy
                            147    ;; LD BC, IY
                            148    ;;------------
                            149    ld__c_iyl
                            150    ld__b_iyh
                            151    ;;------------
                            152 .endm
                            153 
                            154 ;; Macro: ld__hl_iy
                            155 ;;    Copy IY to HL, using 4 instructions. 
                            156 ;;    Modifies A Register
                            157 ;; COST: 6 us (24 CPU Cycles)
                            158 ;; 
                            159 .macro ld__hl_iy
                            160    ;; LD HL, IY
                            161    ;;------------
                            162    ld__a_iyl
                            163    ld  l, a
                            164    ld__a_iyh
                            165    ld  h, a
                            166    ;;------------
                            167 .endm
                            168 
                            169 ;; Macro: ld__iy_de
                            170 ;;    Copy DE to IY, using 2 instructions (ld iyl, e : ld iyh, d)
                            171 ;; COST: 4 us (16 CPU Cycles)
                            172 ;; 
                            173 .macro ld__iy_de
                            174    ;; LD IY, DE
                            175    ;;------------
                            176    ld__iyl_e
                            177    ld__iyh_d
                            178    ;;------------
                            179 .endm
                            180 
                            181 ;; Macro: ld__iy_bc
                            182 ;;    Copy BX to IY, using 2 instructions (ld iyl, c : ld iyh, b)
                            183 ;; COST: 4 us (16 CPU Cycles)
                            184 ;; 
                            185 .macro ld__iy_bc
                            186    ;; LD IY, BC
                            187    ;;------------
                            188    ld__iyl_c
                            189    ld__iyh_b
                            190    ;;------------
                            191 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 57.
Hexadecimal [16-Bits]



                            192 
                            193 ;; Macro: ld__iy_hl
                            194 ;;    Copy HL to IY, using 4 instructions. 
                            195 ;;    Modifies A Register
                            196 ;; COST: 6 us (24 CPU Cycles)
                            197 ;; 
                            198 .macro ld__iy_hl
                            199    ;; LD IY, HL
                            200    ;;------------
                            201    ld  a, l
                            202    ld__iyl_a
                            203    ld  a, h
                            204    ld__iyh_a
                            205    ;;------------
                            206 .endm
                            207 
                            208 ;; Macro: ld__ix_iy
                            209 ;;    Copy IY to IX, using 4 instructions. 
                            210 ;;    Modifies A Register
                            211 ;; Cost: 8 us (32 CPU Cycles)
                            212 ;; 
                            213 .macro ld__ix_iy
                            214    ;; LD IX, IY
                            215    ;;------------
                            216    ld__a_iyl
                            217    ld__ixl_a
                            218    ld__a_iyh
                            219    ld__ixh_a
                            220    ;;------------
                            221 .endm
                            222 
                            223 ;; Macro: ld__iy_ix
                            224 ;;    Copy IX to IY, using 4 instructions. 
                            225 ;;    Modifies A Register
                            226 ;; Cost: 8 us (32 CPU Cycles)
                            227 ;; 
                            228 .macro ld__iy_ix
                            229    ;; LD IY, IX
                            230    ;;------------
                            231    ld__a_ixl
                            232    ld__iyl_a
                            233    ld__a_ixh
                            234    ld__iyh_a
                            235    ;;------------
                            236 .endm
                            237 
                            238 ;; Macro: ex__de_ix
                            239 ;;    Swap DE with IX
                            240 ;;    Modifies A Register
                            241 ;; Cost: 10 us (40 CPU Cycles)
                            242 ;; 
                            243 .macro ex__de_ix
                            244    ;; EX DE, IX
                            245    ;;------------
                            246    ld a, e
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 58.
Hexadecimal [16-Bits]



                            247    ld__e_ixl
                            248    ld__ixl_a
                            249    ld a, d
                            250    ld__d_ixh
                            251    ld__ixh_a
                            252    ;;------------
                            253 .endm
                            254 
                            255 ;; Macro: ex__bc_ix
                            256 ;;    Swap BC with IX
                            257 ;;    Modifies A Register
                            258 ;; Cost: 10 us (40 CPU Cycles)
                            259 ;; 
                            260 .macro ex__bc_ix
                            261    ;; EX BC, IX
                            262    ;;------------
                            263    ld a, c
                            264    ld__c_ixl
                            265    ld__ixl_a
                            266    ld a, b
                            267    ld__b_ixh
                            268    ld__ixh_a
                            269    ;;------------
                            270 .endm
                            271 
                            272 ;; Macro: ex__hl_ix
                            273 ;;    Swap HL with IX
                            274 ;;    Uses 2 bytes on the stack for the swap
                            275 ;;    Modifies A register
                            276 ;; Cost: 15 us (60 CPU Cycles)
                            277 ;; 
                            278 .macro ex__hl_ix
                            279    ;; EX HL, IX
                            280    ;;------------
                            281    push  hl
                            282    ld__a_ixl
                            283    ld l, a
                            284    ld__a_ixh
                            285    ld h, a
                            286    pop   ix
                            287    ;;------------
                            288 .endm
                            289 
                            290 ;; Macro: ex__de_iy
                            291 ;;    Swap DE with IY
                            292 ;;    Modifies A Register
                            293 ;; Cost: 10 us (40 CPU Cycles)
                            294 ;; 
                            295 .macro ex__de_iy
                            296    ;; EX DE, IY
                            297    ;;------------
                            298    ld a, e
                            299    ld__e_iyl
                            300    ld__iyl_a
                            301    ld a, d
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 59.
Hexadecimal [16-Bits]



                            302    ld__d_iyh
                            303    ld__iyh_a
                            304    ;;------------
                            305 .endm
                            306 
                            307 ;; Macro: ex__bc_iy
                            308 ;;    Swap BC with IY
                            309 ;;    Modifies A Register
                            310 ;; Cost: 10 us (40 CPU Cycles)
                            311 ;; 
                            312 .macro ex__bc_iy
                            313    ;; EX BC, IY
                            314    ;;------------
                            315    ld a, c
                            316    ld__c_iyl
                            317    ld__iyl_a
                            318    ld a, b
                            319    ld__b_iyh
                            320    ld__iyh_a
                            321    ;;------------
                            322 .endm
                            323 
                            324 ;; Macro: ex__hl_iy
                            325 ;;    Swap HL with IY
                            326 ;;    Uses 2 bytes on the stack for the swap
                            327 ;;    Modifies A register
                            328 ;; Cost: 15 us (60 CPU Cycles)
                            329 ;; 
                            330 .macro ex__hl_iy
                            331    ;; EX HL, IY
                            332    ;;------------
                            333    push  hl
                            334    ld__a_iyl
                            335    ld l, a
                            336    ld__a_iyh
                            337    ld h, a
                            338    pop   iy
                            339    ;;------------
                            340 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 60.
Hexadecimal [16-Bits]



                             24 .include "macros/cpct_pushpop.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2020 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Push - Pop Macros
                             21 ;;
                             22 ;;    Useful macros to simplify push-pop save/restore operations
                             23 ;;
                             24 
                             25 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             26 ;; Macro: cpctm_push RO, R1, R2, R3, R4, R5
                             27 ;;
                             28 ;;    Pushes any given registers (up to 6) into the stack
                             29 ;;
                             30 ;; ASM Definition:
                             31 ;;    .macro <cpctm_push> R0, R1, R2, R3, R4, R5
                             32 ;;
                             33 ;; Parameters:
                             34 ;;    R0-R5 - Any number of 16-bit pushable registers, up to 6
                             35 ;;
                             36 ;; Details:
                             37 ;;    This macro converts the list of 16-bit registers given as parameters into a list
                             38 ;; of 'push' operations to push all of them into the stack. The registers are pushed
                             39 ;; into the stack in the same order as they are given in the parameter list.
                             40 ;;    The macro accepts any number of registers up to the maximum of 6 that are 
                             41 ;; predefined as parameters. However, you may use it with 1, 2, 3, 4 or 5 registers
                             42 ;; as parameters. There is no need to give the 6 parameters: only those given will 
                             43 ;; be considered.
                             44 ;;
                             45 ;; Modified Registers: 
                             46 ;;    none
                             47 ;;
                             48 ;; Required memory:
                             49 ;;    1 byte per register given (2 if they are IX or IY)
                             50 ;;
                             51 ;; Time Measures:
                             52 ;; (start code)
                             53 ;;  Case     | microSecs(us) | CPU Cycles
                             54 ;; ------------------------------------
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 61.
Hexadecimal [16-Bits]



                             55 ;;  Per Reg  |       4       |     16
                             56 ;; ------------------------------------
                             57 ;;  Per IX/IY|       5       |     20
                             58 ;; ------------------------------------
                             59 ;; (end code)
                             60 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             61 .macro cpctm_push r0, r1, r2, r3, r4, r5
                             62    .narg v
                             63    .if v
                             64    push r0
                             65    .if v-1
                             66    push r1
                             67    .if v-2
                             68    push r2
                             69    .if v-3
                             70    push r3
                             71    .if v-4
                             72    push r4
                             73    .if v-5
                             74    push r5
                             75    .else
                             76    .mexit
                             77    .endif
                             78    .else
                             79    .mexit
                             80    .endif
                             81    .else
                             82    .mexit
                             83    .endif
                             84    .else
                             85    .mexit
                             86    .endif
                             87    .else
                             88    .mexit
                             89    .endif
                             90    .else
                             91    .mexit
                             92    .endif
                             93 .endm
                             94 
                             95 
                             96 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             97 ;; Macro: cpctm_pop RO, R1, R2, R3, R4, R5
                             98 ;;
                             99 ;;    Pops any given registers (up to 6) from the stack
                            100 ;;
                            101 ;; ASM Definition:
                            102 ;;    .macro <cpctm_pop> R0, R1, R2, R3, R4, R5
                            103 ;;
                            104 ;; Parameters:
                            105 ;;    R0-R5 - Any number of 16-bit pushable/popable registers, up to 6
                            106 ;;
                            107 ;; Details:
                            108 ;;    This macro converts the list of 16-bit registers given as parameters into a list
                            109 ;; of 'pop' operations to pop all of them from the stack. The registers are poped
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 62.
Hexadecimal [16-Bits]



                            110 ;; in the same order as they are given in the parameter list.
                            111 ;;    The macro accepts any number of registers up to the maximum of 6 that are 
                            112 ;; predefined as parameters. However, you may use it with 1, 2, 3, 4 or 5 registers
                            113 ;; as parameters. There is no need to give the 6 parameters: only those given will 
                            114 ;; be considered.
                            115 ;;
                            116 ;; Modified Registers: 
                            117 ;;    R0, R1, R2, R3, R4, R5 (Those given as parameters are loaded from the stack)
                            118 ;;
                            119 ;; Required memory:
                            120 ;;    1 byte per register given (2 if they are IX or IY)
                            121 ;;
                            122 ;; Time Measures:
                            123 ;; (start code)
                            124 ;;  Case     | microSecs(us) | CPU Cycles
                            125 ;; ------------------------------------
                            126 ;;  Per Reg  |       3       |     12
                            127 ;; ------------------------------------
                            128 ;;  Per IX/IY|       5       |     20
                            129 ;; ------------------------------------
                            130 ;; (end code)
                            131 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            132 .macro cpctm_pop r0, r1, r2, r3, r4, r5
                            133    .narg v
                            134    .if v
                            135    pop r0
                            136    .if v-1
                            137    pop r1
                            138    .if v-2
                            139    pop r2
                            140    .if v-3
                            141    pop r3
                            142    .if v-4
                            143    pop r4
                            144    .if v-5
                            145    pop r5
                            146    .else
                            147    .mexit
                            148    .endif
                            149    .else
                            150    .mexit
                            151    .endif
                            152    .else
                            153    .mexit
                            154    .endif
                            155    .else
                            156    .mexit
                            157    .endif
                            158    .else
                            159    .mexit
                            160    .endif
                            161    .else
                            162    .mexit
                            163    .endif
                            164 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 63.
Hexadecimal [16-Bits]



                             25 .include "macros/cpct_luts.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2018 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: LUTs (Look-Up-Tables)
                             21 ;;
                             22 ;;    Useful macros for accessing and managing Look-Up-Tables
                             23 ;;
                             24 
                             25 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             26 ;; Macro: cpctm_lutget8
                             27 ;;
                             28 ;;    Gets a value from a 256-byte-max 8-bit table into A register
                             29 ;;
                             30 ;; Parameters:
                             31 ;;    Table         - Memory address where the 256-byte-max table starts. It can be 
                             32 ;;  either an hexadecimal, decimal or octal address, or a symbol (the table name).
                             33 ;;    TR1           - An 8-bits register from the set {B, D, H}
                             34 ;;    TR2           - An 8-bits register from the set {C, E, L}. This register must
                             35 ;;  match TR1 to form a valid 16-bits register (BC, DE or HL), as the register TR1'TR2
                             36 ;;  will be loaded with the address of the table, to be the base pointer.
                             37 ;; 
                             38 ;; Input Registers: 
                             39 ;;    A     - Index in the LUT to be accessed.
                             40 ;;
                             41 ;; Return Value:
                             42 ;;    A     - Value got from the LUT ( table[TR1'TR2 + A] )
                             43 ;;
                             44 ;; Details:
                             45 ;;    This macro gets a value from a table into the A register. The process is simple:
                             46 ;;
                             47 ;;    1. It loads the address of the table in the 16-bits register TR1'TR2
                             48 ;;    2. It adds the index (A) to TR1'TR2  (TR1'TR2 += A)
                             49 ;;    3. It loads into A register the byte pointed by TR1'TR2
                             50 ;;
                             51 ;; Modified Registers: 
                             52 ;;    AF, TR1, TR2
                             53 ;;
                             54 ;; Required memory:
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 64.
Hexadecimal [16-Bits]



                             55 ;;    9 bytes
                             56 ;;
                             57 ;; Time Measures:
                             58 ;; (start code)
                             59 ;;  Case | microSecs(us) | CPU Cycles
                             60 ;; ------------------------------------
                             61 ;;  Any  |      10       |     40
                             62 ;; ------------------------------------
                             63 ;; (end code)
                             64 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             65 
                             66 .macro cpctm_lutget8 Table, TR1, TR2
                             67     ld   TR1'TR2, #Table   ;; [3] TR1_TR2 points to the LUT
                             68     
                             69     ;; Compute TR1'TR2 += A
                             70     add  TR2               ;; [1] | TR2 += A
                             71     ld   TR2, a            ;; [1] |
                             72     sub  a                 ;; [1] A = 0 (preserving Carry Flag)
                             73     adc  TR1               ;; [1] | TR1 += Carry
                             74     ld   TR1, a            ;; [1] |
                             75 
                             76     ;; A = *(TR1_TR2 + A)
                             77     ld   a, (TR1'TR2)      ;; [2] A = Value stored at given index from the LUT 
                             78 .endm
                             79 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 65.
Hexadecimal [16-Bits]



                             26 
                             27 ;;//////////////////////////////////////////////////////////////////////
                             28 ;; Group: General Useful Macros
                             29 ;;//////////////////////////////////////////////////////////////////////
                             30 
                             31 ;;
                             32 ;; Macro: cpctm_produceHalts_asm
                             33 ;;
                             34 ;;   Produce a set of consecutive halt instructions in order to wait for 
                             35 ;; a given number of interrupts.
                             36 ;;
                             37 ;; C Definition:
                             38 ;;   .macro <cpctm_produceHalts_asm> *N*
                             39 ;;
                             40 ;; Input Parameters:
                             41 ;;   (_) N - Number of consecutive halts to be produced
                             42 ;;
                             43 ;; Known issues:
                             44 ;;    * *N* must be a constant expression that can evaluate to a number
                             45 ;; at compile time.
                             46 ;;    * If the code generated by this macro is executed with interrupts
                             47 ;; being disabled, your CPU will effectively hang forever.
                             48 ;;    * This macro can only be used from assembler code. For C callings
                             49 ;; use <cpctm_produceHalts> instead.
                             50 ;;
                             51 ;; Size of generated code:
                             52 ;;    * *N* bytes (1 byte each halt instruction produced)
                             53 ;;
                             54 ;; Time Measures:
                             55 ;;    * Time depends on the exact moment of execution and the status of
                             56 ;; interrupts. *N* interrupts will pass.
                             57 ;;
                             58 ;; Details:
                             59 ;;    This macro produces a set of *N* consecutive *halt* assembly 
                             60 ;; instructions. Each *halt* instruction stops de Z80 CPU until 
                             61 ;; an interrupt is received. Therefore, this waits for *N* interrupts
                             62 ;; to be produced. This can be used for waiting or synchronization 
                             63 ;; purposes.
                             64 ;;
                             65 ;;    Please, take into account that this is a macro, and not a function.
                             66 ;; Each time this macro is used in your code it will produce the requested
                             67 ;; amount of halts. That can produce more code than you effectively need.
                             68 ;; For a unique function that controls a loop of *halt* waiting use
                             69 ;; <cpct_waitHalts> instead.
                             70 ;;
                             71 ;;
                             72 .mdelete cpctm_produceHalts
                             73 .macro cpctm_produceHalts N
                             74    .rept N
                             75       halt
                             76    .endm
                             77 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 66.
Hexadecimal [16-Bits]



                             21 .include "keyboard/keyboard.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 .module cpct_keyboard
                             19 
                             20 ;;
                             21 ;; Constant: Key Definitions (asm)
                             22 ;;
                             23 ;;    Definitions of the KeyCodes required by <cpct_isKeyPressed> 
                             24 ;; function for assembler programs. These are 16-bit values that define 
                             25 ;; matrix line in the keyboard layout (Most Significant Byte) and bit to
                             26 ;; be tested in that matrix line status for the given key (Least Significant
                             27 ;; byte). Each matrix line in the keyboard returns a byte containing the
                             28 ;; status of 8 keys, 1 bit each.
                             29 ;;
                             30 ;; CPCtelera include file:
                             31 ;;    _keyboard/keyboard.h.s_
                             32 ;;
                             33 ;; Keycode constant names:
                             34 ;; (start code)
                             35 ;;  KeyCode | Constant        || KeyCode | Constant      || KeyCode |  Constant
                             36 ;; -------------------------------------------------------------------------------
                             37 ;;   0x0100 | Key_CursorUp    ||  0x0803 | Key_P         ||  0x4006 |  Key_B
                             38 ;;          |                 ||         |               ||     ''  |  Joy1_Fire3
                             39 ;;   0x0200 | Key_CursorRight ||  0x1003 | Key_SemiColon ||  0x8006 |  Key_V
                             40 ;;   0x0400 | Key_CursorDown  ||  0x2003 | Key_Colon     ||  0x0107 |  Key_4
                             41 ;;   0x0800 | Key_F9          ||  0x4003 | Key_Slash     ||  0x0207 |  Key_3
                             42 ;;   0x1000 | Key_F6          ||  0x8003 | Key_Dot       ||  0x0407 |  Key_E
                             43 ;;   0x2000 | Key_F3          ||  0x0104 | Key_0         ||  0x0807 |  Key_W
                             44 ;;   0x4000 | Key_Enter       ||  0x0204 | Key_9         ||  0x1007 |  Key_S
                             45 ;;   0x8000 | Key_FDot        ||  0x0404 | Key_O         ||  0x2007 |  Key_D
                             46 ;;   0x0101 | Key_CursorLeft  ||  0x0804 | Key_I         ||  0x4007 |  Key_C
                             47 ;;   0x0201 | Key_Copy        ||  0x1004 | Key_L         ||  0x8007 |  Key_X
                             48 ;;   0x0401 | Key_F7          ||  0x2004 | Key_K         ||  0x0108 |  Key_1
                             49 ;;   0x0801 | Key_F8          ||  0x4004 | Key_M         ||  0x0208 |  Key_2
                             50 ;;   0x1001 | Key_F5          ||  0x8004 | Key_Comma     ||  0x0408 |  Key_Esc
                             51 ;;   0x2001 | Key_F1          ||  0x0105 | Key_8         ||  0x0808 |  Key_Q
                             52 ;;   0x4001 | Key_F2          ||  0x0205 | Key_7         ||  0x1008 |  Key_Tab
                             53 ;;   0x8001 | Key_F0          ||  0x0405 | Key_U         ||  0x2008 |  Key_A
                             54 ;;   0x0102 | Key_Clr         ||  0x0805 | Key_Y         ||  0x4008 |  Key_CapsLock
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 67.
Hexadecimal [16-Bits]



                             55 ;;   0x0202 | Key_OpenBracket ||  0x1005 | Key_H         ||  0x8008 |  Key_Z
                             56 ;;   0x0402 | Key_Return      ||  0x2005 | Key_J         ||  0x0109 |  Joy0_Up
                             57 ;;   0x0802 | Key_CloseBracket||  0x4005 | Key_N         ||  0x0209 |  Joy0_Down
                             58 ;;   0x1002 | Key_F4          ||  0x8005 | Key_Space     ||  0x0409 |  Joy0_Left
                             59 ;;   0x2002 | Key_Shift       ||  0x0106 | Key_6         ||  0x0809 |  Joy0_Right
                             60 ;;          |                 ||     ''  | Joy1_Up       ||         |
                             61 ;;   0x4002 | Key_BackSlash   ||  0x0206 | Key_5         ||  0x1009 |  Joy0_Fire1
                             62 ;;          |                 ||     ''  | Joy1_Down     ||         |
                             63 ;;   0x8002 | Key_Control     ||  0x0406 | Key_R         ||  0x2009 |  Joy0_Fire2
                             64 ;;          |                 ||     ''  | Joy1_Left     ||         |
                             65 ;;   0x0103 | Key_Caret       ||  0x0806 | Key_T         ||  0x4009 |  Joy0_Fire3
                             66 ;;          |                 ||     ''  | Joy1 Right    ||
                             67 ;;   0x0203 | Key_Hyphen      ||  0x1006 | Key_G         ||  0x8009 |  Key_Del
                             68 ;;          |                 ||     ''  | Joy1_Fire1    ||
                             69 ;;   0x0403 | Key_At          ||  0x2006 | Key_F         ||
                             70 ;;          |                 ||     ''  | Joy1_Fire2    ||
                             71 ;; -------------------------------------------------------------------------------
                             72 ;;  Table 1. KeyCodes defined for each possible key, ordered by KeyCode
                             73 ;; (end)
                             74 ;;
                             75 
                             76 ;; Matrix Line 0x00
                     0100    77 Key_CursorUp     = #0x0100  ;; Bit 0 (01h) => | 0000 0001 |
                     0200    78 Key_CursorRight  = #0x0200  ;; Bit 1 (02h) => | 0000 0010 |
                     0400    79 Key_CursorDown   = #0x0400  ;; Bit 2 (04h) => | 0000 0100 |
                     0800    80 Key_F9           = #0x0800  ;; Bit 3 (08h) => | 0000 1000 |
                     1000    81 Key_F6           = #0x1000  ;; Bit 4 (10h) => | 0001 0000 |
                     2000    82 Key_F3           = #0x2000  ;; Bit 5 (20h) => | 0010 0000 |
                     4000    83 Key_Enter        = #0x4000  ;; Bit 6 (40h) => | 0100 0000 |
                     8000    84 Key_FDot         = #0x8000  ;; Bit 7 (80h) => | 1000 0000 |
                             85 ;; Matrix Line 0x01
                     0101    86 Key_CursorLeft   = #0x0101
                     0201    87 Key_Copy         = #0x0201
                     0401    88 Key_F7           = #0x0401
                     0801    89 Key_F8           = #0x0801
                     1001    90 Key_F5           = #0x1001
                     2001    91 Key_F1           = #0x2001
                     4001    92 Key_F2           = #0x4001
                     8001    93 Key_F0           = #0x8001
                             94 ;; Matrix Line 0x02
                     0102    95 Key_Clr          = #0x0102
                     0202    96 Key_OpenBracket  = #0x0202
                     0402    97 Key_Return       = #0x0402
                     0802    98 Key_CloseBracket = #0x0802
                     1002    99 Key_F4           = #0x1002
                     2002   100 Key_Shift        = #0x2002
                     4002   101 Key_BackSlash    = #0x4002
                     8002   102 Key_Control      = #0x8002
                            103 ;; Matrix Line 0x03
                     0103   104 Key_Caret        = #0x0103
                     0203   105 Key_Hyphen       = #0x0203
                     0403   106 Key_At           = #0x0403
                     0803   107 Key_P            = #0x0803
                     1003   108 Key_SemiColon    = #0x1003
                     2003   109 Key_Colon        = #0x2003
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 68.
Hexadecimal [16-Bits]



                     4003   110 Key_Slash        = #0x4003
                     8003   111 Key_Dot          = #0x8003
                            112 ;; Matrix Line 0x04
                     0104   113 Key_0            = #0x0104
                     0204   114 Key_9            = #0x0204
                     0404   115 Key_O            = #0x0404
                     0804   116 Key_I            = #0x0804
                     1004   117 Key_L            = #0x1004
                     2004   118 Key_K            = #0x2004
                     4004   119 Key_M            = #0x4004
                     8004   120 Key_Comma        = #0x8004
                            121 ;; Matrix Line 0x05
                     0105   122 Key_8            = #0x0105
                     0205   123 Key_7            = #0x0205
                     0405   124 Key_U            = #0x0405
                     0805   125 Key_Y            = #0x0805
                     1005   126 Key_H            = #0x1005
                     2005   127 Key_J            = #0x2005
                     4005   128 Key_N            = #0x4005
                     8005   129 Key_Space        = #0x8005
                            130 ;; Matrix Line 0x06
                     0106   131 Key_6            = #0x0106
                     0106   132 Joy1_Up          = #0x0106
                     0206   133 Key_5            = #0x0206
                     0206   134 Joy1_Down        = #0x0206
                     0406   135 Key_R            = #0x0406
                     0406   136 Joy1_Left        = #0x0406
                     0806   137 Key_T            = #0x0806
                     0806   138 Joy1_Right       = #0x0806
                     1006   139 Key_G            = #0x1006
                     1006   140 Joy1_Fire1       = #0x1006
                     2006   141 Key_F            = #0x2006
                     2006   142 Joy1_Fire2       = #0x2006
                     4006   143 Key_B            = #0x4006
                     4006   144 Joy1_Fire3       = #0x4006
                     8006   145 Key_V            = #0x8006
                            146 ;; Matrix Line 0x07
                     0107   147 Key_4            = #0x0107
                     0207   148 Key_3            = #0x0207
                     0407   149 Key_E            = #0x0407
                     0807   150 Key_W            = #0x0807
                     1007   151 Key_S            = #0x1007
                     2007   152 Key_D            = #0x2007
                     4007   153 Key_C            = #0x4007
                     8007   154 Key_X            = #0x8007
                            155 ;; Matrix Line 0x08
                     0108   156 Key_1            = #0x0108
                     0208   157 Key_2            = #0x0208
                     0408   158 Key_Esc          = #0x0408
                     0808   159 Key_Q            = #0x0808
                     1008   160 Key_Tab          = #0x1008
                     2008   161 Key_A            = #0x2008
                     4008   162 Key_CapsLock     = #0x4008
                     8008   163 Key_Z            = #0x8008
                            164 ;; Matrix Line 0x09
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 69.
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                     0109   165 Joy0_Up          = #0x0109
                     0209   166 Joy0_Down        = #0x0209
                     0409   167 Joy0_Left        = #0x0409
                     0809   168 Joy0_Right       = #0x0809
                     1009   169 Joy0_Fire1       = #0x1009
                     2009   170 Joy0_Fire2       = #0x2009
                     4009   171 Joy0_Fire3       = #0x4009
                     8009   172 Key_Del          = #0x8009
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 70.
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                             22 .include "video/videomode.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 .module cpct_video
                             19    
                             20 ;;
                             21 ;; Includes
                             22 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 71.
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                             23 .include "video/video_macros.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;//////////////////////////////////////////////////////////////////////
                             20 ;;//////////////////////////////////////////////////////////////////////
                             21 ;; File: Macros (asm)
                             22 ;;//////////////////////////////////////////////////////////////////////
                             23 ;;//////////////////////////////////////////////////////////////////////
                             24 
                             25 ;;//////////////////////////////////////////////////////////////////////
                             26 ;; Group: Video memory manipulation
                             27 ;;//////////////////////////////////////////////////////////////////////
                             28 
                             29 ;;
                             30 ;; Constant: CPCT_VMEM_START_ASM
                             31 ;;
                             32 ;;    The address where screen video memory starts by default in the Amstrad CPC.
                             33 ;;
                             34 ;;    This address is exactly 0xC000, and this macro represents this number but
                             35 ;; automatically converted to <u8>* (Pointer to unsigned byte). You can use this
                             36 ;; macro for any function requiring the start of video memory, like 
                             37 ;; <cpct_getScreenPtr>.
                             38 ;;
                     C000    39 CPCT_VMEM_START_ASM = 0xC000
                             40 
                             41 ;;
                             42 ;; Constants: Video Memory Pages
                             43 ;;
                             44 ;; Useful constants defining some typical Video Memory Pages to be used as 
                             45 ;; parameters for <cpct_setVideoMemoryPage>
                             46 ;;
                             47 ;; cpct_pageCO - Video Memory Page 0xC0 (0xC0··)
                             48 ;; cpct_page8O - Video Memory Page 0x80 (0x80··)
                             49 ;; cpct_page4O - Video Memory Page 0x40 (0x40··)
                             50 ;; cpct_page0O - Video Memory Page 0x00 (0x00··)
                             51 ;;
                     0030    52 cpct_pageC0_asm = 0x30
                     0020    53 cpct_page80_asm = 0x20
                     0010    54 cpct_page40_asm = 0x10
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 72.
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                     0000    55 cpct_page00_asm = 0x00
                             56 
                             57 ;;
                             58 ;; Macro: cpctm_memPage6_asm
                             59 ;;
                             60 ;;    Macro that encodes a video memory page in the 6 Least Significant bits (LSb)
                             61 ;; of a byte, required as parameter for <cpct_setVideoMemoryPage>. It loads resulting
                             62 ;; value into a given 8-bits register.
                             63 ;;
                             64 ;; ASM Definition:
                             65 ;; .macro <cpct_memPage6_asm> *REG8*, *PAGE*
                             66 ;;
                             67 ;; Parameters (1 byte):
                             68 ;; (__) REG8 - 8bits register where result will be loaded
                             69 ;; (1B) PAGE - Video memory page wanted 
                             70 ;;
                             71 ;; Known issues:
                             72 ;;   * This macro can only be used from assembler code. It is not accessible from 
                             73 ;; C scope. For C programs, please refer to <cpct_memPage6>
                             74 ;;   * This macro will work *only* with constant values, as its value needs to
                             75 ;; be calculated in compilation time. If fed with variable values, it will give 
                             76 ;; an assembler error.
                             77 ;;
                             78 ;; Destroyed Registers:
                             79 ;;    REG8
                             80 ;;
                             81 ;; Size of generated code:
                             82 ;;    2 bytes 
                             83 ;;
                             84 ;; Time Measures:
                             85 ;;    * 2 microseconds
                             86 ;;    * 8 CPU Cycles
                             87 ;;
                             88 ;; Details:
                             89 ;;  This is just a macro that shifts *PAGE* 2 bits to the right, to leave it
                             90 ;; with just 6 significant bits. For more information, check functions
                             91 ;; <cpct_setVideoMemoryPage> and <cpct_setVideoMemoryOffset>.
                             92 ;;
                             93 .macro cpctm_memPage6_asm REG8, PAGE 
                             94    ld REG8, #PAGE / 4      ;; [2] REG8 = PAGE/4
                             95 .endm
                             96 
                             97 ;;
                             98 ;; Macro: cpctm_screenPtr_asm
                             99 ;;
                            100 ;;    Macro that calculates the video memory location (byte pointer) of a 
                            101 ;; given pair of coordinates (*X*, *Y*). Value resulting from calculation 
                            102 ;; will be loaded into a 16-bits register.
                            103 ;;
                            104 ;; ASM Definition:
                            105 ;;    .macro <cpctm_screenPtr_asm> *REG16*, *VMEM*, *X*, *Y*
                            106 ;;
                            107 ;; Parameters:
                            108 ;;    (__) REG16 - 16-bits register where the resulting value will be loaded
                            109 ;;    (2B) VMEM  - Start of video memory buffer where (*X*, *Y*) coordinates will be calculated
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 73.
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                            110 ;;    (1B) X     - X Coordinate of the video memory location *in bytes* (*BEWARE! NOT in pixels!*)
                            111 ;;    (1B) Y     - Y Coordinate of the video memory location in pixels / bytes (they are same amount)
                            112 ;;
                            113 ;; Parameter Restrictions:
                            114 ;;    * *REG16* has to be a 16-bits register that can perform ld REG16, #value.
                            115 ;;    * *VMEM* will normally be the start of the video memory buffer where you want to 
                            116 ;; draw something. It could theoretically be any 16-bits value. 
                            117 ;;    * *X* must be in the range [0-79] for normal screen sizes (modes 0,1,2). Screen is
                            118 ;; always 80 bytes wide in these modes and this function is byte-aligned, so you have to 
                            119 ;; give it a byte coordinate (*NOT a pixel one!*).
                            120 ;;    * *Y* must be in the range [0-199] for normal screen sizes (modes 0,1,2). Screen is 
                            121 ;; always 200 pixels high in these modes. Pixels and bytes always coincide in vertical
                            122 ;; resolution, so this coordinate is the same in bytes that in pixels.
                            123 ;;    * If you give incorrect values to this function, the returned pointer could
                            124 ;; point anywhere in memory. This function will not cause any damage by itself, 
                            125 ;; but you may destroy important parts of your memory if you use its result to 
                            126 ;; write to memory, and you gave incorrect parameters by mistake. Take always
                            127 ;; care.
                            128 ;;
                            129 ;; Known issues:
                            130 ;;   * This macro can only be used from assembler code. It is not accessible from 
                            131 ;; C scope. For C programs, please refer to <cpct_getScreenPtr>
                            132 ;;   * This macro will work *only* with constant values, as calculations need to be 
                            133 ;; performed at assembler time.
                            134 ;;
                            135 ;; Destroyed Registers:
                            136 ;;    REG16
                            137 ;;
                            138 ;; Size of generated code:
                            139 ;;    3 bytes 
                            140 ;;
                            141 ;; Time Measures:
                            142 ;;    * 3 microseconds
                            143 ;;    * 12 CPU Cycles
                            144 ;;
                            145 ;; Details:
                            146 ;;    This macro does the same calculation than the function <cpct_getScreenPtr>. However,
                            147 ;; as it is a macro, if all 3 parameters (*VMEM*, *X*, *Y*) are constants, the calculation
                            148 ;; will be done at compile-time. This will free the binary from code or data, just putting in
                            149 ;; the result of this calculation (2 bytes with the resulting address). It is highly 
                            150 ;; recommended to use this macro instead of the function <cpct_getScreenPtr> when values
                            151 ;; involved are all constant. 
                            152 ;;
                            153 ;; Recommendations:
                            154 ;;    All constant values - Use this macro <cpctm_screenPtr_asm>
                            155 ;;    Any variable value  - Use the function <cpct_getScreenPtr>
                            156 ;;
                            157 .macro cpctm_screenPtr_asm REG16, VMEM, X, Y 
                            158    ld REG16, #VMEM + 80 * (Y / 8) + 2048 * (Y & 7) + X   ;; [3] REG16 = screenPtr
                            159 .endm
                            160 
                            161 ;;
                            162 ;; Macro: cpctm_screenPtrSym_asm
                            163 ;;
                            164 ;;    Macro that calculates the video memory location (byte pointer) of a 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 74.
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                            165 ;; given pair of coordinates (*X*, *Y*). Value resulting from calculation 
                            166 ;; will be assigned to the given ASZ80 local symbol.
                            167 ;;
                            168 ;; ASM Definition:
                            169 ;;    .macro <cpctm_screenPtr_asm> *SYM*, *VMEM*, *X*, *Y*
                            170 ;;
                            171 ;; Parameters:
                            172 ;;    (__) SYM   - ASZ80 local symbol to assign the result from the calculation to
                            173 ;;    (2B) VMEM  - Start of video memory buffer where (*X*, *Y*) coordinates will be calculated
                            174 ;;    (1B) X     - X Coordinate of the video memory location *in bytes* (*BEWARE! NOT in pixels!*)
                            175 ;;    (1B) Y     - Y Coordinate of the video memory location in pixels / bytes (they are same amount)
                            176 ;;
                            177 ;; Parameter Restrictions:
                            178 ;;    * *SYM* need to be a valid symbol according to ASZ80 rules for symbols
                            179 ;;    * *VMEM* will normally be the start of the video memory buffer where you want to 
                            180 ;; draw something. It could theoretically be any 16-bits value. 
                            181 ;;    * *X* must be in the range [0-79] for normal screen sizes (modes 0,1,2). Screen is
                            182 ;; always 80 bytes wide in these modes and this function is byte-aligned, so you have to 
                            183 ;; give it a byte coordinate (*NOT a pixel one!*).
                            184 ;;    * *Y* must be in the range [0-199] for normal screen sizes (modes 0,1,2). Screen is 
                            185 ;; always 200 pixels high in these modes. Pixels and bytes always coincide in vertical
                            186 ;; resolution, so this coordinate is the same in bytes that in pixels.
                            187 ;;    * If you give incorrect values to this function, the returned pointer could
                            188 ;; point anywhere in memory. This function will not cause any damage by itself, 
                            189 ;; but you may destroy important parts of your memory if you use its result to 
                            190 ;; write to memory, and you gave incorrect parameters by mistake. Take always
                            191 ;; care.
                            192 ;;
                            193 ;; Known issues:
                            194 ;;   * This macro can only be used from assembler code. It is not accessible from 
                            195 ;; C scope. For C programs, please refer to <cpct_getScreenPtr>
                            196 ;;   * This macro will work *only* with constant values, as calculations need to be 
                            197 ;; performed at assembler time.
                            198 ;;
                            199 ;; Destroyed Registers:
                            200 ;;    none
                            201 ;;
                            202 ;; Size of generated code:
                            203 ;;    none (symbols are compile-time, do not generate code)
                            204 ;;
                            205 ;; Time Measures:
                            206 ;;    - not applicable -
                            207 ;;
                            208 ;; Details:
                            209 ;;    This macro does the same calculation than the function <cpct_getScreenPtr>. However,
                            210 ;; as it is a macro, and as its parameters (*VMEM*, *X*, *Y*) must be constants, the calculation
                            211 ;; will be performed at compile-time. This will free the binary from code or data, just putting in
                            212 ;; the result of this calculation (2 bytes with the resulting address). It is highly 
                            213 ;; recommended to use this macro instead of the function <cpct_getScreenPtr> when values
                            214 ;; involved are all constant. 
                            215 ;;
                            216 ;; Recommendations:
                            217 ;;    All constant values - Use this macro <cpctm_screenPtrSym_asm> or <cpctm_screenPtr_asm> 
                            218 ;;    Any variable value  - Use the function <cpct_getScreenPtr>
                            219 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 75.
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                            220 .macro cpctm_screenPtrSym_asm SYM, VMEM, X, Y 
                            221    SYM = #VMEM + 80 * (Y / 8) + 2048 * (Y & 7) + X 
                            222 .endm
                            223 
                            224 ;;
                            225 ;; Macro: cpctm_setCRTCReg
                            226 ;;
                            227 ;;    Macro that sets a new value for a given CRTC register.
                            228 ;;
                            229 ;; ASM Definition:
                            230 ;;    .macro <cpctm_setCRTCReg> *HEXREG*, *HEXVAL*
                            231 ;;
                            232 ;; Parameters:
                            233 ;;    (1B) HEXREG - New value to be set for the register (in hexadecimal)
                            234 ;;    (1B) HEXVAL - Number of the register to be set (in hexadecimal)
                            235 ;;
                            236 ;; Parameter Restrictions:
                            237 ;;    * *HEXREG* has to be an hexadecimal value from 00 to 1F
                            238 ;;    * *HEXVAL* has to be an hexadecimal value. Its valid range will depend
                            239 ;;          upon the selected register that will be modified. 
                            240 ;;
                            241 ;; Known issues:
                            242 ;;   * This macro can *only* be used from assembler code. It is not accessible from 
                            243 ;; C scope. 
                            244 ;;   * This macro can only be used with *constant values*. As given values are 
                            245 ;; concatenated with a number, they must also be hexadecimal numbers. If a 
                            246 ;; register or other value is given, this macro will not work.
                            247 ;;   * Using values out of range have unpredicted behaviour and can even 
                            248 ;; potentially cause damage to real Amstrad CPC monitors. Please, use with care.
                            249 ;;
                            250 ;; Destroyed Registers:
                            251 ;;    BC
                            252 ;;
                            253 ;; Size of generated code:
                            254 ;;    10 bytes 
                            255 ;;
                            256 ;; Time Measures:
                            257 ;;    * 14 microseconds
                            258 ;;    * 56 CPU Cycles
                            259 ;;
                            260 ;; Details:
                            261 ;;    This macro expands to two CRTC commands: Register selection and Register setting.
                            262 ;; It selects the register given as first parameter, then sets its new value to 
                            263 ;; that given as second parameter. Both given parameters must be of exactly 1 byte
                            264 ;; in size and the have to be provided in hexadecimal. This is due to the way
                            265 ;; that macro expansion and concatenation works. Given values will be concatenated
                            266 ;; with another 8-bit hexadecimal value to form a unique 16-bits hexadecimal value.
                            267 ;; Therefore, any parameter given will always be considered hexadecimal.
                            268 ;;
                            269 .macro cpctm_setCRTCReg_asm HEXREG, HEXVAL
                            270    ld    bc, #0xBC'HEXREG  ;; [3] B=0xBC CRTC Select Register, C=register number to be selected
                            271    out  (c), c             ;; [4] Select register
                            272    ld    bc, #0xBD'HEXVAL  ;; [3] B=0xBD CRTC Set Register, C=Value to be set
                            273    out  (c), c             ;; [4] Set the value
                            274 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 76.
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                            275 
                            276 ;;//////////////////////////////////////////////////////////////////////
                            277 ;; Group: Setting the border
                            278 ;;//////////////////////////////////////////////////////////////////////
                            279 
                            280 ;;
                            281 ;; Macro: cpctm_setBorder_asm
                            282 ;;
                            283 ;;   Changes the colour of the screen border.
                            284 ;;
                            285 ;; ASM Definition:
                            286 ;;   .macro <cpctm_setBorder_asm> HWC 
                            287 ;;
                            288 ;; Input Parameters (1 Byte):
                            289 ;;   (1B) HWC - Hardware colour value for the screen border in *hexadecimal [00-1B]*.
                            290 ;;
                            291 ;; Known issues:
                            292 ;;   * *Beware!* *HWC* colour value must be given in *hexadecimal*, as it is
                            293 ;; substituted in place, and must be in the range [00-1B].
                            294 ;;   * This macro can only be used from assembler code. It is not accessible from 
                            295 ;; C scope. For C programs, please refer to <cpct_setBorder>
                            296 ;;   * This macro will work *only* with constant values, as calculations need to be 
                            297 ;; performed at assembler time.
                            298 ;;
                            299 ;; Destroyed Registers:
                            300 ;;    AF, B, HL
                            301 ;;
                            302 ;; Size of generated code:
                            303 ;;    * 16 bytes 
                            304 ;;     6b - generated code
                            305 ;;    10b - cpct_setPALColour_asm code
                            306 ;;
                            307 ;; Time Measures:
                            308 ;;    * 28 microseconds
                            309 ;;    * 112 CPU Cycles
                            310 ;;
                            311 ;; Details:
                            312 ;;   This is not a real function, but an assembler macro. Beware of using it along
                            313 ;; with complex expressions or calculations, as it may expand in non-desired
                            314 ;; ways.
                            315 ;;
                            316 ;;   For more information, check the real function <cpct_setPALColour>, which
                            317 ;; is called when using <cpctm_setBorder_asm> (It is called using 16 as *pen*
                            318 ;; argument, which identifies the border).
                            319 ;;
                            320 .macro cpctm_setBorder_asm HWC
                            321    .radix h
                            322    cpctm_setBorder_raw_asm \HWC ;; [28] Macro that does the job, but requires a number value to be passed
                            323    .radix d
                            324 .endm
                            325 .macro cpctm_setBorder_raw_asm HWC
                            326    .globl cpct_setPALColour_asm
                            327    ld   hl, #0x'HWC'10         ;; [3]  H=Hardware value of desired colour, L=Border INK (16)
                            328    call cpct_setPALColour_asm  ;; [25] Set Palette colour of the border
                            329 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 77.
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                            330 
                            331 ;;//////////////////////////////////////////////////////////////////////
                            332 ;; Group: Screen clearing
                            333 ;;//////////////////////////////////////////////////////////////////////
                            334 
                            335 ;;
                            336 ;; Macro: cpctm_clearScreen_asm
                            337 ;;
                            338 ;;    Macro to simplify clearing the screen.
                            339 ;;
                            340 ;; ASM Definition:
                            341 ;;   .macro <cpctm_clearScreen_asm> COL
                            342 ;;
                            343 ;; Input Parameters (1 byte):
                            344 ;;   (1B) COL - Colour pattern to be used for screen clearing. 
                            345 ;;
                            346 ;; Parameters:
                            347 ;;    *COL* - Any 8-bits value or the A register are valid. Typically, a 0x00 is used 
                            348 ;; to fill up all the screen with 0's (firmware colour 0). However, you may use it in 
                            349 ;; combination with <cpct_px2byteM0>, <cpct_px2byteM1> or a manually created colour pattern.
                            350 ;;
                            351 ;; Known issues:
                            352 ;;   * This macro can only be used from assembler code. It is not accessible from 
                            353 ;; C scope. For C programs, please refer to <cpct_clearScreen>
                            354 ;;
                            355 ;; Details:
                            356 ;;   Fills up all the standard screen (range [0xC000-0xFFFF]) with *COL* byte, the colour 
                            357 ;; pattern given.
                            358 ;;
                            359 ;; Destroyed Registers:
                            360 ;;    BC, DE, HL
                            361 ;;
                            362 ;; Size of generated code:
                            363 ;;    13 bytes 
                            364 ;;
                            365 ;; Time Measures:
                            366 ;;    98309 microseconds (*4.924 VSYNCs* on a 50Hz display).
                            367 ;;    393236 CPU Cycles 
                            368 ;;
                            369 .macro cpctm_clearScreen_asm COL
                            370    ld    hl, #0xC000    ;; [3] HL Points to Start of Video Memory
                            371    ld    de, #0xC001    ;; [3] DE Points to the next byte
                            372    ld    bc, #0x4000    ;; [3] BC = 16384 bytes to be copied
                            373    ld   (hl), #COL      ;; [3] First Byte = given Colour
                            374    ldir                 ;; [98297] Perform the copy
                            375 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 78.
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                             24 .include "video/colours.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;//////////////////////////////////////////////////////////////////////
                             20 ;;//////////////////////////////////////////////////////////////////////
                             21 ;; File: Colours (asm)
                             22 ;;//////////////////////////////////////////////////////////////////////
                             23 ;;//////////////////////////////////////////////////////////////////////
                             24 ;;
                             25 ;;    Constants and utilities to manage the 27 colours from
                             26 ;; the CPC Palette comfortably in assembler.
                             27 ;;
                             28 ;;
                             29 
                             30 ;; Constant: Firmware colour values
                             31 ;;
                             32 ;;    Enumerates all 27 firmware colours for assembler programs
                             33 ;;
                             34 ;; Values:
                             35 ;; (start code)
                             36 ;;   [=================================================]
                             37 ;;   | Identifier        | Val| Identifier        | Val|
                             38 ;;   |-------------------------------------------------|
                             39 ;;   | FW_BLACK          |  0 | FW_BLUE           |  1 |
                             40 ;;   | FW_BRIGHT_BLUE    |  2 | FW_RED            |  3 |
                             41 ;;   | FW_MAGENTA        |  4 | FW_MAUVE          |  5 |
                             42 ;;   | FW_BRIGHT_RED     |  6 | FW_PURPLE         |  7 |
                             43 ;;   | FW_BRIGHT_MAGENTA |  8 | FW_GREEN          |  9 |
                             44 ;;   | FW_CYAN           | 10 | FW_SKY_BLUE       | 11 |
                             45 ;;   | FW_YELLOW         | 12 | FW_WHITE          | 13 |
                             46 ;;   | FW_PASTEL_BLUE    | 14 | FW_ORANGE         | 15 |
                             47 ;;   | FW_PINK           | 16 | FW_PASTEL_MAGENTA | 17 |
                             48 ;;   | FW_BRIGHT_GREEN   | 18 | FW_SEA_GREEN      | 19 |
                             49 ;;   | FW_BRIGHT_CYAN    | 20 | FW_LIME           | 21 |
                             50 ;;   | FW_PASTEL_GREEN   | 22 | FW_PASTEL_CYAN    | 23 |
                             51 ;;   | FW_BRIGHT_YELLOW  | 24 | FW_PASTEL_YELLOW  | 25 |
                             52 ;;   | FW_BRIGHT_WHITE   | 26 |                   |    |
                             53 ;;   [=================================================]
                             54 ;; (end code)
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 79.
Hexadecimal [16-Bits]



                             55 
                     0000    56 FW_BLACK          =  0
                     0001    57 FW_BLUE           =  1
                     0002    58 FW_BRIGHT_BLUE    =  2
                     0003    59 FW_RED            =  3
                     0004    60 FW_MAGENTA        =  4
                     0005    61 FW_MAUVE          =  5
                     0006    62 FW_BRIGHT_RED     =  6
                     0007    63 FW_PURPLE         =  7
                     0008    64 FW_BRIGHT_MAGENTA =  8
                     0009    65 FW_GREEN          =  9
                     000A    66 FW_CYAN           = 10
                     000B    67 FW_SKY_BLUE       = 11
                     000C    68 FW_YELLOW         = 12
                     000D    69 FW_WHITE          = 13
                     000E    70 FW_PASTEL_BLUE    = 14
                     000F    71 FW_ORANGE         = 15
                     0010    72 FW_PINK           = 16
                     0011    73 FW_PASTEL_MAGENTA = 17
                     0012    74 FW_BRIGHT_GREEN   = 18
                     0013    75 FW_SEA_GREEN      = 19
                     0014    76 FW_BRIGHT_CYAN    = 20
                     0015    77 FW_LIME           = 21
                     0016    78 FW_PASTEL_GREEN   = 22
                     0017    79 FW_PASTEL_CYAN    = 23
                     0018    80 FW_BRIGHT_YELLOW  = 24
                     0019    81 FW_PASTEL_YELLOW  = 25
                     001A    82 FW_BRIGHT_WHITE   = 26
                             83 
                             84 ;; Constant: Hardware colour values
                             85 ;;
                             86 ;;    Enumerates all 27 hardware colours for assembler programs
                             87 ;;
                             88 ;; Values:
                             89 ;; (start code)
                             90 ;;   [=====================================================]
                             91 ;;   | Identifier        | Value| Identifier        | Value|
                             92 ;;   |-----------------------------------------------------|
                             93 ;;   | HW_BLACK          | 0x14 | HW_BLUE           | 0x04 |
                             94 ;;   | HW_BRIGHT_BLUE    | 0x15 | HW_RED            | 0x1C |
                             95 ;;   | HW_MAGENTA        | 0x18 | HW_MAUVE          | 0x1D |
                             96 ;;   | HW_BRIGHT_RED     | 0x0C | HW_PURPLE         | 0x05 |
                             97 ;;   | HW_BRIGHT_MAGENTA | 0x0D | HW_GREEN          | 0x16 |
                             98 ;;   | HW_CYAN           | 0x06 | HW_SKY_BLUE       | 0x17 |
                             99 ;;   | HW_YELLOW         | 0x1E | HW_WHITE          | 0x00 |
                            100 ;;   | HW_PASTEL_BLUE    | 0x1F | HW_ORANGE         | 0x0E |
                            101 ;;   | HW_PINK           | 0x07 | HW_PASTEL_MAGENTA | 0x0F |
                            102 ;;   | HW_BRIGHT_GREEN   | 0x12 | HW_SEA_GREEN      | 0x02 |
                            103 ;;   | HW_BRIGHT_CYAN    | 0x13 | HW_LIME           | 0x1A |
                            104 ;;   | HW_PASTEL_GREEN   | 0x19 | HW_PASTEL_CYAN    | 0x1B |
                            105 ;;   | HW_BRIGHT_YELLOW  | 0x0A | HW_PASTEL_YELLOW  | 0x03 |
                            106 ;;   | HW_BRIGHT_WHITE   | 0x0B |                   |      |
                            107 ;;   [=====================================================]
                            108 ;; (end code)
                            109 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 80.
Hexadecimal [16-Bits]



                     0014   110 HW_BLACK          = 0x14
                     0004   111 HW_BLUE           = 0x04
                     0015   112 HW_BRIGHT_BLUE    = 0x15
                     001C   113 HW_RED            = 0x1C
                     0018   114 HW_MAGENTA        = 0x18
                     001D   115 HW_MAUVE          = 0x1D
                     000C   116 HW_BRIGHT_RED     = 0x0C
                     0005   117 HW_PURPLE         = 0x05
                     000D   118 HW_BRIGHT_MAGENTA = 0x0D
                     0016   119 HW_GREEN          = 0x16
                     0006   120 HW_CYAN           = 0x06
                     0017   121 HW_SKY_BLUE       = 0x17
                     001E   122 HW_YELLOW         = 0x1E
                     0000   123 HW_WHITE          = 0x00
                     001F   124 HW_PASTEL_BLUE    = 0x1F
                     000E   125 HW_ORANGE         = 0x0E
                     0007   126 HW_PINK           = 0x07
                     000F   127 HW_PASTEL_MAGENTA = 0x0F
                     0012   128 HW_BRIGHT_GREEN   = 0x12
                     0002   129 HW_SEA_GREEN      = 0x02
                     0013   130 HW_BRIGHT_CYAN    = 0x13
                     001A   131 HW_LIME           = 0x1A
                     0019   132 HW_PASTEL_GREEN   = 0x19
                     001B   133 HW_PASTEL_CYAN    = 0x1B
                     000A   134 HW_BRIGHT_YELLOW  = 0x0A
                     0003   135 HW_PASTEL_YELLOW  = 0x03
                     000B   136 HW_BRIGHT_WHITE   = 0x0B
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 81.
Hexadecimal [16-Bits]



                             25 
                             26 ;;
                             27 ;; Constant values
                             28 ;;
                     7F00    29 GA_port        = 0x7F00  ;; 16-bit Port of the Gate Array (for the use with BC register)
                     007F    30 GA_port_byte   = 0x7F    ;; 8-bit Port of the Gate Array
                     0000    31 PAL_PENR       = 0x00    ;; Command to select a PEN register in the PAL chip
                     0040    32 PAL_INKR       = 0x40    ;; Command to set the INK of a previously selected PEN register in the PAL chip
                     00F5    33 PPI_PORT_B     = 0xF5    ;; Port B of the PPI, used to read Vsync/Jumpers/PrinterBusy/CasIn/Exp information
                     00BC    34 CRTC_SELECTREG = 0xBC    ;; CRTC Port and command "Select Register"
                     00BD    35 CRTC_SETVAL    = 0xBD    ;; CRTC Port and command "Set Value"
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 82.
Hexadecimal [16-Bits]



                             23 .include "sprites/sprites.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;#####################################################################
                             20 ;;### MODULE: Sprites
                             21 ;;#####################################################################
                             22 ;;### Functions, macros and definitions used for managing sprites
                             23 ;;### in assembler code
                             24 ;;#####################################################################
                             25 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 83.
Hexadecimal [16-Bits]



                             26 .include "sprites/flipping/flipping_macros.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2018 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;#####################################################################
                             20 ;;### MODULE: Sprites
                             21 ;;### SUBMODULE: flipping.macros
                             22 ;;#####################################################################
                             23 ;;### Macros used to speed up calculations required for to assist
                             24 ;;### flipping functions. Assembler version.
                             25 ;;#####################################################################
                             26 
                             27 ;;
                             28 ;; Macro: cpctm_ld_spbloff
                             29 ;;
                             30 ;;    Macro that calculates the offset to add to a sprite pointer to point 
                             31 ;; to it sbottom left pixel.
                             32 ;;
                             33 ;; ASM Definition:
                             34 ;;    .macro <cpctm_ld_spbloff> *REG*, *W*, *H*
                             35 ;;
                             36 ;; Acronym stands for:
                             37 ;;    ld_sbloff = Load Sprite Bottom Left Offset
                             38 ;;
                             39 ;; Parameters:
                             40 ;;    (1-2B) REG - Register that will load the resulting offset (8 or 16 bits)
                             41 ;;    (1B) W     - Width of the sprite in *bytes*
                             42 ;;    (1B) H     - Height of the sprite in pixels
                             43 ;;
                             44 ;; Parameter Restrictions:
                             45 ;;    *REG* - Must be a valid 8/16 bits register that can be immediately loaded
                             46 ;; using ld REG, #immediate.
                             47 ;;    *W*   - Must be an immediate value representing the width of the sprite 
                             48 ;; in *bytes* (Beware! Not in pixels). For sprites having interlaced mask, you 
                             49 ;; may input 2 times the width of the sprite for appropriate results.
                             50 ;;    *H*   - Must be an immediate value representing the height of the sprite 
                             51 ;; in pixels.
                             52 ;;
                             53 ;; Returns:
                             54 ;; (start code)
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 84.
Hexadecimal [16-Bits]



                             55 ;;    REG = W * (H - 1) ;; Register loaded with the offset
                             56 ;; (end code)
                             57 ;;
                             58 ;; Details:
                             59 ;;    This macro calculates the offset of the initial byte of the last row 
                             60 ;; of a given sprite (i.e. its bottom-left byte), with respect to its first
                             61 ;; byte (top-left corner). This value can easily be added to any sprite 
                             62 ;; pointer to get a pointer to the bottom-left byte. This pointer is required
                             63 ;; byte many flipping functions (like <cpct_vflipSpriteM0>). Values for width
                             64 ;; and height of the sprite must be constant immediate values. Otherwise, this
                             65 ;; macro will generate incorrect code that will fail to compile. 
                             66 ;;    The macro calculates *W* * (*H*-1) at compile-time and loads it into
                             67 ;; the given register. Please, take into account that the macro does no check
                             68 ;; about the size of the resulting values. If multiplication results in a value
                             69 ;; greater than 255, you will need to load it into a 16-bit register. You must
                             70 ;; take care of the expected size of the offset value.
                             71 ;;
                             72 ;; Known issues:
                             73 ;;    * This is a assembler macro. It cannot be called or used from C code.
                             74 ;;
                             75 .macro cpctm_ld_spbloff REG, W, H
                             76    ld    REG, #W * (H-1)
                             77 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 85.
Hexadecimal [16-Bits]



                             27 .include "sprites/pixel_macros.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;-------------------------------------------------------------------------------
                             20 ;; Title: Pixel Macros (ASM)
                             21 ;;-------------------------------------------------------------------------------
                             22 
                             23 ;; Macro: CPCTM_PEN2PIXELPATTERN_M1_ASM
                             24 ;;
                             25 ;;    Similarly to the function <cpct_pen2pixelPatternM1>, creates 1 byte in Mode 1 
                             26 ;; screen pixel format containing a pattern with all 4 pixels in the same pen colour 
                             27 ;; as given by the argument *PEN*.
                             28 ;;
                             29 ;; ASM Definition:
                             30 ;;    .macro <CPCTM_PEN2PIXELPATTERN_M1_ASM> *SYM*, *PEN*
                             31 ;;
                             32 ;; Parameters:
                             33 ;;    SYM - Name of a symbol to assign the resulting value of the calculation
                             34 ;;    PEN - ([0-3], unsigned) Pen Colour from which create the pixel pattern
                             35 ;; 
                             36 ;; Known limitations:
                             37 ;;    * It does not perform any kind of checking. Values other than unsigned integers [0-3]
                             38 ;; will produce undefined behaviour.
                             39 ;;    * As this is an assembly macro, it will only work with constant values or symbols. It
                             40 ;; will produce assembly errors when used with other kind of values.
                             41 ;;
                             42 ;; Details:
                             43 ;;    This macro does the same operations the function <cpct_pen2pixelPatternM1> does, but
                             44 ;; with an explicit operation that can be calculated at compile-time, producing a single 
                             45 ;; precalculated byte in your final binary (if you use it with constant values).
                             46 ;;
                             47 ;;    For more details on this operations, consult <cpct_pen2pixelPatternM1> help.
                             48 ;;
                             49 ;; Use example:
                             50 ;; (start code)
                             51 ;;    ;// Simple function that changes the Skin Colour 
                             52 ;;    ;// of a given Alien Sprite into Cyan (Alien Skin is yellow normally)  
                             53 ;;    ;// HL = Pointer to Alien Sprite
                             54 ;;    ;// BC = Size of Alien Sprite
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 86.
Hexadecimal [16-Bits]



                             55 ;;    changeAlienSkinColourToCyan:
                             56 ;;       CPCTM_PEN2PIXELPATTERN_M1_ASM OldPen, 1 ;// Produces 'OldPen = 0xF0'
                             57 ;;       CPCTM_PEN2PIXELPATTERN_M1_ASM NewPen, 2 ;// Produces 'NewPen = 0x0F'
                             58 ;;       ld    de, #(OldPen << 8) | NewPen
                             59 ;;       call  cpct_spriteColourizeM1_asm
                             60 ;;       ret
                             61 ;;    
                             62 ;;    ;// Simple function that restores the Skin Colour 
                             63 ;;    ;// of a given Alien Sprite to yellow (after being changed to Cyan)  
                             64 ;;    ;// HL = Pointer to Alien Sprite
                             65 ;;    ;// BC = Size of Alien Sprite
                             66 ;;    restoreAlienSkinColourToYellow:
                             67 ;;       CPCTM_PEN2PIXELPATTERN_M1_ASM OldPen, 2 ;// Produces 'OldPen = 0x0F'
                             68 ;;       CPCTM_PEN2PIXELPATTERN_M1_ASM NewPen, 1 ;// Produces 'NewPen = 0xF0'
                             69 ;;       ld    de, #(OldPen << 8) | NewPen
                             70 ;;       call  cpct_spriteColourizeM1_asm
                             71 ;;       ret
                             72 ;; (end code)
                             73 ;;
                             74 .mdelete CPCTM_PEN2PIXELPATTERN_M1_ASM
                             75 .macro CPCTM_PEN2PIXELPATTERN_M1_ASM _Sym, _Pen
                             76    _Sym = ((((_Pen) & 1) << 7) | (((_Pen) & 1) << 6) | (((_Pen) & 1) << 5) | (((_Pen) & 1) << 4) | (((_Pen) & 2) << 2) | (((_Pen) & 2) << 1) | (((_Pen) & 2)     ) | (((_Pen) & 2) >> 1))
                             77 .endm  
                             78 
                             79 ;;
                             80 ;; Macro: CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM
                             81 ;;
                             82 ;;    Similarly to the function <cpct_pens2pixelPatternPairM1>, creates a 16 bits 
                             83 ;; value in Mode 1 screen pixel format, containing two pattern with all 4 pixels in 
                             84 ;; the same pen colour as given by the arguments *OldPen* and *NewPen*. 
                             85 ;;
                             86 ;; C Definition:
                             87 ;;    .macro <CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM> *SYM*, *OldPen*, *NewPen*
                             88 ;;
                             89 ;; Parameters:
                             90 ;;    SYM    - Name of a symbol to assign the resulting value of the calculation
                             91 ;;    OldPen - ([0-3], unsigned) Pen Colour to be found and replaced in <cpct_spriteColourizeM1>
                             92 ;;    NewPen - ([0-3], unsigned) New Pen Colour to be inserted in <cpct_spriteColourizeM1>
                             93 ;; 
                             94 ;; Known limitations:
                             95 ;;    * It does not perform any kind of checking. Values other than unsigned integers [0-3]
                             96 ;; will produce undefined behaviour.
                             97 ;;    * As this is a macro, this is designed only for CONSTANT values, to perform compile-time
                             98 ;; calculations. If you use it with variables, it will generate poor & slow code. Moreover, 
                             99 ;; generated code will be repeated if the macro is used multiple times, bloating your binary.
                            100 ;; Use <cpct_pen2pixelPatternM1> function for variables instead.
                            101 ;;
                            102 ;; Details:
                            103 ;;    This macro does the same operations the function <cpct_pens2pixelPatternPairM1> does, 
                            104 ;; but with an explicit operation that can be calculated at compile-time, producing a single 
                            105 ;; precalculated 16-bits value in your final binary (if you use it with constant values).
                            106 ;;
                            107 ;;    For more details on this operations, consult <cpct_pens2pixelPatternPairM1> help.
                            108 ;;
                            109 ;; Use example:
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 87.
Hexadecimal [16-Bits]



                            110 ;; (start code)
                            111 ;; ;// Simple function that changes the Skin Colour 
                            112 ;; ;// of a given Alien Sprite into Cyan (2) (Alien Skin is yellow (1) normally)  
                            113 ;; ;// HL = Pointer to Alien Sprite
                            114 ;; ;// BC = Size of Alien Sprite
                            115 ;; changeAlienSkinColourToCyan:
                            116 ;;    CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM rplcPat, 1, 2   ;// Change Pen 1 into Pen 2
                            117 ;;    ld    de, #rplcPat                                 ;// rplcPat = 0xF00F
                            118 ;;    call  cpct_spriteColourizeM1_asm
                            119 ;;    ret
                            120 ;;
                            121 ;; ;// Simple function that restores the Skin Colour 
                            122 ;; ;// of a given Alien Sprite to yellow (1) (after being changed to Cyan (2) )
                            123 ;; ;// HL = Pointer to Alien Sprite
                            124 ;; ;// BC = Size of Alien Sprite
                            125 ;; restoreAlienSkinColourToYellow:
                            126 ;;    CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM rplcPat, 2, 1   ;// Change Pen 2 into Pen 1
                            127 ;;    ld    de, #rplcPat                                 ;// rplcPat = 0x0FF0
                            128 ;;    call  cpct_spriteColourizeM1_asm
                            129 ;;    ret
                            130 ;; (end code)
                            131 ;;
                            132 .mdelete CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM
                            133 .macro CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM _Sym, _OldPen, _NewPen
                            134    CPCTM_PEN2PIXELPATTERN_M1_ASM _Sym'__h, _OldPen
                            135    CPCTM_PEN2PIXELPATTERN_M1_ASM _Sym'__l, _NewPen
                            136    _Sym = (_Sym'__h << 8) | _Sym'__l
                            137 .endm  
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 88.
Hexadecimal [16-Bits]



                             25 
                             26 ;; Teclado
                             27 
                             28 .globl cpct_scanKeyboard_f_asm
                             29 .globl cpct_isKeyPressed_asm
                             30 
                             31 
                             32 ;; Render
                             33 
                             34 .globl cpct_getScreenPtr_asm
                             35 .globl cpct_drawSolidBox_asm
                             36 .globl cpct_waitVSYNC_asm
                             37 
                             38 ;; Video
                             39 
                             40 .globl cpct_setVideoMode_asm
                             41 .globl cpct_setPalette_asm
                             42 .globl cpct_drawSprite_asm
                             43 .globl cpct_setDrawCharM1_asm
                             44 .globl cpct_drawStringM1_asm
                             45 .globl cpct_drawSpriteMasked_asm
                             46 
                             47 ;;Music
                             48 .globl cpct_akp_musicInit_asm
                             49 .globl cpct_akp_musicPlay_asm
                             50 .globl cpct_akp_stop_asm
                             51 .globl _song_menu
                             52 .globl _song_game
                             53 
                             54 ;; Firmware y Vsync
                             55 
                             56 .globl cpct_zx7b_decrunch_s_asm
                             57 .globl cpct_disableFirmware_asm
                             58 
                             59 
                             60 
                             61 ;;constantes
                             62 
                             63 .globl _fedora_sprites_00
                             64 .globl _fedora_sprites_01
                             65 .globl _fedora_sprites_02
                             66 .globl _fedora_sprites_03
                             67 .globl _fedora_sprites_04
                             68 .globl _fedora_sprites_05
                             69 .globl _fedora_sprites_06
                             70 .globl _fedora_sprites_07
                             71 .globl _fedora_sprites_08
                             72 .globl _fedora_sprites_09
                             73 .globl _fedora_sprites_10
                             74 .globl _fedora_sprites_11
                             75 
                             76 .globl _fedora_bloques_0
                             77 .globl _fedora_bloques_1
                             78 .globl _fedora_bloques2
                             79 .globl _fedora_bloques3
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 89.
Hexadecimal [16-Bits]



                             80 .globl _fedora_bloques4
                             81 .globl _fedora_bloques5
                             82 
                             83 .globl _fedora_puerta_0
                             84 .globl _fedora_puerta_1
                             85 
                             86 .globl _fedora_diamante
                             87 .globl _fedora_pal
                             88 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 90.
Hexadecimal [16-Bits]



                             26 
   623E                      27 level:
   623E 01                   28     .db 1
                             29 
   623F                      30 platform1:
   623F 04                   31    .db #(e_cmps_platform)
   6240 00                   32    .db 0
   6241 08 04 00 00 00 00    33    .db 8, 4, 0, 0, 0, 0
   6247 B6 42                34    .dw _fedora_bloques_0
   6249 C0 00 00 00 00       35    .db 0xC0, 0x00, 0, 0, 0   
                             36 
   624E                      37 platform2:
   624E 04                   38    .db #(e_cmps_platform)
   624F 00                   39    .db 0
   6250 08 08 00 00 00 00    40    .db 8, 8, 0, 0, 0, 0
   6256 80 41                41    .dw _fedora_bloques2
   6258 C0 00 00 00 00       42    .db 0xC0, 0x00, 0, 0, 0
                             43 
   625D                      44 platform3:
   625D 04                   45    .db #(e_cmps_platform)
   625E 00                   46    .db 0
   625F 08 0C 00 00 00 00    47    .db 8, 12, 0, 0, 0, 0
   6265 20 41                48    .dw _fedora_bloques3
   6267 C0 00 00 00 00       49    .db 0xC0, 0x00, 0, 0, 0
                             50 
   626C                      51 platform4: 
   626C 04                   52    .db #(e_cmps_platform)
   626D 00                   53    .db 0
   626E 08 10 00 00 00 00    54    .db 8, 16, 0, 0, 0, 0
   6274 A0 40                55    .dw _fedora_bloques4
   6276 C0 00 00 00 00       56    .db 0xC0, 0x00, 0, 0, 0
                             57 
   627B                      58 platform5:
   627B 04                   59    .db #(e_cmps_platform)
   627C 00                   60    .db 0
   627D 08 14 00 00 00 00    61    .db 8, 20, 0, 0, 0, 0
   6283 00 40                62    .dw _fedora_bloques5
   6285 00 C0 00 00 00       63    .db 0x00, 0xC0, 0, 0, 0
                             64 
   628A                      65 platform1_1:
   628A 00 C0                66    .db 0, 192
                             67 
   628C                      68 platform1_2: 
   628C 14 C0                69    .db 20, 192
                             70 
   628E                      71 platform1_3:
   628E 28 C0                72    .db 40, 192
                             73 
   6290                      74 platform1_4:
   6290 3C C0                75    .db 60, 192
                             76 
   6292                      77 platform1_5:
   6292 3C B8                78    .db 60, 184
                             79 
   6294                      80 platform1_6:
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 91.
Hexadecimal [16-Bits]



   6294 28 B8                81    .db 40, 184
                             82 
   6296                      83 platform1_7:
   6296 3C B0                84    .db 60, 176
                             85 
   6298                      86 platform1_8:
   6298 40 A8                87    .db 64, 168
                             88 
   629A                      89 platform1_9: 
   629A 44 A0                90    .db 68, 160
                             91 
   629C                      92 platform1_10:
   629C 46 98                93    .db 70, 152
                             94 
   629E                      95 platform1_11:
   629E 10 88                96    .db 16, 136
                             97 
   62A0                      98 platform1_12:
   62A0 28 88                99    .db 40, 136
                            100 
   62A2                     101 platform2_1:
   62A2 44 AC               102    .db 68, 172   
                            103 
   62A4                     104 platform2_2:
   62A4 20 94               105    .db 32, 148
                            106 
   62A6                     107 platform2_3:
   62A6 30 7C               108    .db 48, 124
                            109 
   62A8                     110 platform2_4:
   62A8 00 74               111    .db 0, 116
                            112 
   62AA                     113 platform2_5:
   62AA 00 60               114    .db 0, 96
                            115 
   62AC                     116 platform2_6:
   62AC 18 50               117    .db 24, 80
                            118 
   62AE                     119 platform2_7:
   62AE 2C 50               120    .db 44, 80
                            121 
   62B0                     122 platform2_8:
   62B0 40 50               123    .db 64, 80
                            124 
   62B2                     125 platform2_9:
   62B2 48 3C               126    .db 72, 60
                            127 
   62B4                     128 platform2_10:
   62B4 20 30               129    .db 32, 48
                            130 
   62B6                     131 platform2_11:
   62B6 48 20               132    .db 72, 32
                            133 
   62B8                     134 platform2_12:
   62B8 25 11               135    .db 37, 17
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 92.
Hexadecimal [16-Bits]



                            136 
   62BA                     137 platform3_1:
   62BA 00 C0               138    .db 0, 192   
                            139 
   62BC                     140 platform3_2:
   62BC 14 A8               141    .db 20, 168
                            142 
   62BE                     143 platform3_3:
   62BE 00 90               144    .db 0, 144
                            145 
   62C0                     146 platform3_4:
   62C0 14 78               147    .db 20, 120
                            148 
   62C2                     149 platform3_5:
   62C2 00 60               150    .db 0, 96
                            151 
   62C4                     152 platform3_6:
   62C4 14 48               153    .db 20, 72
                            154 
   62C6                     155 platform3_7:
   62C6 40 C0               156    .db 64, 192
                            157 
   62C8                     158 platform3_8:
   62C8 40 A8               159    .db 64, 168
                            160 
   62CA                     161 platform3_9:
   62CA 40 A0               162    .db 64, 160
                            163 
   62CC                     164 platform3_10:
   62CC 40 98               165    .db 64, 152
                            166 
   62CE                     167 platform3_11:
   62CE 40 90               168    .db 64, 144
                            169 
   62D0                     170 platform3_12:
   62D0 48 A8               171    .db 72, 168
                            172 
   62D2                     173 platform3_13:
   62D2 40 88               174    .db 64, 136
                            175 
   62D4                     176 platform3_14:
   62D4 20 A0               177    .db 32, 160
                            178 
   62D6                     179 platform3_15:
   62D6 20 98               180    .db 32, 152
                            181 
   62D8                     182 platform3_16:
   62D8 20 90               183    .db 32, 144
                            184 
   62DA                     185 platform3_17:
   62DA 20 88               186    .db 32, 136
                            187 
   62DC                     188 platform3_18:
   62DC 20 80               189    .db 32, 128
                            190 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 93.
Hexadecimal [16-Bits]



   62DE                     191 platform3_19:
   62DE 20 70               192    .db 32, 112
                            193 
   62E0                     194 platform3_20:
   62E0 20 68               195    .db 32, 104
                            196 
   62E2                     197 platform3_21:
   62E2 20 60               198    .db 32, 96
                            199 
   62E4                     200 platform3_22:
   62E4 20 58               201    .db 32, 88
                            202 
   62E6                     203 platform3_23:
   62E6 20 50               204    .db 32, 80
                            205 
   62E8                     206 platform4_1:
   62E8 3C A7               207    .db 60, 167   
                            208 
   62EA                     209 platform4_2:
   62EA 34 78               210    .db 52, 120
                            211 
   62EC                     212 platform4_3:
   62EC 48 90               213    .db 72, 144
                            214 
   62EE                     215 platform4_4:
   62EE 44 60               216    .db 68, 96
                            217 
   62F0                     218 platform4_6:
   62F0 48 10               219    .db 72, 16
                            220 
   62F2                     221 platform4_7:
   62F2 04 A8               222    .db 4, 168
                            223 
   62F4                     224 platform4_8:
   62F4 00 90               225    .db 0, 144
                            226 
   62F6                     227 platform4_9:
   62F6 08 78               228    .db 8, 120
                            229 
   62F8                     230 platform4_10:
   62F8 10 5F               231    .db 16, 95
                            232 
   62FA                     233 platform4_11:
   62FA 08 47               234    .db 8, 71
                            235 
   62FC                     236 platform4_12:
   62FC 04 31               237    .db 4, 49
                            238 
   62FE                     239 platform4_13:
   62FE 26 1B               240    .db 38, 27
                            241 
   6300                     242 platform4_14:
   6300 2A 13               243    .db 42, 19
                            244 
   6302                     245 platform4_15:
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 94.
Hexadecimal [16-Bits]



   6302 40 1B               246    .db 64, 27
                            247 
   6304                     248 platform5_1:
   6304 00 78               249    .db 0, 120   
                            250 
   6306                     251 platform5_2:
   6306 28 78               252    .db 40, 120
                            253 
   6308                     254 platform5_3:
   6308 3C 78               255    .db 60, 120
                            256 
   630A                     257 platform5_4:
   630A 04 C0               258    .db 4, 192
                            259 
   630C                     260 platform5_5:
   630C 18 90               261    .db 24, 144
                            262 
   630E                     263 platform5_6:
   630E 1C 98               264    .db 28, 152
                            265 
   6310                     266 platform5_7:
   6310 2C C0               267    .db 44, 192
                            268 
   6312                     269 platform5_8:
   6312 48 60               270    .db 72, 96
                            271 
   6314                     272 platform5_9:
   6314 32 4C               273    .db 50, 76
                            274 
   6316                     275 platform5_10:
   6316 1C 38               276    .db 28, 56
                            277 
   6318                     278 platform5_11:
   6318 00 24               279    .db 0, 36
                            280 
   631A                     281 platform6_0:
   631A 00 AC               282    .db 0, 172
                            283 
   631C                     284 platform6_1:
   631C 0C 94               285    .db 12, 148   
                            286 
   631E                     287 platform6_2:
   631E 44 95               288    .db 68, 149
                            289 
   6320                     290 platform6_3:
   6320 48 7D               291    .db 72, 125
                            292 
   6322                     293 platform6_4:
   6322 40 65               294    .db 64, 101
                            295 
   6324                     296 platform6_5:
   6324 00 66               297    .db 0, 102
                            298 
   6326                     299 platform6_6:
   6326 04 4E               300    .db 4, 78
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 95.
Hexadecimal [16-Bits]



                            301 
   6328                     302 platform6_7:
   6328 0C 36               303    .db 12, 54
                            304 
   632A                     305 platform6_8:
   632A 44 36               306    .db 68, 54
                            307 
   632C                     308 platform7_1:
   632C 04 4C               309    .db 4, 76   
                            310 
   632E                     311 platform7_2:
   632E 08 44               312    .db 8, 68
                            313 
   6330                     314 platform7_3:
   6330 08 3C               315    .db 8, 60
                            316 
   6332                     317 platform7_4:
   6332 08 34               318    .db 8, 52
                            319 
   6334                     320 platform7_5:
   6334 08 2C               321    .db 8, 44
                            322 
   6336                     323 platform7_6:
   6336 08 4C               324    .db 8, 76
                            325 
   6338                     326 platform7_7:
   6338 08 54               327    .db 8, 84
                            328 
   633A                     329 platform7_8:
   633A 08 5C               330    .db 8, 92
                            331 
   633C                     332 platform7_9:
   633C 08 64               333    .db 8, 100
                            334 
   633E                     335 platform7_10:
   633E 08 6C               336    .db 8, 108
                            337 
   6340                     338 platform7_11:
   6340 15 78               339    .db 21, 120
                            340 
   6342                     341 platform7_12:
   6342 2C A8               342    .db 44, 168
                            343 
   6344                     344 platform7_13:
   6344 40 90               345    .db 64, 144
                            346 
   6346                     347 platform7_14:
   6346 40 60               348    .db 64, 96
                            349 
   6348                     350 platform7_15:
   6348 2C 4C               351    .db 44, 76
                            352 
   634A                     353 player_1: 
   634A E0                  354    .db #(e_cmps_alive | e_cmps_render | e_cmps_player)
   634B 00                  355    .db 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 96.
Hexadecimal [16-Bits]



   634C 0C 04 00 00 18 00   356    .db 12, 4, 0, 0, 24, 0
   6352 F6 42               357    .dw _fedora_sprites_00
   6354 00 C0 05 05 05      358    .db 0x00, 0xC0, 5, 5, 5
   6359 01 B4               359    .db 1, 180
                            360 
   635B                     361 player_2: 
   635B E0                  362    .db #(e_cmps_alive | e_cmps_render | e_cmps_player)
   635C 00                  363    .db 0
   635D 0C 04 00 00 18 00   364    .db 12, 4, 0, 0, 24, 0
   6363 F6 42               365    .dw _fedora_sprites_00
   6365 00 C0 05 05 05      366    .db 0x00, 0xC0, 5, 5, 5
   636A 00 6C               367    .db 0, 108
                            368 
   636C                     369 player_6: 
   636C E0                  370    .db #(e_cmps_alive | e_cmps_render | e_cmps_player)
   636D 00                  371    .db 0
   636E 0C 04 00 00 18 00   372    .db 12, 4,  0, 0, 24, 0
   6374 F6 42               373    .dw _fedora_sprites_00
   6376 00 C0 05 05 05      374    .db 0x00, 0xC0, 5, 5, 5  
   637B 01 A0               375    .db 1, 160
                            376 
   637D                     377 player_7: 
   637D E0                  378    .db #(e_cmps_alive | e_cmps_render | e_cmps_player)
   637E 00                  379    .db 0
   637F 0C 04 00 00 18 00   380    .db 12, 4, 0, 0, 24, 0
   6385 F6 42               381    .dw _fedora_sprites_00
   6387 00 C0 05 05 05      382    .db 0x00, 0xC0, 5, 5, 5     
   638C 04 40               383    .db 4, 64
                            384 
                     00C0   385 cmps_treasure = (e_cmps_alive | e_cmps_render)
   638E                     386 treasure: 
   638E C0                  387    .db #cmps_treasure
   638F 00                  388    .db 0
   6390 09 06 00 00 14 00   389    .db 9, 6, 0, 0, 20, 0
   6396 C0 41               390    .dw _fedora_diamante
   6398 00 C0 00 00 00      391    .db 0x00, 0xC0, 0, 0, 0
   639D 48 8D               392    .db 72, 141
                            393 
   639F                     394 treasure_2: 
   639F C0                  395    .db #cmps_treasure
   63A0 00                  396    .db 0
   63A1 09 06 00 00 14 00   397    .db 9, 6, 0, 0, 20, 0
   63A7 C0 41               398    .dw _fedora_diamante
   63A9 00 C0 00 00 00      399    .db 0x00, 0xC0, 0, 0, 0
   63AE 28 46               400    .db 40, 70
   63B0                     401 treasure_3: 
   63B0 C0                  402    .db #cmps_treasure
   63B1 00                  403    .db 0
   63B2 09 06 00 00 14 00   404    .db 9, 6, 0, 0, 20, 0
   63B8 C0 41               405    .dw _fedora_diamante
   63BA 00 C0 00 00 00      406    .db 0x00, 0xC0, 0, 0, 0       
   63BF 44 5A               407    .db 68, 90
                            408 
   63C1                     409 treasure_4: 
   63C1 C0                  410    .db #cmps_treasure
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 97.
Hexadecimal [16-Bits]



   63C2 00                  411    .db 0
   63C3 09 06 00 00 14 00   412    .db 9, 6,  0, 0, 20, 0
   63C9 C0 41               413    .dw _fedora_diamante
   63CB 00 C0 00 00 00      414    .db 0x00, 0xC0, 0, 0, 0
   63D0 0A 6E               415    .db 10, 110
                            416 
   63D2                     417 treasure_5: 
   63D2 C0                  418    .db #cmps_treasure
   63D3 00                  419    .db 0
   63D4 09 06 00 00 14 00   420    .db 9, 6, 0, 0, 20, 0
   63DA C0 41               421    .dw _fedora_diamante
   63DC 00 C0 00 00 00      422    .db 0x00, 0xC0, 0, 0, 0
   63E1 08 B6               423    .db 8, 182
                            424 
   63E3                     425 treasure_6: 
   63E3 C0                  426    .db #cmps_treasure
   63E4 00                  427    .db 0
   63E5 09 06 00 00 14 00   428    .db 9, 6, 0, 0, 20, 0
   63EB C0 41               429    .dw _fedora_diamante
   63ED 00 C0 00 00 00      430    .db 0x00, 0xC0, 0, 0, 0
   63F2 28 64               431    .db 40, 100
                            432 
   63F4                     433 treasure_7: 
   63F4 C0                  434    .db #cmps_treasure
   63F5 00                  435    .db 0
   63F6 09 06 00 00 14 00   436    .db 9, 6, 0, 0, 20, 0
   63FC C0 41               437    .dw _fedora_diamante
   63FE 00 C0 00 00 00      438    .db 0x00, 0xC0, 0, 0, 0   
   6403 19 6B               439    .db 25, 107
                            440 
                     0040   441 cmps_door = (e_cmps_render)
   6405                     442 door: 
   6405 40                  443    .db #cmps_door
   6406 00                  444    .db 0
   6407 0C 08 16 87 01 01   445    .db 12, 8, 22, 135, 1, 1
   640D F6 41               446    .dw _fedora_puerta_0
   640F 00 C0 00 00 00      447    .db 0x00, 0xC0, 0, 0, 0
   6414 12 7C               448    .db 18, 124
                            449 
   6416                     450 door_2: 
   6416 40                  451    .db #cmps_door
   6417 00                  452    .db 0
   6418 0C 08 29 10 01 01   453    .db 12, 8, 41, 16, 1, 1
   641E F6 41               454    .dw _fedora_puerta_0
   6420 00 C0 00 00 00      455    .db 0x00, 0xC0, 0, 0, 0
   6425 25 05               456    .db 37, 5
                            457 
   6427                     458 door_3: 
   6427 40                  459    .db #cmps_door
   6428 00                  460    .db 0
   6429 0C 08 4C A7 01 01   461    .db 12, 8, 76, 167, 1, 1
   642F F6 41               462    .dw _fedora_puerta_0
   6431 00 C0 00 00 00      463    .db 0x00, 0xC0, 0, 0, 0  
   6436 48 9C               464    .db 72, 156
                            465 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 98.
Hexadecimal [16-Bits]



   6438                     466 door_4: 
   6438 40                  467    .db #cmps_door
   6439 00                  468    .db 0
   643A 0C 08 4C 0F 01 01   469    .db 12, 8, 76, 15, 1, 1
   6440 F6 41               470    .dw _fedora_puerta_0
   6442 00 C0 00 00 00      471    .db 0x00, 0xC0, 0, 0, 0    
   6447 48 04               472    .db 72, 4
                            473 
   6449                     474 door_5: 
   6449 40                  475    .db #cmps_door
   644A 00                  476    .db 0
   644B 0C 08 04 23 01 01   477    .db 12, 8, 4, 35, 1, 1
   6451 F6 41               478    .dw _fedora_puerta_0
   6453 00 C0 00 00 00      479    .db 0x00, 0xC0, 0, 0, 0
   6458 00 18               480    .db 0, 24
                            481 
   645A                     482 door_6: 
   645A 40                  483    .db #cmps_door
   645B 00                  484    .db 0
   645C 0C 08 4A 35 01 01   485    .db 12, 8, 74, 53, 1, 1
   6462 F6 41               486    .dw _fedora_puerta_0
   6464 00 C0 00 00 00      487    .db 0x00, 0xC0, 0, 0, 0
   6469 46 2A               488    .db 70, 42
                            489 
   646B                     490 door_7: 
   646B 40                  491    .db #cmps_door
   646C 00                  492    .db 0
   646D 0C 08 10 4B 01 01   493    .db 12, 8, 16, 75, 1, 1
   6473 F6 41               494    .dw _fedora_puerta_0
   6475 00 C0 00 00 00      495    .db 0x00, 0xC0, 0, 0, 0
   647A 0C 40               496    .db 12, 64
                            497 
                            498 ;platform7_1:
                            499 ;    .db #(e_cmps_platform)
                            500 ;    .db 0
                            501 ;    .db 8, 20, 4, 76, 0, 0, 20, 0
                            502 ;    .dw _fedora_bloques5
                            503 ;    .db 0x00, 0xC0, 0, 0, 0
                            504 ;
                            505 ;platform7_2:
                            506 ;    .db #(e_cmps_platform)
                            507 ;    .db 0
                            508 ;    .db 8, 4, 8, 68, 0, 0, 20, 0
                            509 ;    .dw _fedora_bloques_0
                            510 ;    .db 0x00, 0xC0, 0, 0, 0
                            511 ;
                            512 ;platform7_3:
                            513 ;    .db #(e_cmps_platform)
                            514 ;    .db 0
                            515 ;    .db 8, 4, 8, 60, 0, 0, 20, 0
                            516 ;    .dw _fedora_bloques_0
                            517 ;    .db 0x00, 0xC0, 0, 0, 0
                            518 ;
                            519 ;platform7_4:
                            520 ;    .db #(e_cmps_platform)
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 99.
Hexadecimal [16-Bits]



                            521 ;    .db 0
                            522 ;    .db 8, 4, 8, 52, 0, 0, 20, 0
                            523 ;    .dw _fedora_bloques_0
                            524 ;    .db 0x00, 0xC0, 0, 0, 0
                            525 ;
                            526 ;platform7_5:
                            527 ;    .db #(e_cmps_platform)
                            528 ;    .db 0
                            529 ;    .db 8, 4, 8, 44, 0, 0, 20, 0
                            530 ;    .dw _fedora_bloques_0
                            531 ;    .db 0x00, 0xC0, 0, 0, 0
                            532 ;
                            533 ;platform7_6:
                            534 ;    .db #(e_cmps_platform)
                            535 ;    .db 0
                            536 ;    .db 8, 4, 8, 76, 0, 0, 20, 0
                            537 ;    .dw _fedora_bloques_0
                            538 ;    .db 0x00, 0xC0, 0, 0, 0
                            539 ;
                            540 ;platform7_7:
                            541 ;    .db #(e_cmps_platform)
                            542 ;    .db 0
                            543 ;    .db 8, 4, 8, 84, 0, 0, 20, 0
                            544 ;    .dw _fedora_bloques_0
                            545 ;    .db 0x00, 0xC0, 0, 0, 0
                            546 ;
                            547 ;platform7_8:
                            548 ;    .db #(e_cmps_platform)
                            549 ;    .db 0
                            550 ;    .db 8, 4, 8, 92, 0, 0, 20, 0
                            551 ;    .dw _fedora_bloques_0
                            552 ;    .db 0x00, 0xC0, 0, 0, 0
                            553 ;
                            554 ;platform7_9:
                            555 ;    .db #(e_cmps_platform)
                            556 ;    .db 0
                            557 ;    .db 8, 4, 8, 100, 0, 0, 20, 0
                            558 ;    .dw _fedora_bloques_0
                            559 ;    .db 0x00, 0xC0, 0, 0, 0
                            560 ;
                            561 ;platform7_10:
                            562 ;    .db #(e_cmps_platform)
                            563 ;    .db 0
                            564 ;    .db 8, 4, 8, 108, 0, 0, 20, 0
                            565 ;    .dw _fedora_bloques_0
                            566 ;    .db 0x00, 0xC0, 0, 0, 0
                            567 ;
                            568 ;platform7_11:
                            569 ;    .db #(e_cmps_platform)
                            570 ;    .db 0
                            571 ;    .db 8, 16, 21, 120, 0, 0, 20, 0
                            572 ;    .dw _fedora_bloques4
                            573 ;    .db 0x00, 0xC0, 0, 0, 0
                            574 ;
                            575 ;platform7_12:
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 100.
Hexadecimal [16-Bits]



                            576 ;    .db #(e_cmps_platform)
                            577 ;    .db 0
                            578 ;    .db 8, 4, 44, 168, 0, 0, 20, 0
                            579 ;    .dw _fedora_bloques_0
                            580 ;    .db 0x00, 0xC0, 0, 0, 0
                            581 ;
                            582 ;platform7_13:
                            583 ;    .db #(e_cmps_platform)
                            584 ;    .db 0
                            585 ;    .db 8, 16, 64, 144, 0, 0, 20, 0
                            586 ;    .dw _fedora_bloques4
                            587 ;    .db 0x00, 0xC0, 0, 0, 0
                            588 ;
                            589 ;platform7_14:
                            590 ;    .db #(e_cmps_platform)
                            591 ;    .db 0
                            592 ;    .db 8, 16, 64, 96, 0, 0, 20, 0
                            593 ;    .dw _fedora_bloques4
                            594 ;    .db 0x00, 0xC0, 0, 0, 0
                            595 ;
                            596 ;platform7_15:
                            597 ;    .db #(e_cmps_platform)
                            598 ;    .db 0
                            599 ;    .db 8, 4, 44, 76, 0, 0, 20, 0
                            600 ;    .dw _fedora_bloques_0
                            601 ;    .db 0x00, 0xC0, 0, 0, 0    
                            602 ;
   647C                     603 man_levels_get_level:
   647C 21 3E 62      [10]  604     ld hl, #level
   647F 7E            [ 7]  605     ld a, (hl)
   6480 C9            [10]  606 ret
                            607 
   6481                     608 man_levels_reload_level: 
                            609 
   0243                     610     cpctm_clearScreen_asm 0
   6481 21 00 C0      [10]    1    ld    hl, #0xC000    ;; [3] HL Points to Start of Video Memory
   6484 11 01 C0      [10]    2    ld    de, #0xC001    ;; [3] DE Points to the next byte
   6487 01 00 40      [10]    3    ld    bc, #0x4000    ;; [3] BC = 16384 bytes to be copied
   648A 36 00         [10]    4    ld   (hl), #0      ;; [3] First Byte = given Colour
   648C ED B0         [21]    5    ldir                 ;; [98297] Perform the copy
                            611 
   648E CD 32 62      [17]  612     call man_entity_reset
                            613 
   6491 21 3E 62      [10]  614     ld hl, #level
   6494 7E            [ 7]  615     ld a, (hl)
   6495 FE 01         [ 7]  616     cp #1
   6497 CA EC 64      [10]  617     jp z, man_levels_load_level_1
   649A FE 02         [ 7]  618     cp #2
   649C CA 52 68      [10]  619     jp z, man_levels_load_level_2
   649F FE 03         [ 7]  620     cp #3
   64A1 CA 9A 65      [10]  621     jp z, man_levels_load_level_3
   64A4 FE 04         [ 7]  622     cp #4
   64A6 CA 86 67      [10]  623     jp z, man_levels_load_level_4
   64A9 FE 05         [ 7]  624     cp #5
   64AB CA 7E 69      [10]  625     jp z, man_levels_load_level_5
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 101.
Hexadecimal [16-Bits]



   64AE FE 06         [ 7]  626     cp #6
   64B0 CA FA 68      [10]  627     jp z, man_levels_load_level_6
   64B3 FE 07         [ 7]  628     cp #7
   64B5 CA 5A 66      [10]  629     jp z, man_levels_load_level_7
   64B8 C9            [10]  630 ret
                            631 
   64B9                     632 man_levels_load_next_level:
   027B                     633     cpctm_clearScreen_asm 0
   64B9 21 00 C0      [10]    1    ld    hl, #0xC000    ;; [3] HL Points to Start of Video Memory
   64BC 11 01 C0      [10]    2    ld    de, #0xC001    ;; [3] DE Points to the next byte
   64BF 01 00 40      [10]    3    ld    bc, #0x4000    ;; [3] BC = 16384 bytes to be copied
   64C2 36 00         [10]    4    ld   (hl), #0      ;; [3] First Byte = given Colour
   64C4 ED B0         [21]    5    ldir                 ;; [98297] Perform the copy
                            634 
   64C6 CD 32 62      [17]  635     call man_entity_reset
                            636 
   64C9 21 3E 62      [10]  637     ld hl, #level
   64CC 7E            [ 7]  638     ld a, (hl)
   64CD FE 01         [ 7]  639     cp #1
   64CF CA 52 68      [10]  640     jp z, man_levels_load_level_2
   64D2 FE 02         [ 7]  641     cp #2
   64D4 CA 9A 65      [10]  642     jp z, man_levels_load_level_3
   64D7 FE 03         [ 7]  643     cp #3
   64D9 CA 86 67      [10]  644     jp z, man_levels_load_level_4  
   64DC FE 04         [ 7]  645     cp #4
   64DE CA 7E 69      [10]  646     jp z, man_levels_load_level_5
   64E1 FE 05         [ 7]  647     cp #5
   64E3 CA FA 68      [10]  648     jp z, man_levels_load_level_6
   64E6 FE 06         [ 7]  649     cp #6
   64E8 CA 5A 66      [10]  650     jp z, man_levels_load_level_7
   64EB C9            [10]  651 ret
                            652 
   64EC                     653 man_levels_load_level_1:
                            654 
   64EC 11 71 80      [10]  655     ld de, #_song_game
   64EF CD 5E 79      [17]  656     call cpct_akp_musicInit_asm
                            657 
   64F2 3E 01         [ 7]  658     ld a, #1
   64F4 32 3E 62      [13]  659     ld (level), a
                            660 
   64F7 21 8E 63      [10]  661    ld hl, #treasure
   64FA CD E6 61      [17]  662    call create_entity
   64FD 21 05 64      [10]  663    ld hl, #door
   6500 CD E6 61      [17]  664    call create_entity
   6503 21 4A 63      [10]  665     ld hl, #player_1
   6506 CD E6 61      [17]  666    call create_entity
   6509 21 7B 62      [10]  667    ld hl, #platform5
   650C CD BF 61      [17]  668    call create_entity_1
   650F 21 8A 62      [10]  669    ld hl, #platform1_1
   6512 CD DA 61      [17]  670    call create_entity_2
   6515 21 7B 62      [10]  671    ld hl, #platform5
   6518 CD BF 61      [17]  672    call create_entity_1
   651B 21 8C 62      [10]  673    ld hl, #platform1_2
   651E CD DA 61      [17]  674    call create_entity_2
   6521 21 7B 62      [10]  675    ld hl, #platform5
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 102.
Hexadecimal [16-Bits]



   6524 CD BF 61      [17]  676    call create_entity_1
   6527 21 8E 62      [10]  677    ld hl, #platform1_3
   652A CD DA 61      [17]  678    call create_entity_2
   652D 21 7B 62      [10]  679    ld hl, #platform5
   6530 CD BF 61      [17]  680    call create_entity_1
   6533 21 90 62      [10]  681    ld hl, #platform1_4
   6536 CD DA 61      [17]  682    call create_entity_2
   6539 21 7B 62      [10]  683    ld hl, #platform5
   653C CD BF 61      [17]  684    call create_entity_1
   653F 21 92 62      [10]  685    ld hl, #platform1_5
   6542 CD DA 61      [17]  686    call create_entity_2
   6545 21 7B 62      [10]  687    ld hl, #platform5
   6548 CD BF 61      [17]  688    call create_entity_1
   654B 21 94 62      [10]  689    ld hl, #platform1_6
   654E CD DA 61      [17]  690    call create_entity_2
   6551 21 7B 62      [10]  691    ld hl, #platform5
   6554 CD BF 61      [17]  692    call create_entity_1
   6557 21 96 62      [10]  693    ld hl, #platform1_7
   655A CD DA 61      [17]  694    call create_entity_2
   655D 21 6C 62      [10]  695    ld hl, #platform4
   6560 CD BF 61      [17]  696    call create_entity_1
   6563 21 98 62      [10]  697    ld hl, #platform1_8
   6566 CD DA 61      [17]  698    call create_entity_2
   6569 21 5D 62      [10]  699    ld hl, #platform3
   656C CD BF 61      [17]  700    call create_entity_1
   656F 21 9A 62      [10]  701    ld hl, #platform1_9
   6572 CD DA 61      [17]  702    call create_entity_2
   6575 21 4E 62      [10]  703    ld hl, #platform2
   6578 CD BF 61      [17]  704    call create_entity_1
   657B 21 9C 62      [10]  705    ld hl, #platform1_10
   657E CD DA 61      [17]  706    call create_entity_2
   6581 21 5D 62      [10]  707    ld hl, #platform3
   6584 CD BF 61      [17]  708    call create_entity_1
   6587 21 9E 62      [10]  709    ld hl, #platform1_11
   658A CD DA 61      [17]  710    call create_entity_2
   658D 21 4E 62      [10]  711    ld hl, #platform2
   6590 CD BF 61      [17]  712    call create_entity_1
   6593 21 A0 62      [10]  713    ld hl, #platform1_12
   6596 CD DA 61      [17]  714    call create_entity_2
   6599 C9            [10]  715 ret
                            716 
   659A                     717 man_levels_load_level_3:
                            718 
   659A 3E 03         [ 7]  719    ld a, #3
   659C 32 3E 62      [13]  720    ld (level), a
                            721 
   659F 21 9F 63      [10]  722    ld hl, #treasure_2
   65A2 CD E6 61      [17]  723    call create_entity
   65A5 21 16 64      [10]  724    ld hl, #door_2
   65A8 CD E6 61      [17]  725    call create_entity
   65AB 21 4A 63      [10]  726    ld hl, #player_1
   65AE CD E6 61      [17]  727    call create_entity
   65B1 21 7B 62      [10]  728    ld hl, #platform5
   65B4 CD BF 61      [17]  729    call create_entity_1
   65B7 21 8A 62      [10]  730    ld hl, #platform1_1
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 103.
Hexadecimal [16-Bits]



   65BA CD DA 61      [17]  731    call create_entity_2
   65BD 21 7B 62      [10]  732    ld hl, #platform5
   65C0 CD BF 61      [17]  733    call create_entity_1
   65C3 21 8E 62      [10]  734    ld hl, #platform1_3
   65C6 CD DA 61      [17]  735    call create_entity_2
   65C9 21 5D 62      [10]  736    ld hl, #platform3
   65CC CD BF 61      [17]  737    call create_entity_1
   65CF 21 A2 62      [10]  738    ld hl, #platform2_1
   65D2 CD DA 61      [17]  739    call create_entity_2
   65D5 21 5D 62      [10]  740    ld hl, #platform3
   65D8 CD BF 61      [17]  741    call create_entity_1
   65DB 21 A4 62      [10]  742    ld hl, #platform2_2
   65DE CD DA 61      [17]  743    call create_entity_2
   65E1 21 5D 62      [10]  744    ld hl, #platform3
   65E4 CD BF 61      [17]  745    call create_entity_1
   65E7 21 A6 62      [10]  746    ld hl, #platform2_3
   65EA CD DA 61      [17]  747    call create_entity_2
   65ED 21 5D 62      [10]  748    ld hl, #platform3
   65F0 CD BF 61      [17]  749    call create_entity_1
   65F3 21 A8 62      [10]  750    ld hl, #platform2_4
   65F6 CD DA 61      [17]  751    call create_entity_2
   65F9 21 3F 62      [10]  752    ld hl, #platform1
   65FC CD BF 61      [17]  753    call create_entity_1
   65FF 21 AA 62      [10]  754    ld hl, #platform2_5
   6602 CD DA 61      [17]  755    call create_entity_2
   6605 21 7B 62      [10]  756    ld hl, #platform5
   6608 CD BF 61      [17]  757    call create_entity_1
   660B 21 AC 62      [10]  758    ld hl, #platform2_6
   660E CD DA 61      [17]  759    call create_entity_2  
   6611 21 7B 62      [10]  760    ld hl, #platform5
   6614 CD BF 61      [17]  761    call create_entity_1
   6617 21 AE 62      [10]  762    ld hl, #platform2_7
   661A CD DA 61      [17]  763    call create_entity_2 
   661D 21 6C 62      [10]  764    ld hl, #platform4
   6620 CD BF 61      [17]  765    call create_entity_1
   6623 21 B0 62      [10]  766    ld hl, #platform2_8
   6626 CD DA 61      [17]  767    call create_entity_2               
   6629 21 4E 62      [10]  768    ld hl, #platform2
   662C CD BF 61      [17]  769    call create_entity_1
   662F 21 B2 62      [10]  770    ld hl, #platform2_9
   6632 CD DA 61      [17]  771    call create_entity_2
   6635 21 4E 62      [10]  772    ld hl, #platform2
   6638 CD BF 61      [17]  773    call create_entity_1
   663B 21 B4 62      [10]  774    ld hl, #platform2_10
   663E CD DA 61      [17]  775    call create_entity_2
   6641 21 4E 62      [10]  776    ld hl, #platform2
   6644 CD BF 61      [17]  777    call create_entity_1
   6647 21 B6 62      [10]  778    ld hl, #platform2_11
   664A CD DA 61      [17]  779    call create_entity_2
   664D 21 4E 62      [10]  780    ld hl, #platform2
   6650 CD BF 61      [17]  781    call create_entity_1
   6653 21 B8 62      [10]  782    ld hl, #platform2_12
   6656 CD DA 61      [17]  783    call create_entity_2
   6659 C9            [10]  784 ret
                            785 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 104.
Hexadecimal [16-Bits]



   665A                     786 man_levels_load_level_7:
                            787 
   665A 3E 07         [ 7]  788    ld a, #7
   665C 32 3E 62      [13]  789    ld (level), a
                            790 
   665F 21 B0 63      [10]  791    ld hl, #treasure_3
   6662 CD E6 61      [17]  792    call create_entity
   6665 21 27 64      [10]  793    ld hl, #door_3
   6668 CD E6 61      [17]  794    call create_entity
   666B 21 4A 63      [10]  795    ld hl, #player_1
   666E CD E6 61      [17]  796    call create_entity
   6671 21 4E 62      [10]  797    ld hl, #platform2
   6674 CD BF 61      [17]  798    call create_entity_1
   6677 21 BA 62      [10]  799    ld hl, #platform3_1
   667A CD DA 61      [17]  800    call create_entity_2
   667D 21 6C 62      [10]  801    ld hl, #platform4
   6680 CD BF 61      [17]  802    call create_entity_1
   6683 21 BC 62      [10]  803    ld hl, #platform3_2
   6686 CD DA 61      [17]  804    call create_entity_2
   6689 21 5D 62      [10]  805    ld hl, #platform3
   668C CD BF 61      [17]  806    call create_entity_1
   668F 21 BE 62      [10]  807    ld hl, #platform3_3
   6692 CD DA 61      [17]  808    call create_entity_2
   6695 21 6C 62      [10]  809    ld hl, #platform4
   6698 CD BF 61      [17]  810    call create_entity_1
   669B 21 C0 62      [10]  811    ld hl, #platform3_4
   669E CD DA 61      [17]  812    call create_entity_2
   66A1 21 5D 62      [10]  813    ld hl, #platform3
   66A4 CD BF 61      [17]  814    call create_entity_1
   66A7 21 C2 62      [10]  815    ld hl, #platform3_5
   66AA CD DA 61      [17]  816    call create_entity_2
   66AD 21 6C 62      [10]  817    ld hl, #platform4
   66B0 CD BF 61      [17]  818    call create_entity_1
   66B3 21 C4 62      [10]  819    ld hl, #platform3_6
   66B6 CD DA 61      [17]  820    call create_entity_2
   66B9 21 3F 62      [10]  821    ld hl, #platform1
   66BC CD BF 61      [17]  822    call create_entity_1
   66BF 21 C6 62      [10]  823    ld hl, #platform3_7
   66C2 CD DA 61      [17]  824    call create_entity_2
   66C5 21 3F 62      [10]  825    ld hl, #platform1
   66C8 CD BF 61      [17]  826    call create_entity_1
   66CB 21 C8 62      [10]  827    ld hl, #platform3_8
   66CE CD DA 61      [17]  828    call create_entity_2
   66D1 21 3F 62      [10]  829    ld hl, #platform1
   66D4 CD BF 61      [17]  830    call create_entity_1
   66D7 21 CA 62      [10]  831    ld hl, #platform3_9
   66DA CD DA 61      [17]  832    call create_entity_2
   66DD 21 3F 62      [10]  833    ld hl, #platform1
   66E0 CD BF 61      [17]  834    call create_entity_1
   66E3 21 CC 62      [10]  835    ld hl, #platform3_10
   66E6 CD DA 61      [17]  836    call create_entity_2
   66E9 21 3F 62      [10]  837    ld hl, #platform1
   66EC CD BF 61      [17]  838    call create_entity_1
   66EF 21 CE 62      [10]  839    ld hl, #platform3_11
   66F2 CD DA 61      [17]  840    call create_entity_2
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 105.
Hexadecimal [16-Bits]



   66F5 21 4E 62      [10]  841    ld hl, #platform2
   66F8 CD BF 61      [17]  842    call create_entity_1
   66FB 21 D0 62      [10]  843    ld hl, #platform3_12
   66FE CD DA 61      [17]  844    call create_entity_2
   6701 21 6C 62      [10]  845    ld hl, #platform4
   6704 CD BF 61      [17]  846    call create_entity_1
   6707 21 D2 62      [10]  847    ld hl, #platform3_13
   670A CD DA 61      [17]  848    call create_entity_2
   670D 21 3F 62      [10]  849    ld hl, #platform1
   6710 CD BF 61      [17]  850    call create_entity_1
   6713 21 D4 62      [10]  851    ld hl, #platform3_14
   6716 CD DA 61      [17]  852    call create_entity_2
   6719 21 3F 62      [10]  853    ld hl, #platform1
   671C CD BF 61      [17]  854    call create_entity_1
   671F 21 D6 62      [10]  855    ld hl, #platform3_15
   6722 CD DA 61      [17]  856    call create_entity_2
   6725 21 3F 62      [10]  857    ld hl, #platform1
   6728 CD BF 61      [17]  858    call create_entity_1
   672B 21 D8 62      [10]  859    ld hl, #platform3_16
   672E CD DA 61      [17]  860    call create_entity_2
   6731 21 3F 62      [10]  861    ld hl, #platform1
   6734 CD BF 61      [17]  862    call create_entity_1
   6737 21 DA 62      [10]  863    ld hl, #platform3_17
   673A CD DA 61      [17]  864    call create_entity_2
   673D 21 3F 62      [10]  865    ld hl, #platform1
   6740 CD BF 61      [17]  866    call create_entity_1
   6743 21 DC 62      [10]  867    ld hl, #platform3_18
   6746 CD DA 61      [17]  868    call create_entity_2
   6749 21 4E 62      [10]  869    ld hl, #platform2
   674C CD BF 61      [17]  870    call create_entity_1
   674F 21 DE 62      [10]  871    ld hl, #platform3_19
   6752 CD DA 61      [17]  872    call create_entity_2
   6755 21 3F 62      [10]  873    ld hl, #platform1
   6758 CD BF 61      [17]  874    call create_entity_1
   675B 21 E0 62      [10]  875    ld hl, #platform3_20
   675E CD DA 61      [17]  876    call create_entity_2
   6761 21 3F 62      [10]  877    ld hl, #platform1
   6764 CD BF 61      [17]  878    call create_entity_1
   6767 21 E2 62      [10]  879    ld hl, #platform3_21
   676A CD DA 61      [17]  880    call create_entity_2
   676D 21 3F 62      [10]  881    ld hl, #platform1
   6770 CD BF 61      [17]  882    call create_entity_1
   6773 21 E4 62      [10]  883    ld hl, #platform3_22
   6776 CD DA 61      [17]  884    call create_entity_2       
   6779 21 3F 62      [10]  885    ld hl, #platform1
   677C CD BF 61      [17]  886    call create_entity_1
   677F 21 E6 62      [10]  887    ld hl, #platform3_23
   6782 CD DA 61      [17]  888    call create_entity_2    
   6785 C9            [10]  889 ret 
                            890 
   6786                     891 man_levels_load_level_4:
   6786 3E 04         [ 7]  892    ld a, #4
   6788 32 3E 62      [13]  893    ld (level), a
                            894 
   678B 21 C1 63      [10]  895    ld hl, #treasure_4
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 106.
Hexadecimal [16-Bits]



   678E CD E6 61      [17]  896    call create_entity
   6791 21 38 64      [10]  897    ld hl, #door_4
   6794 CD E6 61      [17]  898    call create_entity
   6797 21 4A 63      [10]  899    ld hl, #player_1
   679A CD E6 61      [17]  900    call create_entity
   679D 21 4E 62      [10]  901    ld hl, #platform2
   67A0 CD BF 61      [17]  902    call create_entity_1
   67A3 21 BA 62      [10]  903    ld hl, #platform3_1
   67A6 CD DA 61      [17]  904    call create_entity_2
   67A9 21 3F 62      [10]  905    ld hl, #platform1
   67AC CD BF 61      [17]  906    call create_entity_1
   67AF 21 E8 62      [10]  907    ld hl, #platform4_1
   67B2 CD DA 61      [17]  908    call create_entity_2
   67B5 21 4E 62      [10]  909    ld hl, #platform2
   67B8 CD BF 61      [17]  910    call create_entity_1
   67BB 21 EA 62      [10]  911    ld hl, #platform4_2
   67BE CD DA 61      [17]  912    call create_entity_2
   67C1 21 4E 62      [10]  913    ld hl, #platform2
   67C4 CD BF 61      [17]  914    call create_entity_1
   67C7 21 EC 62      [10]  915    ld hl, #platform4_3
   67CA CD DA 61      [17]  916    call create_entity_2
   67CD 21 4E 62      [10]  917    ld hl, #platform2
   67D0 CD BF 61      [17]  918    call create_entity_1
   67D3 21 EE 62      [10]  919    ld hl, #platform4_4
   67D6 CD DA 61      [17]  920    call create_entity_2
   67D9 21 4E 62      [10]  921    ld hl, #platform2
   67DC CD BF 61      [17]  922    call create_entity_1
   67DF 21 F0 62      [10]  923    ld hl, #platform4_6
   67E2 CD DA 61      [17]  924    call create_entity_2
   67E5 21 3F 62      [10]  925    ld hl, #platform1
   67E8 CD BF 61      [17]  926    call create_entity_1
   67EB 21 F2 62      [10]  927    ld hl, #platform4_7
   67EE CD DA 61      [17]  928    call create_entity_2
   67F1 21 3F 62      [10]  929    ld hl, #platform1
   67F4 CD BF 61      [17]  930    call create_entity_1
   67F7 21 F4 62      [10]  931     ld hl, #platform4_8
   67FA CD DA 61      [17]  932    call create_entity_2
   67FD 21 4E 62      [10]  933    ld hl, #platform2
   6800 CD BF 61      [17]  934    call create_entity_1
   6803 21 F6 62      [10]  935     ld hl, #platform4_9
   6806 CD DA 61      [17]  936    call create_entity_2
   6809 21 4E 62      [10]  937    ld hl, #platform2
   680C CD BF 61      [17]  938    call create_entity_1
   680F 21 F8 62      [10]  939     ld hl, #platform4_10
   6812 CD DA 61      [17]  940    call create_entity_2
   6815 21 4E 62      [10]  941    ld hl, #platform2
   6818 CD BF 61      [17]  942    call create_entity_1
   681B 21 FA 62      [10]  943     ld hl, #platform4_11
   681E CD DA 61      [17]  944    call create_entity_2
   6821 21 3F 62      [10]  945    ld hl, #platform1
   6824 CD BF 61      [17]  946    call create_entity_1
   6827 21 FC 62      [10]  947     ld hl, #platform4_12
   682A CD DA 61      [17]  948    call create_entity_2
   682D 21 4E 62      [10]  949    ld hl, #platform2
   6830 CD BF 61      [17]  950    call create_entity_1
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 107.
Hexadecimal [16-Bits]



   6833 21 FE 62      [10]  951     ld hl, #platform4_13
   6836 CD DA 61      [17]  952    call create_entity_2
   6839 21 3F 62      [10]  953    ld hl, #platform1
   683C CD BF 61      [17]  954    call create_entity_1
   683F 21 00 63      [10]  955     ld hl, #platform4_14
   6842 CD DA 61      [17]  956    call create_entity_2
   6845 21 3F 62      [10]  957    ld hl, #platform1
   6848 CD BF 61      [17]  958    call create_entity_1
   684B 21 02 63      [10]  959     ld hl, #platform4_15
   684E CD DA 61      [17]  960     call create_entity_2
   6851 C9            [10]  961 ret
                            962 
   6852                     963 man_levels_load_level_2:
   6852 3E 02         [ 7]  964    ld a, #2
   6854 32 3E 62      [13]  965    ld (level), a
                            966 
   6857 21 D2 63      [10]  967    ld hl, #treasure_5
   685A CD E6 61      [17]  968    call create_entity
   685D 21 49 64      [10]  969    ld hl, #door_5
   6860 CD E6 61      [17]  970    call create_entity
   6863 21 5B 63      [10]  971    ld hl, #player_2
   6866 CD E6 61      [17]  972    call create_entity
   6869 21 7B 62      [10]  973    ld hl, #platform5
   686C CD BF 61      [17]  974    call create_entity_1
   686F 21 04 63      [10]  975    ld hl, #platform5_1
   6872 CD DA 61      [17]  976    call create_entity_2
   6875 21 7B 62      [10]  977    ld hl, #platform5
   6878 CD BF 61      [17]  978    call create_entity_1
   687B 21 06 63      [10]  979    ld hl, #platform5_2
   687E CD DA 61      [17]  980    call create_entity_2
   6881 21 7B 62      [10]  981    ld hl, #platform5
   6884 CD BF 61      [17]  982    call create_entity_1
   6887 21 08 63      [10]  983    ld hl, #platform5_3
   688A CD DA 61      [17]  984    call create_entity_2
   688D 21 6C 62      [10]  985    ld hl, #platform4
   6890 CD BF 61      [17]  986    call create_entity_1
   6893 21 0A 63      [10]  987    ld hl, #platform5_4
   6896 CD DA 61      [17]  988    call create_entity_2
   6899 21 4E 62      [10]  989    ld hl, #platform2
   689C CD BF 61      [17]  990    call create_entity_1
   689F 21 0C 63      [10]  991    ld hl, #platform5_5
   68A2 CD DA 61      [17]  992    call create_entity_2
   68A5 21 6C 62      [10]  993    ld hl, #platform4
   68A8 CD BF 61      [17]  994    call create_entity_1
   68AB 21 0E 63      [10]  995    ld hl, #platform5_6
   68AE CD DA 61      [17]  996    call create_entity_2
   68B1 21 5D 62      [10]  997    ld hl, #platform3
   68B4 CD BF 61      [17]  998    call create_entity_1
   68B7 21 10 63      [10]  999    ld hl, #platform5_7
   68BA CD DA 61      [17] 1000    call create_entity_2
   68BD 21 5D 62      [10] 1001    ld hl, #platform3
   68C0 CD BF 61      [17] 1002    call create_entity_1
   68C3 21 A2 62      [10] 1003    ld hl, #platform2_1
   68C6 CD DA 61      [17] 1004    call create_entity_2
   68C9 21 4E 62      [10] 1005    ld hl, #platform2
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 108.
Hexadecimal [16-Bits]



   68CC CD BF 61      [17] 1006    call create_entity_1
   68CF 21 12 63      [10] 1007    ld hl, #platform5_8
   68D2 CD DA 61      [17] 1008    call create_entity_2
   68D5 21 4E 62      [10] 1009    ld hl, #platform2
   68D8 CD BF 61      [17] 1010    call create_entity_1
   68DB 21 14 63      [10] 1011    ld hl, #platform5_9
   68DE CD DA 61      [17] 1012    call create_entity_2
   68E1 21 4E 62      [10] 1013    ld hl, #platform2
   68E4 CD BF 61      [17] 1014    call create_entity_1
   68E7 21 16 63      [10] 1015    ld hl, #platform5_10
   68EA CD DA 61      [17] 1016    call create_entity_2
   68ED 21 5D 62      [10] 1017    ld hl, #platform3
   68F0 CD BF 61      [17] 1018    call create_entity_1
   68F3 21 18 63      [10] 1019    ld hl, #platform5_11
   68F6 CD DA 61      [17] 1020    call create_entity_2
   68F9 C9            [10] 1021 ret
                           1022 
   68FA                    1023 man_levels_load_level_6:
   68FA 3E 06         [ 7] 1024    ld a, #6
   68FC 32 3E 62      [13] 1025    ld (level), a
                           1026 
   68FF 21 E3 63      [10] 1027    ld hl, #treasure_6
   6902 CD E6 61      [17] 1028    call create_entity
   6905 21 5A 64      [10] 1029    ld hl, #door_6
   6908 CD E6 61      [17] 1030    call create_entity
   690B 21 6C 63      [10] 1031    ld hl, #player_6
   690E CD E6 61      [17] 1032    call create_entity
   6911 21 5D 62      [10] 1033    ld hl, #platform3
   6914 CD BF 61      [17] 1034    call create_entity_1
   6917 21 1A 63      [10] 1035    ld hl, #platform6_0
   691A CD DA 61      [17] 1036    call create_entity_2
   691D 21 3F 62      [10] 1037    ld hl, #platform1
   6920 CD BF 61      [17] 1038    call create_entity_1
   6923 21 1C 63      [10] 1039    ld hl, #platform6_1
   6926 CD DA 61      [17] 1040    call create_entity_2
   6929 21 5D 62      [10] 1041    ld hl, #platform3
   692C CD BF 61      [17] 1042    call create_entity_1
   692F 21 1E 63      [10] 1043    ld hl, #platform6_2
   6932 CD DA 61      [17] 1044    call create_entity_2
   6935 21 3F 62      [10] 1045    ld hl, #platform1
   6938 CD BF 61      [17] 1046    call create_entity_1
   693B 21 20 63      [10] 1047    ld hl, #platform6_3
   693E CD DA 61      [17] 1048    call create_entity_2
   6941 21 3F 62      [10] 1049    ld hl, #platform1
   6944 CD BF 61      [17] 1050    call create_entity_1
   6947 21 22 63      [10] 1051    ld hl, #platform6_4
   694A CD DA 61      [17] 1052    call create_entity_2
   694D 21 5D 62      [10] 1053    ld hl, #platform3
   6950 CD BF 61      [17] 1054    call create_entity_1
   6953 21 24 63      [10] 1055    ld hl, #platform6_5
   6956 CD DA 61      [17] 1056    call create_entity_2
   6959 21 3F 62      [10] 1057    ld hl, #platform1
   695C CD BF 61      [17] 1058    call create_entity_1
   695F 21 26 63      [10] 1059    ld hl, #platform6_6
   6962 CD DA 61      [17] 1060    call create_entity_2
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 109.
Hexadecimal [16-Bits]



   6965 21 3F 62      [10] 1061    ld hl, #platform1
   6968 CD BF 61      [17] 1062    call create_entity_1
   696B 21 28 63      [10] 1063    ld hl, #platform6_7
   696E CD DA 61      [17] 1064    call create_entity_2
   6971 21 5D 62      [10] 1065    ld hl, #platform3
   6974 CD BF 61      [17] 1066    call create_entity_1
   6977 21 2A 63      [10] 1067    ld hl, #platform6_8
   697A CD DA 61      [17] 1068    call create_entity_2
   697D C9            [10] 1069 ret
                           1070 
   697E                    1071 man_levels_load_level_5:
   697E 3E 05         [ 7] 1072    ld a, #5
   6980 32 3E 62      [13] 1073    ld (level), a
                           1074 
   6983 21 F4 63      [10] 1075    ld hl, #treasure_7
   6986 CD E6 61      [17] 1076    call create_entity
   6989 21 6B 64      [10] 1077    ld hl, #door_7
   698C CD E6 61      [17] 1078    call create_entity
   698F 21 7D 63      [10] 1079    ld hl, #player_7
   6992 CD E6 61      [17] 1080    call create_entity
   6995 21 7B 62      [10] 1081    ld hl, #platform5
   6998 CD BF 61      [17] 1082    call create_entity_1
   699B 21 2C 63      [10] 1083    ld hl, #platform7_1
   699E CD DA 61      [17] 1084    call create_entity_2
   69A1 21 3F 62      [10] 1085    ld hl, #platform1
   69A4 CD BF 61      [17] 1086    call create_entity_1
   69A7 21 2E 63      [10] 1087    ld hl, #platform7_2
   69AA CD DA 61      [17] 1088    call create_entity_2
   69AD 21 3F 62      [10] 1089    ld hl, #platform1
   69B0 CD BF 61      [17] 1090    call create_entity_1
   69B3 21 30 63      [10] 1091    ld hl, #platform7_3
   69B6 CD DA 61      [17] 1092    call create_entity_2
   69B9 21 3F 62      [10] 1093    ld hl, #platform1
   69BC CD BF 61      [17] 1094    call create_entity_1
   69BF 21 32 63      [10] 1095    ld hl, #platform7_4
   69C2 CD DA 61      [17] 1096    call create_entity_2
   69C5 21 3F 62      [10] 1097    ld hl, #platform1
   69C8 CD BF 61      [17] 1098    call create_entity_1
   69CB 21 34 63      [10] 1099    ld hl, #platform7_5
   69CE CD DA 61      [17] 1100    call create_entity_2
   69D1 21 3F 62      [10] 1101    ld hl, #platform1
   69D4 CD BF 61      [17] 1102    call create_entity_1
   69D7 21 36 63      [10] 1103    ld hl, #platform7_6
   69DA CD DA 61      [17] 1104    call create_entity_2
   69DD 21 3F 62      [10] 1105    ld hl, #platform1
   69E0 CD BF 61      [17] 1106    call create_entity_1
   69E3 21 38 63      [10] 1107    ld hl, #platform7_7
   69E6 CD DA 61      [17] 1108    call create_entity_2
   69E9 21 3F 62      [10] 1109    ld hl, #platform1
   69EC CD BF 61      [17] 1110    call create_entity_1
   69EF 21 3A 63      [10] 1111    ld hl, #platform7_8
   69F2 CD DA 61      [17] 1112    call create_entity_2
   69F5 21 3F 62      [10] 1113    ld hl, #platform1
   69F8 CD BF 61      [17] 1114    call create_entity_1
   69FB 21 3C 63      [10] 1115    ld hl, #platform7_9
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 110.
Hexadecimal [16-Bits]



   69FE CD DA 61      [17] 1116    call create_entity_2
   6A01 21 3F 62      [10] 1117    ld hl, #platform1
   6A04 CD BF 61      [17] 1118    call create_entity_1
   6A07 21 3E 63      [10] 1119    ld hl, #platform7_10
   6A0A CD DA 61      [17] 1120    call create_entity_2
   6A0D 21 6C 62      [10] 1121    ld hl, #platform4
   6A10 CD BF 61      [17] 1122    call create_entity_1
   6A13 21 40 63      [10] 1123    ld hl, #platform7_11
   6A16 CD DA 61      [17] 1124    call create_entity_2
   6A19 21 3F 62      [10] 1125    ld hl, #platform1
   6A1C CD BF 61      [17] 1126    call create_entity_1
   6A1F 21 42 63      [10] 1127    ld hl, #platform7_12
   6A22 CD DA 61      [17] 1128    call create_entity_2
   6A25 21 6C 62      [10] 1129    ld hl, #platform4
   6A28 CD BF 61      [17] 1130    call create_entity_1
   6A2B 21 44 63      [10] 1131    ld hl, #platform7_13
   6A2E CD DA 61      [17] 1132    call create_entity_2
   6A31 21 6C 62      [10] 1133    ld hl, #platform4
   6A34 CD BF 61      [17] 1134    call create_entity_1
   6A37 21 46 63      [10] 1135    ld hl, #platform7_14
   6A3A CD DA 61      [17] 1136    call create_entity_2
   6A3D 21 3F 62      [10] 1137    ld hl, #platform1
   6A40 CD BF 61      [17] 1138    call create_entity_1
   6A43 21 48 63      [10] 1139    ld hl, #platform7_15
   6A46 CD DA 61      [17] 1140    call create_entity_2
   6A49 C9            [10] 1141 ret    
