ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 1.
Hexadecimal [16-Bits]



                              1 ;;------------------------------------------------LICENSE NOTICE------------------------------------------------------------------------------
                              2 ;;  This file is part of Amstrad CPC videogame "Redsea"
                              3 ;;  Copyright (C) 2021 Crab Party / Elena López (AneleSplats in itch.io) / Iván Tortosa (Pluvs in itch.io, @IvanTortosaBer1 on Twitter) / Antonio Gosálvez (BalgroHub in itch.io)
                              4 ;;  Copyright (C) 2015 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              5 ;;
                              6 ;;  This program is free software: you can redistribute it and/or modify
                              7 ;;  it under the terms of the GNU Lesser General Public License as published by
                              8 ;;  the Free Software Foundation, either version 3 of the License, or
                              9 ;;  (at your option) any later version.
                             10 ;;
                             11 ;;  This program is distributed in the hope that it will be useful,
                             12 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             13 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             14 ;;  GNU Lesser General Public License for more details.
                             15 ;;
                             16 ;;  You should have received a copy of the GNU Lesser General Public License
                             17 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             18 ;;------------------------------------------------LICENSE NOTICE-------------------------------------------------------------------------
                             19 ;;;
                             20 ;;; ANIMATIONS MANAGER
                             21 ;;;
                             22 
                             23 ; .globl _spr_jamoncitos_0
                             24 ; .globl _spr_jamoncitos_1
                             25 ; .globl _spr_jamoncitos_2
                             26 ; .globl _spr_jamoncitos_3
                             27 
                             28 .globl _spr_enemy1_00
                             29 .globl _spr_enemy1_01
                             30 .globl _spr_enemy1_02
                             31 .globl _spr_enemy1_03
                             32 .globl _spr_enemy1_04
                             33 .globl _spr_enemy1_05
                             34 .globl _spr_enemy1_06
                             35 .globl _spr_enemy1_07
                             36 .globl _spr_enemy1_08
                             37 .globl _spr_enemy1_09
                             38 
                             39 .globl _spr_goal_0
                             40 .globl _spr_goal_1
                             41 .globl _spr_goal_2
                             42 .globl _spr_goal_3
                             43 .globl _spr_goal_4
                             44 .globl _spr_goal_5
                             45 .globl _spr_goal_6
                             46 .globl _spr_goal_7
                             47 .globl _spr_goal_8
                             48 
                             49 .globl _img_final_1
                             50 .globl _img_final_2
                             51 .globl _img_final_3
                             52 .globl _img_final_4
                             53 
                             54 .globl _spr_mainC_0
                             55 .globl _spr_mainC_1
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 2.
Hexadecimal [16-Bits]



                             56 .globl _spr_mainC_2
                             57 .globl _spr_mainC_3
                             58 .globl _spr_mainC_4
                             59 .globl _spr_mainC_5
                             60 .globl _spr_mainC_6
                             61 .globl _spr_mainC_7
                             62 
                             63 .globl _spr_mainC_up
                             64 .globl _mainC_left
                             65 .globl _mainC_right
                             66 
                             67 .globl _mainC_j_up_0
                             68 .globl _mainC_j_up_1
                             69 .globl _mainC_j_up_2
                             70 .globl _mainC_j_up_5
                             71 .globl _mainC_j_up_6
                             72 .globl _mainC_j_up_7
                             73 .globl _mainC_j_down_0
                             74 .globl _mainC_j_down_1
                             75 .globl _mainC_j_down_2
                             76 .globl _mainC_j_down_3
                             77 .globl _mainC_j_left_0
                             78 .globl _mainC_j_left_1
                             79 .globl _mainC_j_left_2
                             80 .globl _mainC_j_right_0
                             81 .globl _mainC_j_right_1
                             82 .globl _mainC_j_right_2
                             83 
                             84 
                             85 
                             86 ; _jamoncitos_walking::
                             87 ;     .dw     _spr_jamoncitos_0
                             88 ;     .dw     _spr_jamoncitos_1
                             89 ;     .dw     _spr_jamoncitos_2
                             90 ;     .dw     _spr_jamoncitos_3
                             91 ;     .dw     #0x0000
                             92 ;     .dw     _jamoncitos_walking
                             93 
                             94 
   8706                      95 _enemy1_iddle::
   8706 38 56                96     .dw     _spr_enemy1_00
   8708 8C 56                97     .dw     _spr_enemy1_01
   870A E0 56                98     .dw     _spr_enemy1_02
   870C 34 57                99     .dw     _spr_enemy1_03
   870E 88 57               100     .dw     _spr_enemy1_04
   8710 DC 57               101     .dw     _spr_enemy1_05
   8712 30 58               102     .dw     _spr_enemy1_06
   8714 84 58               103     .dw     _spr_enemy1_07
   8716 D8 58               104     .dw     _spr_enemy1_08
   8718 2C 59               105     .dw     _spr_enemy1_09
   871A 00 00               106     .dw     #0x0000
   871C 06 87               107     .dw     _enemy1_iddle
                            108 
   871E                     109 _mainC_iddle::
   871E B0 62               110     .dw     _spr_mainC_0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 3.
Hexadecimal [16-Bits]



   8720 00 00               111     .dw     #0x0000
                            112 
   8722                     113 _goal_achieved::
   8722 38 52               114     .dw     _spr_goal_1
   8724 B8 52               115     .dw     _spr_goal_2
   8726 38 53               116     .dw     _spr_goal_3
   8728 B8 53               117     .dw     _spr_goal_4
   872A 38 54               118     .dw     _spr_goal_5
   872C B8 54               119     .dw     _spr_goal_6
   872E 38 55               120     .dw     _spr_goal_7
   8730 B8 55               121     .dw     _spr_goal_8
   8732 00 00               122     .dw     #0x0000
                            123 
   8734                     124 _mainC_jump_up::
   8734 00 5D               125     .dw     _mainC_j_up_0
   8736 70 5D               126     .dw     _mainC_j_up_1
                            127     ;.dw     _mainC_j_up_2
   8738 30 5F               128     .dw     _mainC_j_up_5
   873A A0 5F               129     .dw     _mainC_j_up_6
   873C 10 60               130     .dw     _mainC_j_up_7
   873E 80 60               131     .dw     _spr_mainC_up
   8740 00 00               132     .dw     #0x0000
                            133 
   8742                     134 _mainC_jump_down::
   8742 F0 60               135     .dw     _mainC_j_down_0
   8744 60 61               136     .dw     _mainC_j_down_1
   8746 D0 61               137     .dw     _mainC_j_down_2
   8748 40 62               138     .dw     _mainC_j_down_3
   874A 40 62               139     .dw     _mainC_j_down_3
   874C 40 62               140     .dw     _mainC_j_down_3
   874E B0 62               141     .dw     _spr_mainC_0
   8750 00 00               142     .dw     #0x0000
                            143 
   8752                     144 _mainC_jump_left::
   8752 40 5B               145     .dw     _mainC_j_left_0
   8754 B0 5B               146     .dw     _mainC_j_left_1
   8756 20 5C               147     .dw     _mainC_j_left_2
   8758 20 5C               148     .dw     _mainC_j_left_2
   875A 20 5C               149     .dw     _mainC_j_left_2
   875C 20 5C               150     .dw     _mainC_j_left_2
   875E 90 5C               151     .dw     _mainC_left
   8760 00 00               152     .dw     #0x0000
                            153 
   8762                     154 _mainC_jump_right::
   8762 80 59               155     .dw     _mainC_j_right_0
   8764 F0 59               156     .dw     _mainC_j_right_1
   8766 60 5A               157     .dw     _mainC_j_right_2
   8768 60 5A               158     .dw     _mainC_j_right_2
   876A 60 5A               159     .dw     _mainC_j_right_2
   876C 60 5A               160     .dw     _mainC_j_right_2
   876E D0 5A               161     .dw     _mainC_right
   8770 00 00               162     .dw     #0x0000
                            163 
   8772                     164 _mainC_death::
   8772 20 63               165     .dw     _spr_mainC_1
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 4.
Hexadecimal [16-Bits]



   8774 90 63               166     .dw     _spr_mainC_2
   8776 00 64               167     .dw     _spr_mainC_3
   8778 70 64               168     .dw     _spr_mainC_4
   877A E0 64               169     .dw     _spr_mainC_5
   877C 50 65               170     .dw     _spr_mainC_6
   877E C0 65               171     .dw     _spr_mainC_7
   8780 00 00               172     .dw     #0x0000
                            173 
   8782                     174 _explotarArbol::
   8782 B8 49               175     .dw     _img_final_1
   8784 98 4B               176     .dw     _img_final_2
   8786 78 4D               177     .dw     _img_final_3
   8788 98 4B               178     .dw     _img_final_2
   878A 78 4D               179     .dw     _img_final_3
   878C 98 4B               180     .dw     _img_final_2
   878E 78 4D               181     .dw     _img_final_3
   8790 98 4B               182     .dw     _img_final_2
   8792 78 4D               183     .dw     _img_final_3
   8794 58 4F               184     .dw     _img_final_4
   8796 58 4F               185     .dw     _img_final_4
   8798 58 4F               186     .dw     _img_final_4
   879A 58 4F               187     .dw     _img_final_4
   879C 58 4F               188     .dw     _img_final_4
   879E 58 4F               189     .dw     _img_final_4
   87A0 58 4F               190     .dw     _img_final_4
   87A2 58 4F               191     .dw     _img_final_4
   87A4 58 4F               192     .dw     _img_final_4
   87A6 58 4F               193     .dw     _img_final_4
   87A8 58 4F               194     .dw     _img_final_4
   87AA 00 00               195     .dw     #0x0000
