ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 1.
Hexadecimal [16-Bits]



                              1 ;; MIT License
                              2 ;; 
                              3 ;; Copyright (c) 2021 capAI / Aitana Devis  Ávila (@AitanaDevis) / Carlos Peñarrubia Morcillo  (@carlospm12) / Pablo Ruiz Ponce (@pabloruizp)
                              4 ;; 
                              5 ;; Permission is hereby granted, free of charge, to any person obtaining a copy
                              6 ;; of this software and associated documentation files (the "Software"), to deal
                              7 ;; in the Software without restriction, including without limitation the rights
                              8 ;; to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
                              9 ;; copies of the Software, and to permit persons to whom the Software is
                             10 ;; furnished to do so, subject to the following conditions:
                             11 ;; 
                             12 ;; The above copyright notice and this permission notice shall be included in all
                             13 ;; copies or substantial portions of the Software.
                             14 ;; 
                             15 ;; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
                             16 ;; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
                             17 ;; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
                             18 ;; AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
                             19 ;; LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
                             20 ;; OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
                             21 ;; SOFTWARE.
                             22 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 2.
Hexadecimal [16-Bits]



                             23 .include "cpctelera.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;; All CPCtelera include files
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 3.
Hexadecimal [16-Bits]



                             20 .include "macros/allmacros.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 4.
Hexadecimal [16-Bits]



                             19 .include "macros/cpct_maths.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Math Macros
                             21 ;;
                             22 ;;    Useful assembler macros for doing common math operations
                             23 ;;
                             24 
                             25 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             26 ;; Macro: add_REGPAIR_a 
                             27 ;;
                             28 ;;    Performs the operation REGPAIR = REGPAIR + A. REGPAIR is any given pair of 8-bit registers.
                             29 ;;
                             30 ;; ASM Definition:
                             31 ;;    .macro <add_REGPAIR_a> RH, RL
                             32 ;;
                             33 ;; Parameters:
                             34 ;;    RH    - Register 1 of the REGPAIR. Holds higher-byte value
                             35 ;;    RL    - Register 2 of the REGPAIR. Holds lower-byte value
                             36 ;; 
                             37 ;; Input Registers: 
                             38 ;;    RH:RL - 16-value used as left-operand and final storage for the sum
                             39 ;;    A     - Second sum operand
                             40 ;;
                             41 ;; Return Value:
                             42 ;;    RH:RL - Holds the sum of RH:RL + A
                             43 ;;
                             44 ;; Details:
                             45 ;;    This macro performs the sum of RH:RL + A and stores it directly on RH:RL.
                             46 ;; It uses only RH:RL and A to perform the operation.
                             47 ;;
                             48 ;; Modified Registers: 
                             49 ;;    A, RH, RL
                             50 ;;
                             51 ;; Required memory:
                             52 ;;    5 bytes
                             53 ;;
                             54 ;; Time Measures:
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 5.
Hexadecimal [16-Bits]



                             55 ;; (start code)
                             56 ;;  Case | microSecs(us) | CPU Cycles
                             57 ;; ------------------------------------
                             58 ;;  Any  |       5       |     20
                             59 ;; ------------------------------------
                             60 ;; (end code)
                             61 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             62 .macro add_REGPAIR_a rh, rl
                             63    ;; First Perform RH = E + A
                             64    add rl    ;; [1] A' = RL + A 
                             65    ld  rl, a ;; [1] RL' = A' = RL + A. It might generate Carry that must be added to RH
                             66    
                             67    ;; Then Perform RH = RH + Carry 
                             68    adc rh    ;; [1] A'' = A' + RH + Carry = RL + A + RH + Carry
                             69    sub rl    ;; [1] Remove RL'. A''' = A'' - RL' = RL + A + RH + Carry - (RL + A) = RH + Carry
                             70    ld  rh, a ;; [1] Save into RH (RH' = A''' = RH + Carry)
                             71 .endm
                             72 
                             73 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             74 ;; Macro: add_de_a
                             75 ;;
                             76 ;;    Performs the operation DE = DE + A
                             77 ;;
                             78 ;; ASM Definition:
                             79 ;;    .macro <add_de_a>
                             80 ;;
                             81 ;; Parameters:
                             82 ;;    None
                             83 ;; 
                             84 ;; Input Registers: 
                             85 ;;    DE    - First sum operand and Destination Register
                             86 ;;    A     - Second sum operand
                             87 ;;
                             88 ;; Return Value:
                             89 ;;    DE - Holds the sum of DE + A
                             90 ;;
                             91 ;; Details:
                             92 ;;    This macro performs the sum of DE + A and stores it directly on DE.
                             93 ;; It uses only DE and A to perform the operation.
                             94 ;;    This macro is a direct instantiation of the macro <add_REGPAIR_a>.
                             95 ;;
                             96 ;; Modified Registers: 
                             97 ;;    A, DE
                             98 ;;
                             99 ;; Required memory:
                            100 ;;    5 bytes
                            101 ;;
                            102 ;; Time Measures:
                            103 ;; (start code)
                            104 ;;  Case | microSecs(us) | CPU Cycles
                            105 ;; ------------------------------------
                            106 ;;  Any  |       5       |     20
                            107 ;; ------------------------------------
                            108 ;; (end code)
                            109 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 6.
Hexadecimal [16-Bits]



                            110 .macro add_de_a
                            111    add_REGPAIR_a  d, e
                            112 .endm
                            113 
                            114 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            115 ;; Macro: add_hl_a
                            116 ;;
                            117 ;;    Performs the operation HL = HL + A
                            118 ;;
                            119 ;; ASM Definition:
                            120 ;;    .macro <add_hl_a>
                            121 ;;
                            122 ;; Parameters:
                            123 ;;    None
                            124 ;; 
                            125 ;; Input Registers: 
                            126 ;;    HL    - First sum operand and Destination Register
                            127 ;;    A     - Second sum operand
                            128 ;;
                            129 ;; Return Value:
                            130 ;;    HL - Holds the sum of HL + A
                            131 ;;
                            132 ;; Details:
                            133 ;;    This macro performs the sum of HL + A and stores it directly on HL.
                            134 ;; It uses only HL and A to perform the operation.
                            135 ;;    This macro is a direct instantiation of the macro <add_REGPAIR_a>.
                            136 ;;
                            137 ;; Modified Registers: 
                            138 ;;    A, HL
                            139 ;;
                            140 ;; Required memory:
                            141 ;;    5 bytes
                            142 ;;
                            143 ;; Time Measures:
                            144 ;; (start code)
                            145 ;;  Case | microSecs(us) | CPU Cycles
                            146 ;; ------------------------------------
                            147 ;;  Any  |       5       |     20
                            148 ;; ------------------------------------
                            149 ;; (end code)
                            150 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            151 .macro add_hl_a
                            152    add_REGPAIR_a  h, l
                            153 .endm
                            154 
                            155 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            156 ;; Macro: add_bc_a
                            157 ;;
                            158 ;;    Performs the operation BC = BC + A
                            159 ;;
                            160 ;; ASM Definition:
                            161 ;;    .macro <add_bc_a>
                            162 ;;
                            163 ;; Parameters:
                            164 ;;    None
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 7.
Hexadecimal [16-Bits]



                            165 ;; 
                            166 ;; Input Registers: 
                            167 ;;    BC    - First sum operand and Destination Register
                            168 ;;    A     - Second sum operand
                            169 ;;
                            170 ;; Return Value:
                            171 ;;    BC - Holds the sum of BC + A
                            172 ;;
                            173 ;; Details:
                            174 ;;    This macro performs the sum of BC + A and stores it directly on BC.
                            175 ;; It uses only BC and A to perform the operation.
                            176 ;;    This macro is a direct instantiation of the macro <add_REGPAIR_a>.
                            177 ;;
                            178 ;; Modified Registers: 
                            179 ;;    A, BC
                            180 ;;
                            181 ;; Required memory:
                            182 ;;    5 bytes
                            183 ;;
                            184 ;; Time Measures:
                            185 ;; (start code)
                            186 ;;  Case | microSecs(us) | CPU Cycles
                            187 ;; ------------------------------------
                            188 ;;  Any  |       5       |     20
                            189 ;; ------------------------------------
                            190 ;; (end code)
                            191 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            192 .macro add_bc_a
                            193    add_REGPAIR_a  b, c
                            194 .endm
                            195 
                            196 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            197 ;; Macro: sub_REGPAIR_a 
                            198 ;;
                            199 ;;    Performs the operation REGPAIR = REGPAIR - A. REGPAIR is any given pair of 8-bit registers.
                            200 ;;
                            201 ;; ASM Definition:
                            202 ;;    .macro <sub_REGPAIR_a> RH, RL
                            203 ;;
                            204 ;; Parameters:
                            205 ;;    RH    - Register 1 of the REGPAIR. Holds higher-byte value
                            206 ;;    RL    - Register 2 of the REGPAIR. Holds lower-byte value
                            207 ;;  ?JMPLBL - Optional Jump label. A temporal one will be produced if none is given.
                            208 ;; 
                            209 ;; Input Registers: 
                            210 ;;    RH:RL - 16-value used as left-operand and final storage for the subtraction
                            211 ;;    A     - Second subtraction operand (A > 0)
                            212 ;;
                            213 ;; Preconditions:
                            214 ;;    A > 0 - Value in register A is considered to be unsigned and must be greater
                            215 ;;            than 0 for this macro to work properly.
                            216 ;;
                            217 ;; Return Value:
                            218 ;;    RH:RL - Holds the result of RH:RL - A
                            219 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 8.
Hexadecimal [16-Bits]



                            220 ;; Details:
                            221 ;;    This macro performs the subtraction of RH:RL - A and stores it directly on RH:RL.
                            222 ;; It uses only RH:RL and A to perform the operation.
                            223 ;;    With respect to the optional label ?JMPLBL, it is often better not to provide 
                            224 ;; this parameter. A temporal local symbol will be automatically generated for that label.
                            225 ;; Only provide it when you have a specific reason to do that.
                            226 ;;
                            227 ;; Modified Registers: 
                            228 ;;    A, RH, RL
                            229 ;;
                            230 ;; Required memory:
                            231 ;;    7 bytes
                            232 ;;
                            233 ;; Time Measures:
                            234 ;; (start code)
                            235 ;;  Case | microSecs(us) | CPU Cycles
                            236 ;; ------------------------------------
                            237 ;;  Any  |       7       |     28
                            238 ;; ------------------------------------
                            239 ;; (end code)
                            240 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            241 .macro sub_REGPAIR_a rh, rl, ?jmplbl
                            242    ;; First Perform A' = A - 1 - RL 
                            243    ;; (Inverse subtraction minus 1, used  to test for Carry, needed to know when to subtract 1 from RH)
                            244    dec    a          ;; [1] --A (In case A == RL, inverse subtraction should produce carry not to decrement RH)
                            245    sub   rl          ;; [1] A' = A - 1 - RL
                            246    jr     c, jmplbl  ;; [2/3] If A <= RL, Carry will be produced, and no decrement of RH is required, so jump over it
                            247      dec   rh        ;; [1] --RH (A > RL, so RH must be decremented)
                            248 jmplbl:   
                            249    ;; Now invert A to get the subtraction we wanted 
                            250    ;; { RL' = -A' - 1 = -(A - 1 - RL) - 1 = RL - A }
                            251    cpl            ;; [1] A'' = RL - A (Original subtraction we wanted, calculated trough one's complement of A')
                            252    ld    rl, a    ;; [1] Save into RL (RL' = RL - A)
                            253 .endm
                            254 
                            255 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            256 ;; Macro: sub_de_a 
                            257 ;;
                            258 ;;    Performs the operation DE = DE - A. DE is any given pair of 8-bit registers.
                            259 ;;
                            260 ;; ASM Definition:
                            261 ;;    .macro <sub_de_a>
                            262 ;; 
                            263 ;; Input Registers: 
                            264 ;;    DE - 16-value used as left-operand and final storage for the subtraction
                            265 ;;    A  - Second subtraction operand
                            266 ;;
                            267 ;; Return Value:
                            268 ;;    DE - Holds the result of DE - A
                            269 ;;
                            270 ;; Details:
                            271 ;;    This macro performs the subtraction of DE - A and stores it directly on DE.
                            272 ;; It uses only DE and A to perform the operation.
                            273 ;;
                            274 ;; Modified Registers: 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 9.
Hexadecimal [16-Bits]



                            275 ;;    A, DE
                            276 ;;
                            277 ;; Required memory:
                            278 ;;    7 bytes
                            279 ;;
                            280 ;; Time Measures:
                            281 ;; (start code)
                            282 ;;  Case | microSecs(us) | CPU Cycles
                            283 ;; ------------------------------------
                            284 ;;  Any  |       7       |     28
                            285 ;; ------------------------------------
                            286 ;; (end code)
                            287 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            288 .macro sub_de_a
                            289    sub_REGPAIR_a  d, e
                            290 .endm
                            291 
                            292 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            293 ;; Macro: sub_hl_a 
                            294 ;;
                            295 ;;    Performs the operation HL = HL - A. HL is any given pair of 8-bit registers.
                            296 ;;
                            297 ;; ASM Definition:
                            298 ;;    .macro <sub_hl_a>
                            299 ;; 
                            300 ;; Input Registers: 
                            301 ;;    HL - 16-value used as left-operand and final storage for the subtraction
                            302 ;;    A  - Second subtraction operand
                            303 ;;
                            304 ;; Return Value:
                            305 ;;    HL - Holds the result of HL - A
                            306 ;;
                            307 ;; Details:
                            308 ;;    This macro performs the subtraction of HL - A and stores it directly on HL.
                            309 ;; It uses only HL and A to perform the operation.
                            310 ;;
                            311 ;; Modified Registers: 
                            312 ;;    A, HL
                            313 ;;
                            314 ;; Required memory:
                            315 ;;    7 bytes
                            316 ;;
                            317 ;; Time Measures:
                            318 ;; (start code)
                            319 ;;  Case | microSecs(us) | CPU Cycles
                            320 ;; ------------------------------------
                            321 ;;  Any  |       7       |     28
                            322 ;; ------------------------------------
                            323 ;; (end code)
                            324 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            325 .macro sub_hl_a
                            326    sub_REGPAIR_a  h, l
                            327 .endm
                            328 
                            329 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 10.
Hexadecimal [16-Bits]



                            330 ;; Macro: sub_bc_a 
                            331 ;;
                            332 ;;    Performs the operation BC = BC - A. BC is any given pair of 8-bit registers.
                            333 ;;
                            334 ;; ASM Definition:
                            335 ;;    .macro <sub_bc_a>
                            336 ;; 
                            337 ;; Input Registers: 
                            338 ;;    BC - 16-value used as left-operand and final storage for the subtraction
                            339 ;;    A  - Second subtraction operand
                            340 ;;
                            341 ;; Return Value:
                            342 ;;    BC - Holds the result of BC - A
                            343 ;;
                            344 ;; Details:
                            345 ;;    This macro performs the subtraction of BC - A and stores it directly on BC.
                            346 ;; It uses only BC and A to perform the operation.
                            347 ;;
                            348 ;; Modified Registers: 
                            349 ;;    A, BC
                            350 ;;
                            351 ;; Required memory:
                            352 ;;    7 bytes
                            353 ;;
                            354 ;; Time Measures:
                            355 ;; (start code)
                            356 ;;  Case | microSecs(us) | CPU Cycles
                            357 ;; ------------------------------------
                            358 ;;  Any  |       7       |     28
                            359 ;; ------------------------------------
                            360 ;; (end code)
                            361 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            362 .macro sub_bc_a
                            363    sub_REGPAIR_a  b, c
                            364 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 11.
Hexadecimal [16-Bits]



                             20 .include "macros/cpct_opcodeConstants.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2016 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Opcodes
                             21 ;;
                             22 ;;    Constant definitions of Z80 opcodes. This will be normally used as data
                             23 ;; for self-modifying code.
                             24 ;;
                             25 
                             26 ;; Constant: opc_JR
                             27 ;;    Opcode for "JR xx" instruction. Requires 1-byte parameter (xx)
                     0018    28 opc_JR   = 0x18
                             29 
                             30 ;; Constant: opc_LD_D
                             31 ;;    Opcode for "LD d, xx" instruction. Requires 1-byte parameter (xx)
                     0016    32 opc_LD_D = 0x16
                             33 
                             34 ;; Constant: opc_EI
                             35 ;;    Opcode for "EI" instruction. 
                     00FB    36 opc_EI = 0xFB
                             37 
                             38 ;; Constant: opc_DI
                             39 ;;    Opcode for "DI" instruction. 
                     00F3    40 opc_DI = 0xF3
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 12.
Hexadecimal [16-Bits]



                             21 .include "macros/cpct_reverseBits.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2016 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Reverse Bits
                             21 ;;
                             22 ;;    Useful macros for bit reversing and selecting in different ways. Only
                             23 ;; valid to be used from assembly language (not from C).
                             24 ;;
                             25 
                             26 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             27 ;; Macro: cpctm_reverse_and_select_bits_of_A
                             28 ;;
                             29 ;;    Reorders the bits of A and mixes them letting the user select the 
                             30 ;; new order for the bits by using a selection mask.
                             31 ;;
                             32 ;; Parameters:
                             33 ;;    TReg          - An 8-bits register that will be used for intermediate calculations.
                             34 ;; This register may be one of these: B, C, D, E, H, L
                             35 ;;    SelectionMask - An 8-bits mask that will be used to select the bits to get from 
                             36 ;; the reordered bits. It might be an 8-bit register or even (hl).
                             37 ;; 
                             38 ;; Input Registers: 
                             39 ;;    A     - Byte to be reversed
                             40 ;;    TReg  - Should have a copy of A (same exact value)
                             41 ;;
                             42 ;; Return Value:
                             43 ;;    A - Resulting value with bits reversed and selected 
                             44 ;;
                             45 ;; Details:
                             46 ;;    This macro reorders the bits in A and mixes them with the same bits in
                             47 ;; their original order by using a *SelectionMask*. The process is as follows:
                             48 ;;
                             49 ;;    1. Consider the 8 bits of A = TReg = [01234567]
                             50 ;;    2. Reorder the 8 bits of A, producing A2 = [32547610]
                             51 ;;    2. Reorder the bits of TReg, producing TReg2 = [76103254]
                             52 ;;    3. Combines both reorders into final result using a *SelectionMask*. Each 
                             53 ;; 0 bit from the selection mask means "select bit from A2", whereas each 1 bit
                             54 ;; means "select bit from TReg2".
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 13.
Hexadecimal [16-Bits]



                             55 ;;
                             56 ;;    For instance, a selection mask 0b11001100 will produce this result:
                             57 ;;
                             58 ;; (start code)
                             59 ;;       A2 = [ 32 54 76 10 ]
                             60 ;;    TReg2 = [ 76 10 32 54 ]
                             61 ;;  SelMask = [ 11 00 11 00 ] // 1 = TReg2-bits, 0 = A2-bits
                             62 ;;  ---------------------------
                             63 ;;   Result = [ 76 54 32 10 ]
                             64 ;; (end code)
                             65 ;;
                             66 ;;    Therefore, mask 0b11001100 produces the effect of reversing the bits of A
                             67 ;; completely. Other masks will produce different reorders of the bits in A, for
                             68 ;; different requirements or needs.
                             69 ;;
                             70 ;; Modified Registers: 
                             71 ;;    AF, TReg
                             72 ;;
                             73 ;; Required memory:
                             74 ;;    16 bytes
                             75 ;;
                             76 ;; Time Measures:
                             77 ;; (start code)
                             78 ;;  Case | microSecs(us) | CPU Cycles
                             79 ;; ------------------------------------
                             80 ;;  Any  |      16       |     64
                             81 ;; ------------------------------------
                             82 ;; (end code)
                             83 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             84 .macro cpctm_reverse_and_select_bits_of_A  TReg, SelectionMask
                             85    rlca            ;; [1] | Rotate left twice so that...
                             86    rlca            ;; [1] | ... A=[23456701]
                             87 
                             88    ;; Mix bits of TReg and A so that all bits are in correct relative order
                             89    ;; but displaced from their final desired location
                             90    xor TReg        ;; [1] TReg = [01234567] (original value)
                             91    and #0b01010101 ;; [2]    A = [23456701] (bits rotated twice left)
                             92    xor TReg        ;; [1]   A2 = [03254761] (TReg mixed with A to get bits in order)
                             93    
                             94    ;; Now get bits 54 and 10 in their right location and save them into TReg
                             95    rlca            ;; [1]    A = [ 32 54 76 10 ] (54 and 10 are in their desired place)
                             96    ld TReg, a      ;; [1] TReg = A (Save this bit location into TReg)
                             97    
                             98    ;; Now get bits 76 and 32 in their right location in A
                             99    rrca            ;; [1] | Rotate A right 4 times to...
                            100    rrca            ;; [1] | ... get bits 76 and 32 located at their ...
                            101    rrca            ;; [1] | ... desired location :
                            102    rrca            ;; [1] | ... A = [ 76 10 32 54 ] (76 and 32 are in their desired place)
                            103    
                            104    ;; Finally, mix bits from TReg and A to get all bits reversed and selected
                            105    xor TReg          ;; [1] TReg = [32547610] (Mixed bits with 54 & 10 in their right place)
                            106    and SelectionMask ;; [2]    A = [76103254] (Mixed bits with 76 & 32 in their right place)
                            107    xor TReg          ;; [1]   A2 = [xxxxxxxx] final value: bits of A reversed and selected using *SelectionMask*
                            108 .endm
                            109 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 14.
Hexadecimal [16-Bits]



                            110 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            111 ;; Macro: cpctm_reverse_bits_of_A 
                            112 ;; Macro: cpctm_reverse_mode_2_pixels_of_A
                            113 ;;
                            114 ;;    Reverses the 8-bits of A, from [01234567] to [76543210]. This also reverses
                            115 ;; all pixels contained in A when A is in screen pixel format, mode 2.
                            116 ;;
                            117 ;; Parameters:
                            118 ;;    TReg - An 8-bits register that will be used for intermediate calculations.
                            119 ;; This register may be one of these: B, C, D, E, H, L
                            120 ;; 
                            121 ;; Input Registers: 
                            122 ;;    A    - Byte to be reversed
                            123 ;;    TReg - Should have a copy of A (same exact value)
                            124 ;;
                            125 ;; Return Value:
                            126 ;;    A - Resulting value with bits reversed 
                            127 ;;
                            128 ;; Requires:
                            129 ;;   - Uses the macro <cpctm_reverse_and_select_bits_of_A>.
                            130 ;;
                            131 ;; Details:
                            132 ;;    This macro reverses the bits in A. If bits of A = [01234567], the final
                            133 ;; result after processing this macro will be A = [76543210]. Register TReg is
                            134 ;; used for intermediate calculations and its value is destroyed.
                            135 ;;
                            136 ;; Modified Registers: 
                            137 ;;    AF, TReg
                            138 ;;
                            139 ;; Required memory:
                            140 ;;    16 bytes
                            141 ;;
                            142 ;; Time Measures:
                            143 ;; (start code)
                            144 ;;  Case | microSecs(us) | CPU Cycles
                            145 ;; ------------------------------------
                            146 ;;  Any  |      16       |     64
                            147 ;; ------------------------------------
                            148 ;; (end code)
                            149 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            150 .macro cpctm_reverse_bits_of_A  TReg
                            151    cpctm_reverse_and_select_bits_of_A  TReg, #0b11001100
                            152 .endm
                            153 .macro cpctm_reverse_mode_2_pixels_of_A   TReg
                            154    cpctm_reverse_bits_of_A  TReg
                            155 .endm
                            156 
                            157 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            158 ;; Macro: cpctm_reverse_mode_1_pixels_of_A
                            159 ;;
                            160 ;;    Reverses the order of pixel values contained in register A, assuming A is 
                            161 ;; in screen pixel format, mode 1.
                            162 ;;
                            163 ;; Parameters:
                            164 ;;    TReg - An 8-bits register that will be used for intermediate calculations.
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 15.
Hexadecimal [16-Bits]



                            165 ;; This register may be one of these: B, C, D, E, H, L
                            166 ;; 
                            167 ;; Input Registers: 
                            168 ;;    A    - Byte with pixel values to be reversed
                            169 ;;    TReg - Should have a copy of A (same exact value)
                            170 ;;
                            171 ;; Return Value:
                            172 ;;    A - Resulting byte with the 4 pixels values reversed in order
                            173 ;;
                            174 ;; Requires:
                            175 ;;   - Uses the macro <cpctm_reverse_and_select_bits_of_A>.
                            176 ;;
                            177 ;; Details:
                            178 ;;    This macro considers that A contains a byte that codifies 4 pixels in 
                            179 ;; screen pixel format, mode 1. It modifies A to reverse the order of its 4 
                            180 ;; contained pixel values left-to-right (1234 -> 4321). With respect to the 
                            181 ;; order of the 8-bits of A, the concrete operations performed is:
                            182 ;; (start code)
                            183 ;;    A = [01234567] == reverse-pixels ==> [32107654] = A2
                            184 ;; (end code)
                            185 ;;    You may want to check <cpct_px2byteM1> to know how bits codify both pixels
                            186 ;; in one single byte for screen pixel format, mode 1.
                            187 ;;
                            188 ;;    *TReg* is an 8-bit register that will be used for intermediate calculations,
                            189 ;; destroying its original value (that should be same as A, at the start).
                            190 ;;
                            191 ;; Modified Registers: 
                            192 ;;    AF, TReg
                            193 ;;
                            194 ;; Required memory:
                            195 ;;    16 bytes
                            196 ;;
                            197 ;; Time Measures:
                            198 ;; (start code)
                            199 ;;  Case | microSecs(us) | CPU Cycles
                            200 ;; ------------------------------------
                            201 ;;  Any  |      16       |     64
                            202 ;; ------------------------------------
                            203 ;; (end code)
                            204 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            205 .macro cpctm_reverse_mode_1_pixels_of_A  TReg
                            206    cpctm_reverse_and_select_bits_of_A  TReg, #0b00110011
                            207 .endm
                            208 
                            209 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            210 ;; Macro: cpctm_reverse_mode_0_pixels_of_A
                            211 ;;
                            212 ;;    Reverses the order of pixel values contained in register A, assuming A is 
                            213 ;; in screen pixel format, mode 0.
                            214 ;;
                            215 ;; Parameters:
                            216 ;;    TReg - An 8-bits register that will be used for intermediate calculations.
                            217 ;; This register may be one of these: B, C, D, E, H, L
                            218 ;; 
                            219 ;; Input Registers: 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 16.
Hexadecimal [16-Bits]



                            220 ;;    A    - Byte with pixel values to be reversed
                            221 ;;    TReg - Should have a copy of A (same exact value)
                            222 ;;
                            223 ;; Return Value:
                            224 ;;    A - Resulting byte with the 2 pixels values reversed in order
                            225 ;;
                            226 ;; Details:
                            227 ;;    This macro considers that A contains a byte that codifies 2 pixels in 
                            228 ;; screen pixel format, mode 0. It modifies A to reverse the order of its 2 
                            229 ;; contained pixel values left-to-right (12 -> 21). With respect to the 
                            230 ;; order of the 8-bits of A, the concrete operation performed is:
                            231 ;; (start code)
                            232 ;;    A = [01234567] == reverse-pixels ==> [10325476] = A2
                            233 ;; (end code)
                            234 ;;    You may want to check <cpct_px2byteM0> to know how bits codify both pixels
                            235 ;; in one single byte for screen pixel format, mode 0.
                            236 ;;
                            237 ;;    *TReg* is an 8-bit register that will be used for intermediate calculations,
                            238 ;; destroying its original value (that should be same as A, at the start).
                            239 ;;
                            240 ;; Modified Registers: 
                            241 ;;    AF, TReg
                            242 ;;
                            243 ;; Required memory:
                            244 ;;    7 bytes
                            245 ;;
                            246 ;; Time Measures:
                            247 ;; (start code)
                            248 ;;  Case | microSecs(us) | CPU Cycles
                            249 ;; ------------------------------------
                            250 ;;  Any  |       7       |     28
                            251 ;; ------------------------------------
                            252 ;; (end code)
                            253 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            254 .macro cpctm_reverse_mode_0_pixels_of_A  TReg
                            255    rlca            ;; [1] | Rotate A twice to the left to get bits ordered...
                            256    rlca            ;; [1] | ... in the way we need for mixing, A = [23456701]
                            257   
                            258    ;; Mix TReg with A to get pixels reversed by reordering bits
                            259    xor TReg        ;; [1] | TReg = [01234567]
                            260    and #0b01010101 ;; [2] |    A = [23456701]
                            261    xor TReg        ;; [1] |   A2 = [03254761]
                            262    rrca            ;; [1] Rotate right to get pixels reversed A = [10325476]
                            263 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 17.
Hexadecimal [16-Bits]



                             22 .include "macros/cpct_undocumentedOpcodes.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Undocumented Opcodes
                             21 ;;
                             22 ;;    Macros to clarify source code when using undocumented opcodes. Only
                             23 ;; valid to be used from assembly language (not from C).
                             24 ;;
                             25 
                             26 ;; Macro: jr__0
                             27 ;;    Opcode for "JR #0" instruction
                             28 ;; 
                             29 .mdelete jr__0
                             30 .macro jr__0
                             31    .DW #0x0018  ;; JR #00 (Normally used as a modifiable jump, as jr 0 is an infinite loop)
                             32 .endm
                             33 
                             34 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             35 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             36 ;; SLL Instructions
                             37 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             38 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             39 
                             40 ;; Macro: sll__b
                             41 ;;    Opcode for "SLL b" instruction
                             42 ;; 
                             43 .mdelete sll__b
                             44 .macro sll__b
                             45    .db #0xCB, #0x30  ;; Opcode for sll b
                             46 .endm
                             47 
                             48 ;; Macro: sll__c
                             49 ;;    Opcode for "SLL c" instruction
                             50 ;; 
                             51 .mdelete sll__c
                             52 .macro sll__c
                             53    .db #0xCB, #0x31  ;; Opcode for sll c
                             54 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 18.
Hexadecimal [16-Bits]



                             55 
                             56 ;; Macro: sll__d
                             57 ;;    Opcode for "SLL d" instruction
                             58 ;; 
                             59 .mdelete sll__d
                             60 .macro sll__d
                             61    .db #0xCB, #0x32  ;; Opcode for sll d
                             62 .endm
                             63 
                             64 ;; Macro: sll__e
                             65 ;;    Opcode for "SLL e" instruction
                             66 ;; 
                             67 .mdelete sll__e
                             68 .macro sll__e
                             69    .db #0xCB, #0x33  ;; Opcode for sll e
                             70 .endm
                             71 
                             72 ;; Macro: sll__h
                             73 ;;    Opcode for "SLL h" instruction
                             74 ;; 
                             75 .mdelete sll__h
                             76 .macro sll__h
                             77    .db #0xCB, #0x34  ;; Opcode for sll h
                             78 .endm
                             79 
                             80 ;; Macro: sll__l
                             81 ;;    Opcode for "SLL l" instruction
                             82 ;; 
                             83 .mdelete sll__l
                             84 .macro sll__l
                             85    .db #0xCB, #0x35  ;; Opcode for sll l
                             86 .endm
                             87 
                             88 ;; Macro: sll___hl_
                             89 ;;    Opcode for "SLL (hl)" instruction
                             90 ;; 
                             91 .mdelete sll___hl_
                             92 .macro sll___hl_
                             93    .db #0xCB, #0x36  ;; Opcode for sll (hl)
                             94 .endm
                             95 
                             96 ;; Macro: sll__a
                             97 ;;    Opcode for "SLL a" instruction
                             98 ;; 
                             99 .mdelete sll__a
                            100 .macro sll__a
                            101    .db #0xCB, #0x37  ;; Opcode for sll a
                            102 .endm
                            103 
                            104 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            105 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            106 ;; IXL Related Macros
                            107 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            108 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            109 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 19.
Hexadecimal [16-Bits]



                            110 ;; Macro: ld__ixl    Value
                            111 ;;    Opcode for "LD ixl, Value" instruction
                            112 ;;  
                            113 ;; Parameters:
                            114 ;;    Value - An inmediate 8-bits value that will be loaded into ixl
                            115 ;; 
                            116 .mdelete ld__ixl
                            117 .macro ld__ixl    Value 
                            118    .db #0xDD, #0x2E, Value  ;; Opcode for ld ixl, Value
                            119 .endm
                            120 
                            121 ;; Macro: ld__ixl_a
                            122 ;;    Opcode for "LD ixl, a" instruction
                            123 ;; 
                            124 .mdelete ld__ixl_a
                            125 .macro ld__ixl_a
                            126    .dw #0x6FDD  ;; Opcode for ld ixl, a
                            127 .endm
                            128 
                            129 ;; Macro: ld__ixl_b
                            130 ;;    Opcode for "LD ixl, B" instruction
                            131 ;; 
                            132 .mdelete ld__ixl_b
                            133 .macro ld__ixl_b
                            134    .dw #0x68DD  ;; Opcode for ld ixl, b
                            135 .endm
                            136 
                            137 ;; Macro: ld__ixl_c
                            138 ;;    Opcode for "LD ixl, C" instruction
                            139 ;; 
                            140 .mdelete ld__ixl_c
                            141 .macro ld__ixl_c
                            142    .dw #0x69DD  ;; Opcode for ld ixl, c
                            143 .endm
                            144 
                            145 ;; Macro: ld__ixl_d
                            146 ;;    Opcode for "LD ixl, D" instruction
                            147 ;; 
                            148 .mdelete ld__ixl_d
                            149 .macro ld__ixl_d
                            150    .dw #0x6ADD  ;; Opcode for ld ixl, d
                            151 .endm
                            152 
                            153 ;; Macro: ld__ixl_e
                            154 ;;    Opcode for "LD ixl, E" instruction
                            155 ;; 
                            156 .mdelete ld__ixl_e
                            157 .macro ld__ixl_e
                            158    .dw #0x6BDD  ;; Opcode for ld ixl, e
                            159 .endm
                            160 
                            161 ;; Macro: ld__ixl_ixh
                            162 ;;    Opcode for "LD ixl, IXH" instruction
                            163 ;; 
                            164 .mdelete  ld__ixl_ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 20.
Hexadecimal [16-Bits]



                            165 .macro ld__ixl_ixh
                            166    .dw #0x6CDD  ;; Opcode for ld ixl, ixh
                            167 .endm
                            168 
                            169 ;; Macro: ld__a_ixl
                            170 ;;    Opcode for "LD A, ixl" instruction
                            171 ;; 
                            172 .mdelete ld__a_ixl
                            173 .macro ld__a_ixl
                            174    .dw #0x7DDD  ;; Opcode for ld a, ixl
                            175 .endm
                            176 
                            177 ;; Macro: ld__b_ixl
                            178 ;;    Opcode for "LD B, ixl" instruction
                            179 ;; 
                            180 .mdelete ld__b_ixl
                            181 .macro ld__b_ixl
                            182    .dw #0x45DD  ;; Opcode for ld b, ixl
                            183 .endm
                            184 
                            185 ;; Macro: ld__c_ixl
                            186 ;;    Opcode for "LD c, ixl" instruction
                            187 ;; 
                            188 .mdelete ld__c_ixl
                            189 .macro ld__c_ixl
                            190    .dw #0x4DDD  ;; Opcode for ld c, ixl
                            191 .endm
                            192 
                            193 ;; Macro: ld__d_ixl
                            194 ;;    Opcode for "LD D, ixl" instruction
                            195 ;; 
                            196 .mdelete ld__d_ixl
                            197 .macro ld__d_ixl
                            198    .dw #0x55DD  ;; Opcode for ld d, ixl
                            199 .endm
                            200 
                            201 ;; Macro: ld__e_ixl
                            202 ;;    Opcode for "LD e, ixl" instruction
                            203 ;; 
                            204 .mdelete ld__e_ixl
                            205 .macro ld__e_ixl
                            206    .dw #0x5DDD  ;; Opcode for ld e, ixl
                            207 .endm
                            208 
                            209 ;; Macro: add__ixl
                            210 ;;    Opcode for "Add ixl" instruction
                            211 ;; 
                            212 .mdelete add__ixl
                            213 .macro add__ixl
                            214    .dw #0x85DD  ;; Opcode for add ixl
                            215 .endm
                            216 
                            217 ;; Macro: sub__ixl
                            218 ;;    Opcode for "SUB ixl" instruction
                            219 ;; 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 21.
Hexadecimal [16-Bits]



                            220 .mdelete sub__ixl
                            221 .macro sub__ixl
                            222    .dw #0x95DD  ;; Opcode for sub ixl
                            223 .endm
                            224 
                            225 ;; Macro: adc__ixl
                            226 ;;    Opcode for "ADC ixl" instruction
                            227 ;; 
                            228 .mdelete adc__ixl
                            229 .macro adc__ixl
                            230    .dw #0x8DDD  ;; Opcode for adc ixl
                            231 .endm
                            232 
                            233 ;; Macro: sbc__ixl
                            234 ;;    Opcode for "SBC ixl" instruction
                            235 ;; 
                            236 .mdelete sbc__ixl
                            237 .macro sbc__ixl
                            238    .dw #0x9DDD  ;; Opcode for sbc ixl
                            239 .endm
                            240 
                            241 ;; Macro: and__ixl
                            242 ;;    Opcode for "AND ixl" instruction
                            243 ;; 
                            244 .mdelete and__ixl
                            245 .macro and__ixl
                            246    .dw #0xA5DD  ;; Opcode for and ixl
                            247 .endm
                            248 
                            249 ;; Macro: or__ixl
                            250 ;;    Opcode for "OR ixl" instruction
                            251 ;; 
                            252 .mdelete or__ixl
                            253 .macro or__ixl
                            254    .dw #0xB5DD  ;; Opcode for or ixl
                            255 .endm
                            256 
                            257 ;; Macro: xor__ixl
                            258 ;;    Opcode for "XOR ixl" instruction
                            259 ;; 
                            260 .mdelete xor__ixl
                            261 .macro xor__ixl
                            262    .dw #0xADDD  ;; Opcode for xor ixl
                            263 .endm
                            264 
                            265 ;; Macro: cp__ixl
                            266 ;;    Opcode for "CP ixl" instruction
                            267 ;; 
                            268 .mdelete cp__ixl
                            269 .macro cp__ixl
                            270    .dw #0xBDDD  ;; Opcode for cp ixl
                            271 .endm
                            272 
                            273 ;; Macro: dec__ixl
                            274 ;;    Opcode for "DEC ixl" instruction
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 22.
Hexadecimal [16-Bits]



                            275 ;; 
                            276 .mdelete dec__ixl
                            277 .macro dec__ixl
                            278    .dw #0x2DDD  ;; Opcode for dec ixl
                            279 .endm
                            280 
                            281 ;; Macro: inc__ixl
                            282 ;;    Opcode for "INC ixl" instruction
                            283 ;; 
                            284 .mdelete inc__ixl
                            285 .macro inc__ixl
                            286    .dw #0x2CDD  ;; Opcode for inc ixl
                            287 .endm
                            288 
                            289 
                            290 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            291 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            292 ;; IXH Related Macros
                            293 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            294 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            295 
                            296 ;; Macro: ld__ixh    Value
                            297 ;;    Opcode for "LD IXH, Value" instruction
                            298 ;;  
                            299 ;; Parameters:
                            300 ;;    Value - An inmediate 8-bits value that will be loaded into IXH
                            301 ;; 
                            302 .mdelete  ld__ixh
                            303 .macro ld__ixh    Value 
                            304    .db #0xDD, #0x26, Value  ;; Opcode for ld ixh, Value
                            305 .endm
                            306 
                            307 ;; Macro: ld__ixh_a
                            308 ;;    Opcode for "LD IXH, a" instruction
                            309 ;; 
                            310 .mdelete ld__ixh_a
                            311 .macro ld__ixh_a
                            312    .dw #0x67DD  ;; Opcode for ld ixh, a
                            313 .endm
                            314 
                            315 ;; Macro: ld__ixh_b
                            316 ;;    Opcode for "LD IXH, B" instruction
                            317 ;; 
                            318 .mdelete ld__ixh_b
                            319 .macro ld__ixh_b
                            320    .dw #0x60DD  ;; Opcode for ld ixh, b
                            321 .endm
                            322 
                            323 ;; Macro: ld__ixh_c
                            324 ;;    Opcode for "LD IXH, C" instruction
                            325 ;; 
                            326 .mdelete ld__ixh_c
                            327 .macro ld__ixh_c
                            328    .dw #0x61DD  ;; Opcode for ld ixh, c
                            329 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 23.
Hexadecimal [16-Bits]



                            330 
                            331 ;; Macro: ld__ixh_d
                            332 ;;    Opcode for "LD IXH, D" instruction
                            333 ;; 
                            334 .mdelete ld__ixh_d
                            335 .macro ld__ixh_d
                            336    .dw #0x62DD  ;; Opcode for ld ixh, d
                            337 .endm
                            338 
                            339 ;; Macro: ld__ixh_e
                            340 ;;    Opcode for "LD IXH, E" instruction
                            341 ;; 
                            342 .mdelete ld__ixh_e
                            343 .macro ld__ixh_e
                            344    .dw #0x63DD  ;; Opcode for ld ixh, e
                            345 .endm
                            346 
                            347 ;; Macro: ld__ixh_ixl
                            348 ;;    Opcode for "LD IXH, IXL" instruction
                            349 ;; 
                            350 .mdelete ld__ixh_ixl
                            351 .macro ld__ixh_ixl
                            352    .dw #0x65DD  ;; Opcode for ld ixh, ixl
                            353 .endm
                            354 
                            355 ;; Macro: ld__a_ixh
                            356 ;;    Opcode for "LD A, IXH" instruction
                            357 ;; 
                            358 .mdelete ld__a_ixh
                            359 .macro ld__a_ixh
                            360    .dw #0x7CDD  ;; Opcode for ld a, ixh
                            361 .endm
                            362 
                            363 ;; Macro: ld__b_ixh
                            364 ;;    Opcode for "LD B, IXH" instruction
                            365 ;; 
                            366 .mdelete ld__b_ixh
                            367 .macro ld__b_ixh
                            368    .dw #0x44DD  ;; Opcode for ld b, ixh
                            369 .endm
                            370 
                            371 ;; Macro: ld__c_ixh
                            372 ;;    Opcode for "LD c, IXH" instruction
                            373 ;; 
                            374 .mdelete ld__c_ixh
                            375 .macro ld__c_ixh
                            376    .dw #0x4CDD  ;; Opcode for ld c, ixh
                            377 .endm
                            378 
                            379 ;; Macro: ld__d_ixh
                            380 ;;    Opcode for "LD D, IXH" instruction
                            381 ;; 
                            382 .mdelete ld__d_ixh
                            383 .macro ld__d_ixh
                            384    .dw #0x54DD  ;; Opcode for ld d, ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 24.
Hexadecimal [16-Bits]



                            385 .endm
                            386 
                            387 ;; Macro: ld__e_ixh
                            388 ;;    Opcode for "LD e, IXH" instruction
                            389 ;; 
                            390 .mdelete ld__e_ixh
                            391 .macro ld__e_ixh
                            392    .dw #0x5CDD  ;; Opcode for ld e, ixh
                            393 .endm
                            394 
                            395 ;; Macro: add__ixh
                            396 ;;    Opcode for "ADD IXH" instruction
                            397 ;; 
                            398 .mdelete add__ixh
                            399 .macro add__ixh
                            400    .dw #0x84DD  ;; Opcode for add ixh
                            401 .endm
                            402 
                            403 ;; Macro: sub__ixh
                            404 ;;    Opcode for "SUB IXH" instruction
                            405 ;; 
                            406 .mdelete sub__ixh
                            407 .macro sub__ixh
                            408    .dw #0x94DD  ;; Opcode for sub ixh
                            409 .endm
                            410 
                            411 ;; Macro: adc__ixh
                            412 ;;    Opcode for "ADC IXH" instruction
                            413 ;; 
                            414 .mdelete adc__ixh
                            415 .macro adc__ixh
                            416    .dw #0x8CDD  ;; Opcode for adc ixh
                            417 .endm
                            418 
                            419 ;; Macro: sbc__ixh
                            420 ;;    Opcode for "SBC IXH" instruction
                            421 ;; 
                            422 .mdelete sbc__ixh
                            423 .macro sbc__ixh
                            424    .dw #0x9CDD  ;; Opcode for sbc ixh
                            425 .endm
                            426 
                            427 ;; Macro: and__ixh
                            428 ;;    Opcode for "AND IXH" instruction
                            429 ;; 
                            430 .mdelete and__ixh
                            431 .macro and__ixh
                            432    .dw #0xA4DD  ;; Opcode for and ixh
                            433 .endm
                            434 
                            435 ;; Macro: or__ixh
                            436 ;;    Opcode for "OR IXH" instruction
                            437 ;; 
                            438 .mdelete or__ixh
                            439 .macro or__ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 25.
Hexadecimal [16-Bits]



                            440    .dw #0xB4DD  ;; Opcode for or ixh
                            441 .endm
                            442 
                            443 ;; Macro: xor__ixh
                            444 ;;    Opcode for "XOR IXH" instruction
                            445 ;; 
                            446 .mdelete xor__ixh
                            447 .macro xor__ixh
                            448    .dw #0xACDD  ;; Opcode for xor ixh
                            449 .endm
                            450 
                            451 ;; Macro: cp__ixh
                            452 ;;    Opcode for "CP IXH" instruction
                            453 ;; 
                            454 .mdelete cp__ixh
                            455 .macro cp__ixh
                            456    .dw #0xBCDD  ;; Opcode for cp ixh
                            457 .endm
                            458 
                            459 ;; Macro: dec__ixh
                            460 ;;    Opcode for "DEC IXH" instruction
                            461 ;; 
                            462 .mdelete dec__ixh
                            463 .macro dec__ixh
                            464    .dw #0x25DD  ;; Opcode for dec ixh
                            465 .endm
                            466 
                            467 ;; Macro: inc__ixh
                            468 ;;    Opcode for "INC IXH" instruction
                            469 ;; 
                            470 .mdelete inc__ixh
                            471 .macro inc__ixh
                            472    .dw #0x24DD  ;; Opcode for inc ixh
                            473 .endm
                            474 
                            475 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            476 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            477 ;; IYL Related Macros
                            478 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            479 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            480 
                            481 ;; Macro: ld__iyl    Value
                            482 ;;    Opcode for "LD iyl, Value" instruction
                            483 ;;  
                            484 ;; Parameters:
                            485 ;;    Value - An inmediate 8-bits value that will be loaded into iyl
                            486 ;; 
                            487 .mdelete  ld__iyl
                            488 .macro ld__iyl    Value 
                            489    .db #0xFD, #0x2E, Value  ;; Opcode for ld iyl, Value
                            490 .endm
                            491 
                            492 ;; Macro: ld__iyl_a
                            493 ;;    Opcode for "LD iyl, a" instruction
                            494 ;; 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 26.
Hexadecimal [16-Bits]



                            495 .mdelete ld__iyl_a
                            496 .macro ld__iyl_a
                            497    .dw #0x6FFD  ;; Opcode for ld iyl, a
                            498 .endm
                            499 
                            500 ;; Macro: ld__iyl_b
                            501 ;;    Opcode for "LD iyl, B" instruction
                            502 ;; 
                            503 .mdelete ld__iyl_b
                            504 .macro ld__iyl_b
                            505    .dw #0x68FD  ;; Opcode for ld iyl, b
                            506 .endm
                            507 
                            508 ;; Macro: ld__iyl_c
                            509 ;;    Opcode for "LD iyl, C" instruction
                            510 ;; 
                            511 .mdelete ld__iyl_c
                            512 .macro ld__iyl_c
                            513    .dw #0x69FD  ;; Opcode for ld iyl, c
                            514 .endm
                            515 
                            516 ;; Macro: ld__iyl_d
                            517 ;;    Opcode for "LD iyl, D" instruction
                            518 ;; 
                            519 .mdelete ld__iyl_d
                            520 .macro ld__iyl_d
                            521    .dw #0x6AFD  ;; Opcode for ld iyl, d
                            522 .endm
                            523 
                            524 ;; Macro: ld__iyl_e
                            525 ;;    Opcode for "LD iyl, E" instruction
                            526 ;; 
                            527 .mdelete ld__iyl_e
                            528 .macro ld__iyl_e
                            529    .dw #0x6BFD  ;; Opcode for ld iyl, e
                            530 .endm
                            531 
                            532 ;; Macro: ld__iyl_iyh
                            533 ;;    Opcode for "LD iyl, IXL" instruction
                            534 ;; 
                            535 .mdelete  ld__iyl_iyh
                            536 .macro ld__iyl_iyh
                            537    .dw #0x6CFD  ;; Opcode for ld iyl, ixl
                            538 .endm
                            539 
                            540 ;; Macro: ld__a_iyl
                            541 ;;    Opcode for "LD A, iyl" instruction
                            542 ;; 
                            543 .mdelete ld__a_iyl
                            544 .macro ld__a_iyl
                            545    .dw #0x7DFD  ;; Opcode for ld a, iyl
                            546 .endm
                            547 
                            548 ;; Macro: ld__b_iyl
                            549 ;;    Opcode for "LD B, iyl" instruction
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 27.
Hexadecimal [16-Bits]



                            550 ;; 
                            551 .mdelete ld__b_iyl
                            552 .macro ld__b_iyl
                            553    .dw #0x45FD  ;; Opcode for ld b, iyl
                            554 .endm
                            555 
                            556 ;; Macro: ld__c_iyl
                            557 ;;    Opcode for "LD c, iyl" instruction
                            558 ;; 
                            559 .mdelete ld__c_iyl
                            560 .macro ld__c_iyl
                            561    .dw #0x4DFD  ;; Opcode for ld c, iyl
                            562 .endm
                            563 
                            564 ;; Macro: ld__d_iyl
                            565 ;;    Opcode for "LD D, iyl" instruction
                            566 ;; 
                            567 .mdelete ld__d_iyl
                            568 .macro ld__d_iyl
                            569    .dw #0x55FD  ;; Opcode for ld d, iyl
                            570 .endm
                            571 
                            572 ;; Macro: ld__e_iyl
                            573 ;;    Opcode for "LD e, iyl" instruction
                            574 ;; 
                            575 .mdelete ld__e_iyl
                            576 .macro ld__e_iyl
                            577    .dw #0x5DFD  ;; Opcode for ld e, iyl
                            578 .endm
                            579 
                            580 ;; Macro: add__iyl
                            581 ;;    Opcode for "Add iyl" instruction
                            582 ;; 
                            583 .mdelete add__iyl
                            584 .macro add__iyl
                            585    .dw #0x85FD  ;; Opcode for add iyl
                            586 .endm
                            587 
                            588 ;; Macro: sub__iyl
                            589 ;;    Opcode for "SUB iyl" instruction
                            590 ;; 
                            591 .mdelete sub__iyl
                            592 .macro sub__iyl
                            593    .dw #0x95FD  ;; Opcode for sub iyl
                            594 .endm
                            595 
                            596 ;; Macro: adc__iyl
                            597 ;;    Opcode for "ADC iyl" instruction
                            598 ;; 
                            599 .mdelete adc__iyl
                            600 .macro adc__iyl
                            601    .dw #0x8DFD  ;; Opcode for adc iyl
                            602 .endm
                            603 
                            604 ;; Macro: sbc__iyl
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 28.
Hexadecimal [16-Bits]



                            605 ;;    Opcode for "SBC iyl" instruction
                            606 ;; 
                            607 .mdelete sbc__iyl
                            608 .macro sbc__iyl
                            609    .dw #0x9DFD  ;; Opcode for sbc iyl
                            610 .endm
                            611 
                            612 ;; Macro: and__iyl
                            613 ;;    Opcode for "AND iyl" instruction
                            614 ;; 
                            615 .mdelete and__iyl
                            616 .macro and__iyl
                            617    .dw #0xA5FD  ;; Opcode for and iyl
                            618 .endm
                            619 
                            620 ;; Macro: or__iyl
                            621 ;;    Opcode for "OR iyl" instruction
                            622 ;; 
                            623 .mdelete or__iyl
                            624 .macro or__iyl
                            625    .dw #0xB5FD  ;; Opcode for or iyl
                            626 .endm
                            627 
                            628 ;; Macro: xor__iyl
                            629 ;;    Opcode for "XOR iyl" instruction
                            630 ;; 
                            631 .mdelete xor__iyl
                            632 .macro xor__iyl
                            633    .dw #0xADFD  ;; Opcode for xor iyl
                            634 .endm
                            635 
                            636 ;; Macro: cp__iyl
                            637 ;;    Opcode for "CP iyl" instruction
                            638 ;; 
                            639 .mdelete cp__iyl
                            640 .macro cp__iyl
                            641    .dw #0xBDFD  ;; Opcode for cp iyl
                            642 .endm
                            643 
                            644 ;; Macro: dec__iyl
                            645 ;;    Opcode for "DEC iyl" instruction
                            646 ;; 
                            647 .mdelete dec__iyl
                            648 .macro dec__iyl
                            649    .dw #0x2DFD  ;; Opcode for dec iyl
                            650 .endm
                            651 
                            652 ;; Macro: inc__iyl
                            653 ;;    Opcode for "INC iyl" instruction
                            654 ;; 
                            655 .mdelete inc__iyl
                            656 .macro inc__iyl
                            657    .dw #0x2CFD  ;; Opcode for inc iyl
                            658 .endm
                            659 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 29.
Hexadecimal [16-Bits]



                            660 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            661 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            662 ;; IYH Related Macros
                            663 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            664 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            665 
                            666 ;; Macro: ld__iyh    Value
                            667 ;;    Opcode for "LD iyh, Value" instruction
                            668 ;;  
                            669 ;; Parameters:
                            670 ;;    Value - An inmediate 8-bits value that will be loaded into iyh
                            671 ;; 
                            672 .mdelete  ld__iyh
                            673 .macro ld__iyh    Value 
                            674    .db #0xFD, #0x26, Value  ;; Opcode for ld iyh, Value
                            675 .endm
                            676 
                            677 ;; Macro: ld__iyh_a
                            678 ;;    Opcode for "LD iyh, a" instruction
                            679 ;; 
                            680 .mdelete ld__iyh_a
                            681 .macro ld__iyh_a
                            682    .dw #0x67FD  ;; Opcode for ld iyh, a
                            683 .endm
                            684 
                            685 ;; Macro: ld__iyh_b
                            686 ;;    Opcode for "LD iyh, B" instruction
                            687 ;; 
                            688 .mdelete ld__iyh_b
                            689 .macro ld__iyh_b
                            690    .dw #0x60FD  ;; Opcode for ld iyh, b
                            691 .endm
                            692 
                            693 ;; Macro: ld__iyh_c
                            694 ;;    Opcode for "LD iyh, C" instruction
                            695 ;; 
                            696 .mdelete ld__iyh_c
                            697 .macro ld__iyh_c
                            698    .dw #0x61FD  ;; Opcode for ld iyh, c
                            699 .endm
                            700 
                            701 ;; Macro: ld__iyh_d
                            702 ;;    Opcode for "LD iyh, D" instruction
                            703 ;; 
                            704 .mdelete ld__iyh_d
                            705 .macro ld__iyh_d
                            706    .dw #0x62FD  ;; Opcode for ld iyh, d
                            707 .endm
                            708 
                            709 ;; Macro: ld__iyh_e
                            710 ;;    Opcode for "LD iyh, E" instruction
                            711 ;; 
                            712 .mdelete ld__iyh_e
                            713 .macro ld__iyh_e
                            714    .dw #0x63FD  ;; Opcode for ld iyh, e
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 30.
Hexadecimal [16-Bits]



                            715 .endm
                            716 
                            717 ;; Macro: ld__iyh_iyl
                            718 ;;    Opcode for "LD iyh, IyL" instruction
                            719 ;; 
                            720 .mdelete  ld__iyh_iyl
                            721 .macro ld__iyh_iyl
                            722    .dw #0x65FD  ;; Opcode for ld iyh, iyl
                            723 .endm
                            724 
                            725 ;; Macro: ld__a_iyh
                            726 ;;    Opcode for "LD A, iyh" instruction
                            727 ;; 
                            728 .mdelete ld__a_iyh
                            729 .macro ld__a_iyh
                            730    .dw #0x7CFD  ;; Opcode for ld a, iyh
                            731 .endm
                            732 
                            733 ;; Macro: ld__b_iyh
                            734 ;;    Opcode for "LD B, iyh" instruction
                            735 ;; 
                            736 .mdelete ld__b_iyh
                            737 .macro ld__b_iyh
                            738    .dw #0x44FD  ;; Opcode for ld b, iyh
                            739 .endm
                            740 
                            741 ;; Macro: ld__c_iyh
                            742 ;;    Opcode for "LD c, iyh" instruction
                            743 ;; 
                            744 .mdelete ld__c_iyh
                            745 .macro ld__c_iyh
                            746    .dw #0x4CFD  ;; Opcode for ld c, iyh
                            747 .endm
                            748 
                            749 ;; Macro: ld__d_iyh
                            750 ;;    Opcode for "LD D, iyh" instruction
                            751 ;; 
                            752 .mdelete ld__d_iyh
                            753 .macro ld__d_iyh
                            754    .dw #0x54FD  ;; Opcode for ld d, iyh
                            755 .endm
                            756 
                            757 ;; Macro: ld__e_iyh
                            758 ;;    Opcode for "LD e, iyh" instruction
                            759 ;; 
                            760 .mdelete ld__e_iyh
                            761 .macro ld__e_iyh
                            762    .dw #0x5CFD  ;; Opcode for ld e, iyh
                            763 .endm
                            764 
                            765 ;; Macro: add__iyh
                            766 ;;    Opcode for "Add iyh" instruction
                            767 ;; 
                            768 .mdelete add__iyh
                            769 .macro add__iyh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 31.
Hexadecimal [16-Bits]



                            770    .dw #0x84FD  ;; Opcode for add iyh
                            771 .endm
                            772 
                            773 ;; Macro: sub__iyh
                            774 ;;    Opcode for "SUB iyh" instruction
                            775 ;; 
                            776 .mdelete sub__iyh
                            777 .macro sub__iyh
                            778    .dw #0x94FD  ;; Opcode for sub iyh
                            779 .endm
                            780 
                            781 ;; Macro: adc__iyh
                            782 ;;    Opcode for "ADC iyh" instruction
                            783 ;; 
                            784 .mdelete adc__iyh
                            785 .macro adc__iyh
                            786    .dw #0x8CFD  ;; Opcode for adc iyh
                            787 .endm
                            788 
                            789 ;; Macro: sbc__iyh
                            790 ;;    Opcode for "SBC iyh" instruction
                            791 ;; 
                            792 .mdelete sbc__iyh
                            793 .macro sbc__iyh
                            794    .dw #0x9CFD  ;; Opcode for sbc iyh
                            795 .endm
                            796 
                            797 ;; Macro: and__iyh
                            798 ;;    Opcode for "AND iyh" instruction
                            799 ;; 
                            800 .mdelete and__iyh
                            801 .macro and__iyh
                            802    .dw #0xA4FD  ;; Opcode for and iyh
                            803 .endm
                            804 
                            805 ;; Macro: or__iyh
                            806 ;;    Opcode for "OR iyh" instruction
                            807 ;; 
                            808 .mdelete or__iyh
                            809 .macro or__iyh
                            810    .dw #0xB4FD  ;; Opcode for or iyh
                            811 .endm
                            812 
                            813 ;; Macro: xor__iyh
                            814 ;;    Opcode for "XOR iyh" instruction
                            815 ;; 
                            816 .mdelete xor__iyh
                            817 .macro xor__iyh
                            818    .dw #0xACFD  ;; Opcode for xor iyh
                            819 .endm
                            820 
                            821 ;; Macro: cp__iyh
                            822 ;;    Opcode for "CP iyh" instruction
                            823 ;; 
                            824 .mdelete cp__iyh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 32.
Hexadecimal [16-Bits]



                            825 .macro cp__iyh
                            826    .dw #0xBCFD  ;; Opcode for cp iyh
                            827 .endm
                            828 
                            829 ;; Macro: dec__iyh
                            830 ;;    Opcode for "DEC iyh" instruction
                            831 ;; 
                            832 .mdelete dec__iyh
                            833 .macro dec__iyh
                            834    .dw #0x25FD  ;; Opcode for dec iyh
                            835 .endm
                            836 
                            837 ;; Macro: inc__iyh
                            838 ;;    Opcode for "INC iyh" instruction
                            839 ;; 
                            840 .mdelete inc__iyh
                            841 .macro inc__iyh
                            842    .dw #0x24FD  ;; Opcode for inc iyh
                            843 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 33.
Hexadecimal [16-Bits]



                             23 .include "macros/cpct_combinedOperations.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Combined operations
                             21 ;;
                             22 ;;    Macros to clarify source code that combine several operations in one macro.
                             23 ;; For instance, macros to copy HL to DE or IX to DE, that require 2 or more 
                             24 ;; instructions but are commonly used.
                             25 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 34.
Hexadecimal [16-Bits]



                             26 .include "macros/cpct_undocumentedOpcodes.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Undocumented Opcodes
                             21 ;;
                             22 ;;    Macros to clarify source code when using undocumented opcodes. Only
                             23 ;; valid to be used from assembly language (not from C).
                             24 ;;
                             25 
                             26 ;; Macro: jr__0
                             27 ;;    Opcode for "JR #0" instruction
                             28 ;; 
                             29 .mdelete jr__0
                             30 .macro jr__0
                             31    .DW #0x0018  ;; JR #00 (Normally used as a modifiable jump, as jr 0 is an infinite loop)
                             32 .endm
                             33 
                             34 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             35 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             36 ;; SLL Instructions
                             37 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             38 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             39 
                             40 ;; Macro: sll__b
                             41 ;;    Opcode for "SLL b" instruction
                             42 ;; 
                             43 .mdelete sll__b
                             44 .macro sll__b
                             45    .db #0xCB, #0x30  ;; Opcode for sll b
                             46 .endm
                             47 
                             48 ;; Macro: sll__c
                             49 ;;    Opcode for "SLL c" instruction
                             50 ;; 
                             51 .mdelete sll__c
                             52 .macro sll__c
                             53    .db #0xCB, #0x31  ;; Opcode for sll c
                             54 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 35.
Hexadecimal [16-Bits]



                             55 
                             56 ;; Macro: sll__d
                             57 ;;    Opcode for "SLL d" instruction
                             58 ;; 
                             59 .mdelete sll__d
                             60 .macro sll__d
                             61    .db #0xCB, #0x32  ;; Opcode for sll d
                             62 .endm
                             63 
                             64 ;; Macro: sll__e
                             65 ;;    Opcode for "SLL e" instruction
                             66 ;; 
                             67 .mdelete sll__e
                             68 .macro sll__e
                             69    .db #0xCB, #0x33  ;; Opcode for sll e
                             70 .endm
                             71 
                             72 ;; Macro: sll__h
                             73 ;;    Opcode for "SLL h" instruction
                             74 ;; 
                             75 .mdelete sll__h
                             76 .macro sll__h
                             77    .db #0xCB, #0x34  ;; Opcode for sll h
                             78 .endm
                             79 
                             80 ;; Macro: sll__l
                             81 ;;    Opcode for "SLL l" instruction
                             82 ;; 
                             83 .mdelete sll__l
                             84 .macro sll__l
                             85    .db #0xCB, #0x35  ;; Opcode for sll l
                             86 .endm
                             87 
                             88 ;; Macro: sll___hl_
                             89 ;;    Opcode for "SLL (hl)" instruction
                             90 ;; 
                             91 .mdelete sll___hl_
                             92 .macro sll___hl_
                             93    .db #0xCB, #0x36  ;; Opcode for sll (hl)
                             94 .endm
                             95 
                             96 ;; Macro: sll__a
                             97 ;;    Opcode for "SLL a" instruction
                             98 ;; 
                             99 .mdelete sll__a
                            100 .macro sll__a
                            101    .db #0xCB, #0x37  ;; Opcode for sll a
                            102 .endm
                            103 
                            104 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            105 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            106 ;; IXL Related Macros
                            107 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            108 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            109 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 36.
Hexadecimal [16-Bits]



                            110 ;; Macro: ld__ixl    Value
                            111 ;;    Opcode for "LD ixl, Value" instruction
                            112 ;;  
                            113 ;; Parameters:
                            114 ;;    Value - An inmediate 8-bits value that will be loaded into ixl
                            115 ;; 
                            116 .mdelete ld__ixl
                            117 .macro ld__ixl    Value 
                            118    .db #0xDD, #0x2E, Value  ;; Opcode for ld ixl, Value
                            119 .endm
                            120 
                            121 ;; Macro: ld__ixl_a
                            122 ;;    Opcode for "LD ixl, a" instruction
                            123 ;; 
                            124 .mdelete ld__ixl_a
                            125 .macro ld__ixl_a
                            126    .dw #0x6FDD  ;; Opcode for ld ixl, a
                            127 .endm
                            128 
                            129 ;; Macro: ld__ixl_b
                            130 ;;    Opcode for "LD ixl, B" instruction
                            131 ;; 
                            132 .mdelete ld__ixl_b
                            133 .macro ld__ixl_b
                            134    .dw #0x68DD  ;; Opcode for ld ixl, b
                            135 .endm
                            136 
                            137 ;; Macro: ld__ixl_c
                            138 ;;    Opcode for "LD ixl, C" instruction
                            139 ;; 
                            140 .mdelete ld__ixl_c
                            141 .macro ld__ixl_c
                            142    .dw #0x69DD  ;; Opcode for ld ixl, c
                            143 .endm
                            144 
                            145 ;; Macro: ld__ixl_d
                            146 ;;    Opcode for "LD ixl, D" instruction
                            147 ;; 
                            148 .mdelete ld__ixl_d
                            149 .macro ld__ixl_d
                            150    .dw #0x6ADD  ;; Opcode for ld ixl, d
                            151 .endm
                            152 
                            153 ;; Macro: ld__ixl_e
                            154 ;;    Opcode for "LD ixl, E" instruction
                            155 ;; 
                            156 .mdelete ld__ixl_e
                            157 .macro ld__ixl_e
                            158    .dw #0x6BDD  ;; Opcode for ld ixl, e
                            159 .endm
                            160 
                            161 ;; Macro: ld__ixl_ixh
                            162 ;;    Opcode for "LD ixl, IXH" instruction
                            163 ;; 
                            164 .mdelete  ld__ixl_ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 37.
Hexadecimal [16-Bits]



                            165 .macro ld__ixl_ixh
                            166    .dw #0x6CDD  ;; Opcode for ld ixl, ixh
                            167 .endm
                            168 
                            169 ;; Macro: ld__a_ixl
                            170 ;;    Opcode for "LD A, ixl" instruction
                            171 ;; 
                            172 .mdelete ld__a_ixl
                            173 .macro ld__a_ixl
                            174    .dw #0x7DDD  ;; Opcode for ld a, ixl
                            175 .endm
                            176 
                            177 ;; Macro: ld__b_ixl
                            178 ;;    Opcode for "LD B, ixl" instruction
                            179 ;; 
                            180 .mdelete ld__b_ixl
                            181 .macro ld__b_ixl
                            182    .dw #0x45DD  ;; Opcode for ld b, ixl
                            183 .endm
                            184 
                            185 ;; Macro: ld__c_ixl
                            186 ;;    Opcode for "LD c, ixl" instruction
                            187 ;; 
                            188 .mdelete ld__c_ixl
                            189 .macro ld__c_ixl
                            190    .dw #0x4DDD  ;; Opcode for ld c, ixl
                            191 .endm
                            192 
                            193 ;; Macro: ld__d_ixl
                            194 ;;    Opcode for "LD D, ixl" instruction
                            195 ;; 
                            196 .mdelete ld__d_ixl
                            197 .macro ld__d_ixl
                            198    .dw #0x55DD  ;; Opcode for ld d, ixl
                            199 .endm
                            200 
                            201 ;; Macro: ld__e_ixl
                            202 ;;    Opcode for "LD e, ixl" instruction
                            203 ;; 
                            204 .mdelete ld__e_ixl
                            205 .macro ld__e_ixl
                            206    .dw #0x5DDD  ;; Opcode for ld e, ixl
                            207 .endm
                            208 
                            209 ;; Macro: add__ixl
                            210 ;;    Opcode for "Add ixl" instruction
                            211 ;; 
                            212 .mdelete add__ixl
                            213 .macro add__ixl
                            214    .dw #0x85DD  ;; Opcode for add ixl
                            215 .endm
                            216 
                            217 ;; Macro: sub__ixl
                            218 ;;    Opcode for "SUB ixl" instruction
                            219 ;; 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 38.
Hexadecimal [16-Bits]



                            220 .mdelete sub__ixl
                            221 .macro sub__ixl
                            222    .dw #0x95DD  ;; Opcode for sub ixl
                            223 .endm
                            224 
                            225 ;; Macro: adc__ixl
                            226 ;;    Opcode for "ADC ixl" instruction
                            227 ;; 
                            228 .mdelete adc__ixl
                            229 .macro adc__ixl
                            230    .dw #0x8DDD  ;; Opcode for adc ixl
                            231 .endm
                            232 
                            233 ;; Macro: sbc__ixl
                            234 ;;    Opcode for "SBC ixl" instruction
                            235 ;; 
                            236 .mdelete sbc__ixl
                            237 .macro sbc__ixl
                            238    .dw #0x9DDD  ;; Opcode for sbc ixl
                            239 .endm
                            240 
                            241 ;; Macro: and__ixl
                            242 ;;    Opcode for "AND ixl" instruction
                            243 ;; 
                            244 .mdelete and__ixl
                            245 .macro and__ixl
                            246    .dw #0xA5DD  ;; Opcode for and ixl
                            247 .endm
                            248 
                            249 ;; Macro: or__ixl
                            250 ;;    Opcode for "OR ixl" instruction
                            251 ;; 
                            252 .mdelete or__ixl
                            253 .macro or__ixl
                            254    .dw #0xB5DD  ;; Opcode for or ixl
                            255 .endm
                            256 
                            257 ;; Macro: xor__ixl
                            258 ;;    Opcode for "XOR ixl" instruction
                            259 ;; 
                            260 .mdelete xor__ixl
                            261 .macro xor__ixl
                            262    .dw #0xADDD  ;; Opcode for xor ixl
                            263 .endm
                            264 
                            265 ;; Macro: cp__ixl
                            266 ;;    Opcode for "CP ixl" instruction
                            267 ;; 
                            268 .mdelete cp__ixl
                            269 .macro cp__ixl
                            270    .dw #0xBDDD  ;; Opcode for cp ixl
                            271 .endm
                            272 
                            273 ;; Macro: dec__ixl
                            274 ;;    Opcode for "DEC ixl" instruction
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 39.
Hexadecimal [16-Bits]



                            275 ;; 
                            276 .mdelete dec__ixl
                            277 .macro dec__ixl
                            278    .dw #0x2DDD  ;; Opcode for dec ixl
                            279 .endm
                            280 
                            281 ;; Macro: inc__ixl
                            282 ;;    Opcode for "INC ixl" instruction
                            283 ;; 
                            284 .mdelete inc__ixl
                            285 .macro inc__ixl
                            286    .dw #0x2CDD  ;; Opcode for inc ixl
                            287 .endm
                            288 
                            289 
                            290 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            291 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            292 ;; IXH Related Macros
                            293 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            294 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            295 
                            296 ;; Macro: ld__ixh    Value
                            297 ;;    Opcode for "LD IXH, Value" instruction
                            298 ;;  
                            299 ;; Parameters:
                            300 ;;    Value - An inmediate 8-bits value that will be loaded into IXH
                            301 ;; 
                            302 .mdelete  ld__ixh
                            303 .macro ld__ixh    Value 
                            304    .db #0xDD, #0x26, Value  ;; Opcode for ld ixh, Value
                            305 .endm
                            306 
                            307 ;; Macro: ld__ixh_a
                            308 ;;    Opcode for "LD IXH, a" instruction
                            309 ;; 
                            310 .mdelete ld__ixh_a
                            311 .macro ld__ixh_a
                            312    .dw #0x67DD  ;; Opcode for ld ixh, a
                            313 .endm
                            314 
                            315 ;; Macro: ld__ixh_b
                            316 ;;    Opcode for "LD IXH, B" instruction
                            317 ;; 
                            318 .mdelete ld__ixh_b
                            319 .macro ld__ixh_b
                            320    .dw #0x60DD  ;; Opcode for ld ixh, b
                            321 .endm
                            322 
                            323 ;; Macro: ld__ixh_c
                            324 ;;    Opcode for "LD IXH, C" instruction
                            325 ;; 
                            326 .mdelete ld__ixh_c
                            327 .macro ld__ixh_c
                            328    .dw #0x61DD  ;; Opcode for ld ixh, c
                            329 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 40.
Hexadecimal [16-Bits]



                            330 
                            331 ;; Macro: ld__ixh_d
                            332 ;;    Opcode for "LD IXH, D" instruction
                            333 ;; 
                            334 .mdelete ld__ixh_d
                            335 .macro ld__ixh_d
                            336    .dw #0x62DD  ;; Opcode for ld ixh, d
                            337 .endm
                            338 
                            339 ;; Macro: ld__ixh_e
                            340 ;;    Opcode for "LD IXH, E" instruction
                            341 ;; 
                            342 .mdelete ld__ixh_e
                            343 .macro ld__ixh_e
                            344    .dw #0x63DD  ;; Opcode for ld ixh, e
                            345 .endm
                            346 
                            347 ;; Macro: ld__ixh_ixl
                            348 ;;    Opcode for "LD IXH, IXL" instruction
                            349 ;; 
                            350 .mdelete ld__ixh_ixl
                            351 .macro ld__ixh_ixl
                            352    .dw #0x65DD  ;; Opcode for ld ixh, ixl
                            353 .endm
                            354 
                            355 ;; Macro: ld__a_ixh
                            356 ;;    Opcode for "LD A, IXH" instruction
                            357 ;; 
                            358 .mdelete ld__a_ixh
                            359 .macro ld__a_ixh
                            360    .dw #0x7CDD  ;; Opcode for ld a, ixh
                            361 .endm
                            362 
                            363 ;; Macro: ld__b_ixh
                            364 ;;    Opcode for "LD B, IXH" instruction
                            365 ;; 
                            366 .mdelete ld__b_ixh
                            367 .macro ld__b_ixh
                            368    .dw #0x44DD  ;; Opcode for ld b, ixh
                            369 .endm
                            370 
                            371 ;; Macro: ld__c_ixh
                            372 ;;    Opcode for "LD c, IXH" instruction
                            373 ;; 
                            374 .mdelete ld__c_ixh
                            375 .macro ld__c_ixh
                            376    .dw #0x4CDD  ;; Opcode for ld c, ixh
                            377 .endm
                            378 
                            379 ;; Macro: ld__d_ixh
                            380 ;;    Opcode for "LD D, IXH" instruction
                            381 ;; 
                            382 .mdelete ld__d_ixh
                            383 .macro ld__d_ixh
                            384    .dw #0x54DD  ;; Opcode for ld d, ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 41.
Hexadecimal [16-Bits]



                            385 .endm
                            386 
                            387 ;; Macro: ld__e_ixh
                            388 ;;    Opcode for "LD e, IXH" instruction
                            389 ;; 
                            390 .mdelete ld__e_ixh
                            391 .macro ld__e_ixh
                            392    .dw #0x5CDD  ;; Opcode for ld e, ixh
                            393 .endm
                            394 
                            395 ;; Macro: add__ixh
                            396 ;;    Opcode for "ADD IXH" instruction
                            397 ;; 
                            398 .mdelete add__ixh
                            399 .macro add__ixh
                            400    .dw #0x84DD  ;; Opcode for add ixh
                            401 .endm
                            402 
                            403 ;; Macro: sub__ixh
                            404 ;;    Opcode for "SUB IXH" instruction
                            405 ;; 
                            406 .mdelete sub__ixh
                            407 .macro sub__ixh
                            408    .dw #0x94DD  ;; Opcode for sub ixh
                            409 .endm
                            410 
                            411 ;; Macro: adc__ixh
                            412 ;;    Opcode for "ADC IXH" instruction
                            413 ;; 
                            414 .mdelete adc__ixh
                            415 .macro adc__ixh
                            416    .dw #0x8CDD  ;; Opcode for adc ixh
                            417 .endm
                            418 
                            419 ;; Macro: sbc__ixh
                            420 ;;    Opcode for "SBC IXH" instruction
                            421 ;; 
                            422 .mdelete sbc__ixh
                            423 .macro sbc__ixh
                            424    .dw #0x9CDD  ;; Opcode for sbc ixh
                            425 .endm
                            426 
                            427 ;; Macro: and__ixh
                            428 ;;    Opcode for "AND IXH" instruction
                            429 ;; 
                            430 .mdelete and__ixh
                            431 .macro and__ixh
                            432    .dw #0xA4DD  ;; Opcode for and ixh
                            433 .endm
                            434 
                            435 ;; Macro: or__ixh
                            436 ;;    Opcode for "OR IXH" instruction
                            437 ;; 
                            438 .mdelete or__ixh
                            439 .macro or__ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 42.
Hexadecimal [16-Bits]



                            440    .dw #0xB4DD  ;; Opcode for or ixh
                            441 .endm
                            442 
                            443 ;; Macro: xor__ixh
                            444 ;;    Opcode for "XOR IXH" instruction
                            445 ;; 
                            446 .mdelete xor__ixh
                            447 .macro xor__ixh
                            448    .dw #0xACDD  ;; Opcode for xor ixh
                            449 .endm
                            450 
                            451 ;; Macro: cp__ixh
                            452 ;;    Opcode for "CP IXH" instruction
                            453 ;; 
                            454 .mdelete cp__ixh
                            455 .macro cp__ixh
                            456    .dw #0xBCDD  ;; Opcode for cp ixh
                            457 .endm
                            458 
                            459 ;; Macro: dec__ixh
                            460 ;;    Opcode for "DEC IXH" instruction
                            461 ;; 
                            462 .mdelete dec__ixh
                            463 .macro dec__ixh
                            464    .dw #0x25DD  ;; Opcode for dec ixh
                            465 .endm
                            466 
                            467 ;; Macro: inc__ixh
                            468 ;;    Opcode for "INC IXH" instruction
                            469 ;; 
                            470 .mdelete inc__ixh
                            471 .macro inc__ixh
                            472    .dw #0x24DD  ;; Opcode for inc ixh
                            473 .endm
                            474 
                            475 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            476 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            477 ;; IYL Related Macros
                            478 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            479 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            480 
                            481 ;; Macro: ld__iyl    Value
                            482 ;;    Opcode for "LD iyl, Value" instruction
                            483 ;;  
                            484 ;; Parameters:
                            485 ;;    Value - An inmediate 8-bits value that will be loaded into iyl
                            486 ;; 
                            487 .mdelete  ld__iyl
                            488 .macro ld__iyl    Value 
                            489    .db #0xFD, #0x2E, Value  ;; Opcode for ld iyl, Value
                            490 .endm
                            491 
                            492 ;; Macro: ld__iyl_a
                            493 ;;    Opcode for "LD iyl, a" instruction
                            494 ;; 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 43.
Hexadecimal [16-Bits]



                            495 .mdelete ld__iyl_a
                            496 .macro ld__iyl_a
                            497    .dw #0x6FFD  ;; Opcode for ld iyl, a
                            498 .endm
                            499 
                            500 ;; Macro: ld__iyl_b
                            501 ;;    Opcode for "LD iyl, B" instruction
                            502 ;; 
                            503 .mdelete ld__iyl_b
                            504 .macro ld__iyl_b
                            505    .dw #0x68FD  ;; Opcode for ld iyl, b
                            506 .endm
                            507 
                            508 ;; Macro: ld__iyl_c
                            509 ;;    Opcode for "LD iyl, C" instruction
                            510 ;; 
                            511 .mdelete ld__iyl_c
                            512 .macro ld__iyl_c
                            513    .dw #0x69FD  ;; Opcode for ld iyl, c
                            514 .endm
                            515 
                            516 ;; Macro: ld__iyl_d
                            517 ;;    Opcode for "LD iyl, D" instruction
                            518 ;; 
                            519 .mdelete ld__iyl_d
                            520 .macro ld__iyl_d
                            521    .dw #0x6AFD  ;; Opcode for ld iyl, d
                            522 .endm
                            523 
                            524 ;; Macro: ld__iyl_e
                            525 ;;    Opcode for "LD iyl, E" instruction
                            526 ;; 
                            527 .mdelete ld__iyl_e
                            528 .macro ld__iyl_e
                            529    .dw #0x6BFD  ;; Opcode for ld iyl, e
                            530 .endm
                            531 
                            532 ;; Macro: ld__iyl_iyh
                            533 ;;    Opcode for "LD iyl, IXL" instruction
                            534 ;; 
                            535 .mdelete  ld__iyl_iyh
                            536 .macro ld__iyl_iyh
                            537    .dw #0x6CFD  ;; Opcode for ld iyl, ixl
                            538 .endm
                            539 
                            540 ;; Macro: ld__a_iyl
                            541 ;;    Opcode for "LD A, iyl" instruction
                            542 ;; 
                            543 .mdelete ld__a_iyl
                            544 .macro ld__a_iyl
                            545    .dw #0x7DFD  ;; Opcode for ld a, iyl
                            546 .endm
                            547 
                            548 ;; Macro: ld__b_iyl
                            549 ;;    Opcode for "LD B, iyl" instruction
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 44.
Hexadecimal [16-Bits]



                            550 ;; 
                            551 .mdelete ld__b_iyl
                            552 .macro ld__b_iyl
                            553    .dw #0x45FD  ;; Opcode for ld b, iyl
                            554 .endm
                            555 
                            556 ;; Macro: ld__c_iyl
                            557 ;;    Opcode for "LD c, iyl" instruction
                            558 ;; 
                            559 .mdelete ld__c_iyl
                            560 .macro ld__c_iyl
                            561    .dw #0x4DFD  ;; Opcode for ld c, iyl
                            562 .endm
                            563 
                            564 ;; Macro: ld__d_iyl
                            565 ;;    Opcode for "LD D, iyl" instruction
                            566 ;; 
                            567 .mdelete ld__d_iyl
                            568 .macro ld__d_iyl
                            569    .dw #0x55FD  ;; Opcode for ld d, iyl
                            570 .endm
                            571 
                            572 ;; Macro: ld__e_iyl
                            573 ;;    Opcode for "LD e, iyl" instruction
                            574 ;; 
                            575 .mdelete ld__e_iyl
                            576 .macro ld__e_iyl
                            577    .dw #0x5DFD  ;; Opcode for ld e, iyl
                            578 .endm
                            579 
                            580 ;; Macro: add__iyl
                            581 ;;    Opcode for "Add iyl" instruction
                            582 ;; 
                            583 .mdelete add__iyl
                            584 .macro add__iyl
                            585    .dw #0x85FD  ;; Opcode for add iyl
                            586 .endm
                            587 
                            588 ;; Macro: sub__iyl
                            589 ;;    Opcode for "SUB iyl" instruction
                            590 ;; 
                            591 .mdelete sub__iyl
                            592 .macro sub__iyl
                            593    .dw #0x95FD  ;; Opcode for sub iyl
                            594 .endm
                            595 
                            596 ;; Macro: adc__iyl
                            597 ;;    Opcode for "ADC iyl" instruction
                            598 ;; 
                            599 .mdelete adc__iyl
                            600 .macro adc__iyl
                            601    .dw #0x8DFD  ;; Opcode for adc iyl
                            602 .endm
                            603 
                            604 ;; Macro: sbc__iyl
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 45.
Hexadecimal [16-Bits]



                            605 ;;    Opcode for "SBC iyl" instruction
                            606 ;; 
                            607 .mdelete sbc__iyl
                            608 .macro sbc__iyl
                            609    .dw #0x9DFD  ;; Opcode for sbc iyl
                            610 .endm
                            611 
                            612 ;; Macro: and__iyl
                            613 ;;    Opcode for "AND iyl" instruction
                            614 ;; 
                            615 .mdelete and__iyl
                            616 .macro and__iyl
                            617    .dw #0xA5FD  ;; Opcode for and iyl
                            618 .endm
                            619 
                            620 ;; Macro: or__iyl
                            621 ;;    Opcode for "OR iyl" instruction
                            622 ;; 
                            623 .mdelete or__iyl
                            624 .macro or__iyl
                            625    .dw #0xB5FD  ;; Opcode for or iyl
                            626 .endm
                            627 
                            628 ;; Macro: xor__iyl
                            629 ;;    Opcode for "XOR iyl" instruction
                            630 ;; 
                            631 .mdelete xor__iyl
                            632 .macro xor__iyl
                            633    .dw #0xADFD  ;; Opcode for xor iyl
                            634 .endm
                            635 
                            636 ;; Macro: cp__iyl
                            637 ;;    Opcode for "CP iyl" instruction
                            638 ;; 
                            639 .mdelete cp__iyl
                            640 .macro cp__iyl
                            641    .dw #0xBDFD  ;; Opcode for cp iyl
                            642 .endm
                            643 
                            644 ;; Macro: dec__iyl
                            645 ;;    Opcode for "DEC iyl" instruction
                            646 ;; 
                            647 .mdelete dec__iyl
                            648 .macro dec__iyl
                            649    .dw #0x2DFD  ;; Opcode for dec iyl
                            650 .endm
                            651 
                            652 ;; Macro: inc__iyl
                            653 ;;    Opcode for "INC iyl" instruction
                            654 ;; 
                            655 .mdelete inc__iyl
                            656 .macro inc__iyl
                            657    .dw #0x2CFD  ;; Opcode for inc iyl
                            658 .endm
                            659 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 46.
Hexadecimal [16-Bits]



                            660 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            661 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            662 ;; IYH Related Macros
                            663 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            664 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            665 
                            666 ;; Macro: ld__iyh    Value
                            667 ;;    Opcode for "LD iyh, Value" instruction
                            668 ;;  
                            669 ;; Parameters:
                            670 ;;    Value - An inmediate 8-bits value that will be loaded into iyh
                            671 ;; 
                            672 .mdelete  ld__iyh
                            673 .macro ld__iyh    Value 
                            674    .db #0xFD, #0x26, Value  ;; Opcode for ld iyh, Value
                            675 .endm
                            676 
                            677 ;; Macro: ld__iyh_a
                            678 ;;    Opcode for "LD iyh, a" instruction
                            679 ;; 
                            680 .mdelete ld__iyh_a
                            681 .macro ld__iyh_a
                            682    .dw #0x67FD  ;; Opcode for ld iyh, a
                            683 .endm
                            684 
                            685 ;; Macro: ld__iyh_b
                            686 ;;    Opcode for "LD iyh, B" instruction
                            687 ;; 
                            688 .mdelete ld__iyh_b
                            689 .macro ld__iyh_b
                            690    .dw #0x60FD  ;; Opcode for ld iyh, b
                            691 .endm
                            692 
                            693 ;; Macro: ld__iyh_c
                            694 ;;    Opcode for "LD iyh, C" instruction
                            695 ;; 
                            696 .mdelete ld__iyh_c
                            697 .macro ld__iyh_c
                            698    .dw #0x61FD  ;; Opcode for ld iyh, c
                            699 .endm
                            700 
                            701 ;; Macro: ld__iyh_d
                            702 ;;    Opcode for "LD iyh, D" instruction
                            703 ;; 
                            704 .mdelete ld__iyh_d
                            705 .macro ld__iyh_d
                            706    .dw #0x62FD  ;; Opcode for ld iyh, d
                            707 .endm
                            708 
                            709 ;; Macro: ld__iyh_e
                            710 ;;    Opcode for "LD iyh, E" instruction
                            711 ;; 
                            712 .mdelete ld__iyh_e
                            713 .macro ld__iyh_e
                            714    .dw #0x63FD  ;; Opcode for ld iyh, e
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 47.
Hexadecimal [16-Bits]



                            715 .endm
                            716 
                            717 ;; Macro: ld__iyh_iyl
                            718 ;;    Opcode for "LD iyh, IyL" instruction
                            719 ;; 
                            720 .mdelete  ld__iyh_iyl
                            721 .macro ld__iyh_iyl
                            722    .dw #0x65FD  ;; Opcode for ld iyh, iyl
                            723 .endm
                            724 
                            725 ;; Macro: ld__a_iyh
                            726 ;;    Opcode for "LD A, iyh" instruction
                            727 ;; 
                            728 .mdelete ld__a_iyh
                            729 .macro ld__a_iyh
                            730    .dw #0x7CFD  ;; Opcode for ld a, iyh
                            731 .endm
                            732 
                            733 ;; Macro: ld__b_iyh
                            734 ;;    Opcode for "LD B, iyh" instruction
                            735 ;; 
                            736 .mdelete ld__b_iyh
                            737 .macro ld__b_iyh
                            738    .dw #0x44FD  ;; Opcode for ld b, iyh
                            739 .endm
                            740 
                            741 ;; Macro: ld__c_iyh
                            742 ;;    Opcode for "LD c, iyh" instruction
                            743 ;; 
                            744 .mdelete ld__c_iyh
                            745 .macro ld__c_iyh
                            746    .dw #0x4CFD  ;; Opcode for ld c, iyh
                            747 .endm
                            748 
                            749 ;; Macro: ld__d_iyh
                            750 ;;    Opcode for "LD D, iyh" instruction
                            751 ;; 
                            752 .mdelete ld__d_iyh
                            753 .macro ld__d_iyh
                            754    .dw #0x54FD  ;; Opcode for ld d, iyh
                            755 .endm
                            756 
                            757 ;; Macro: ld__e_iyh
                            758 ;;    Opcode for "LD e, iyh" instruction
                            759 ;; 
                            760 .mdelete ld__e_iyh
                            761 .macro ld__e_iyh
                            762    .dw #0x5CFD  ;; Opcode for ld e, iyh
                            763 .endm
                            764 
                            765 ;; Macro: add__iyh
                            766 ;;    Opcode for "Add iyh" instruction
                            767 ;; 
                            768 .mdelete add__iyh
                            769 .macro add__iyh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 48.
Hexadecimal [16-Bits]



                            770    .dw #0x84FD  ;; Opcode for add iyh
                            771 .endm
                            772 
                            773 ;; Macro: sub__iyh
                            774 ;;    Opcode for "SUB iyh" instruction
                            775 ;; 
                            776 .mdelete sub__iyh
                            777 .macro sub__iyh
                            778    .dw #0x94FD  ;; Opcode for sub iyh
                            779 .endm
                            780 
                            781 ;; Macro: adc__iyh
                            782 ;;    Opcode for "ADC iyh" instruction
                            783 ;; 
                            784 .mdelete adc__iyh
                            785 .macro adc__iyh
                            786    .dw #0x8CFD  ;; Opcode for adc iyh
                            787 .endm
                            788 
                            789 ;; Macro: sbc__iyh
                            790 ;;    Opcode for "SBC iyh" instruction
                            791 ;; 
                            792 .mdelete sbc__iyh
                            793 .macro sbc__iyh
                            794    .dw #0x9CFD  ;; Opcode for sbc iyh
                            795 .endm
                            796 
                            797 ;; Macro: and__iyh
                            798 ;;    Opcode for "AND iyh" instruction
                            799 ;; 
                            800 .mdelete and__iyh
                            801 .macro and__iyh
                            802    .dw #0xA4FD  ;; Opcode for and iyh
                            803 .endm
                            804 
                            805 ;; Macro: or__iyh
                            806 ;;    Opcode for "OR iyh" instruction
                            807 ;; 
                            808 .mdelete or__iyh
                            809 .macro or__iyh
                            810    .dw #0xB4FD  ;; Opcode for or iyh
                            811 .endm
                            812 
                            813 ;; Macro: xor__iyh
                            814 ;;    Opcode for "XOR iyh" instruction
                            815 ;; 
                            816 .mdelete xor__iyh
                            817 .macro xor__iyh
                            818    .dw #0xACFD  ;; Opcode for xor iyh
                            819 .endm
                            820 
                            821 ;; Macro: cp__iyh
                            822 ;;    Opcode for "CP iyh" instruction
                            823 ;; 
                            824 .mdelete cp__iyh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 49.
Hexadecimal [16-Bits]



                            825 .macro cp__iyh
                            826    .dw #0xBCFD  ;; Opcode for cp iyh
                            827 .endm
                            828 
                            829 ;; Macro: dec__iyh
                            830 ;;    Opcode for "DEC iyh" instruction
                            831 ;; 
                            832 .mdelete dec__iyh
                            833 .macro dec__iyh
                            834    .dw #0x25FD  ;; Opcode for dec iyh
                            835 .endm
                            836 
                            837 ;; Macro: inc__iyh
                            838 ;;    Opcode for "INC iyh" instruction
                            839 ;; 
                            840 .mdelete inc__iyh
                            841 .macro inc__iyh
                            842    .dw #0x24FD  ;; Opcode for inc iyh
                            843 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 50.
Hexadecimal [16-Bits]



                             27 
                             28 ;; Macro: ld__hl_de
                             29 ;;    Copy DE to HL, using 2 instructions
                             30 ;; COST: 2 us (8 CPU Cycles)
                             31 ;; 
                             32 .macro ld__hl_de
                             33    ;; LD HL, DE
                             34    ;;------------
                             35    ld h, d
                             36    ld l, e
                             37    ;;------------
                             38 .endm
                             39 
                             40 ;; Macro: ld__de_hl
                             41 ;;    Copy HL to DE, using 2 instructions (ld d, h : ld e, l)
                             42 ;; COST: 2 us (8 CPU Cycles)
                             43 ;; 
                             44 .macro ld__de_hl
                             45    ;; LD DE, HL
                             46    ;;------------
                             47    ld d, h
                             48    ld e, l
                             49    ;;------------
                             50 .endm
                             51 
                             52 ;; Macro: ld__de_ix
                             53 ;;    Copy IX to DE, using 2 instructions (ld e, ixl : ld d, ixh)
                             54 ;; COST: 4 us (16 CPU Cycles)
                             55 ;; 
                             56 .macro ld__de_ix
                             57    ;; LD DE, IX
                             58    ;;------------
                             59    ld__e_ixl
                             60    ld__d_ixh
                             61    ;;------------
                             62 .endm
                             63 
                             64 ;; Macro: ld__bc_ix
                             65 ;;    Copy IX to BC, using 2 instructions (ld c, ixl : ld b, ixh)
                             66 ;; COST: 4 us (16 CPU Cycles)
                             67 ;; 
                             68 .macro ld__bc_ix
                             69    ;; LD BC, IX
                             70    ;;------------
                             71    ld__c_ixl
                             72    ld__b_ixh
                             73    ;;------------
                             74 .endm
                             75 
                             76 ;; Macro: ld__hl_ix
                             77 ;;    Copy IX to HL, using 4 instructions. 
                             78 ;;    Modifies A Register
                             79 ;; COST: 6 us (24 CPU Cycles)
                             80 ;; 
                             81 .macro ld__hl_ix
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 51.
Hexadecimal [16-Bits]



                             82    ;; LD HL, IX
                             83    ;;------------
                             84    ld__a_ixl
                             85    ld  l, a
                             86    ld__a_ixh
                             87    ld  h, a
                             88    ;;------------
                             89 .endm
                             90 
                             91 ;; Macro: ld__ix_de
                             92 ;;    Copy DE to IX, using 2 instructions (ld ixl, e : ld ixh, d)
                             93 ;; COST: 4 us (16 CPU Cycles)
                             94 ;; 
                             95 .macro ld__ix_de
                             96    ;; LD IX, DE
                             97    ;;------------
                             98    ld__ixl_e
                             99    ld__ixh_d
                            100    ;;------------
                            101 .endm
                            102 
                            103 ;; Macro: ld__ix_bc
                            104 ;;    Copy BX to IX, using 2 instructions (ld ixl, c : ld ixh, b)
                            105 ;; COST: 4 us (16 CPU Cycles)
                            106 ;; 
                            107 .macro ld__ix_bc
                            108    ;; LD IX, BC
                            109    ;;------------
                            110    ld__ixl_c
                            111    ld__ixh_b
                            112    ;;------------
                            113 .endm
                            114 
                            115 ;; Macro: ld__ix_hl
                            116 ;;    Copy HL to IX, using 4 instructions. 
                            117 ;;    Modifies A Register
                            118 ;; COST: 6 us (24 CPU Cycles)
                            119 ;; 
                            120 .macro ld__ix_hl
                            121    ;; LD IX, HL
                            122    ;;------------
                            123    ld  a, l
                            124    ld__ixl_a
                            125    ld  a, h
                            126    ld__ixh_a
                            127    ;;------------
                            128 .endm
                            129 
                            130 ;; Macro: ld__de_iy
                            131 ;;    Copy IY to DE, using 2 instructions (ld e, iyl : ld d, iyh)
                            132 ;; COST: 4 us (16 CPU Cycles)
                            133 ;; 
                            134 .macro ld__de_iy
                            135    ;; LD DE, IY
                            136    ;;------------
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 52.
Hexadecimal [16-Bits]



                            137    ld__e_iyl
                            138    ld__d_iyh
                            139    ;;------------
                            140 .endm
                            141 
                            142 ;; Macro: ld__bc_iy
                            143 ;;    Copy IY to BC, using 2 instructions (ld c, iyl : ld b, iyh)
                            144 ;; COST: 4 us (16 CPU Cycles)
                            145 ;; 
                            146 .macro ld__bc_iy
                            147    ;; LD BC, IY
                            148    ;;------------
                            149    ld__c_iyl
                            150    ld__b_iyh
                            151    ;;------------
                            152 .endm
                            153 
                            154 ;; Macro: ld__hl_iy
                            155 ;;    Copy IY to HL, using 4 instructions. 
                            156 ;;    Modifies A Register
                            157 ;; COST: 6 us (24 CPU Cycles)
                            158 ;; 
                            159 .macro ld__hl_iy
                            160    ;; LD HL, IY
                            161    ;;------------
                            162    ld__a_iyl
                            163    ld  l, a
                            164    ld__a_iyh
                            165    ld  h, a
                            166    ;;------------
                            167 .endm
                            168 
                            169 ;; Macro: ld__iy_de
                            170 ;;    Copy DE to IY, using 2 instructions (ld iyl, e : ld iyh, d)
                            171 ;; COST: 4 us (16 CPU Cycles)
                            172 ;; 
                            173 .macro ld__iy_de
                            174    ;; LD IY, DE
                            175    ;;------------
                            176    ld__iyl_e
                            177    ld__iyh_d
                            178    ;;------------
                            179 .endm
                            180 
                            181 ;; Macro: ld__iy_bc
                            182 ;;    Copy BX to IY, using 2 instructions (ld iyl, c : ld iyh, b)
                            183 ;; COST: 4 us (16 CPU Cycles)
                            184 ;; 
                            185 .macro ld__iy_bc
                            186    ;; LD IY, BC
                            187    ;;------------
                            188    ld__iyl_c
                            189    ld__iyh_b
                            190    ;;------------
                            191 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 53.
Hexadecimal [16-Bits]



                            192 
                            193 ;; Macro: ld__iy_hl
                            194 ;;    Copy HL to IY, using 4 instructions. 
                            195 ;;    Modifies A Register
                            196 ;; COST: 6 us (24 CPU Cycles)
                            197 ;; 
                            198 .macro ld__iy_hl
                            199    ;; LD IY, HL
                            200    ;;------------
                            201    ld  a, l
                            202    ld__iyl_a
                            203    ld  a, h
                            204    ld__iyh_a
                            205    ;;------------
                            206 .endm
                            207 
                            208 ;; Macro: ld__ix_iy
                            209 ;;    Copy IY to IX, using 4 instructions. 
                            210 ;;    Modifies A Register
                            211 ;; Cost: 8 us (32 CPU Cycles)
                            212 ;; 
                            213 .macro ld__ix_iy
                            214    ;; LD IX, IY
                            215    ;;------------
                            216    ld__a_iyl
                            217    ld__ixl_a
                            218    ld__a_iyh
                            219    ld__ixh_a
                            220    ;;------------
                            221 .endm
                            222 
                            223 ;; Macro: ld__iy_ix
                            224 ;;    Copy IX to IY, using 4 instructions. 
                            225 ;;    Modifies A Register
                            226 ;; Cost: 8 us (32 CPU Cycles)
                            227 ;; 
                            228 .macro ld__iy_ix
                            229    ;; LD IY, IX
                            230    ;;------------
                            231    ld__a_ixl
                            232    ld__iyl_a
                            233    ld__a_ixh
                            234    ld__iyh_a
                            235    ;;------------
                            236 .endm
                            237 
                            238 ;; Macro: ex__de_ix
                            239 ;;    Swap DE with IX
                            240 ;;    Modifies A Register
                            241 ;; Cost: 10 us (40 CPU Cycles)
                            242 ;; 
                            243 .macro ex__de_ix
                            244    ;; EX DE, IX
                            245    ;;------------
                            246    ld a, e
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 54.
Hexadecimal [16-Bits]



                            247    ld__e_ixl
                            248    ld__ixl_a
                            249    ld a, d
                            250    ld__d_ixh
                            251    ld__ixh_a
                            252    ;;------------
                            253 .endm
                            254 
                            255 ;; Macro: ex__bc_ix
                            256 ;;    Swap BC with IX
                            257 ;;    Modifies A Register
                            258 ;; Cost: 10 us (40 CPU Cycles)
                            259 ;; 
                            260 .macro ex__bc_ix
                            261    ;; EX BC, IX
                            262    ;;------------
                            263    ld a, c
                            264    ld__c_ixl
                            265    ld__ixl_a
                            266    ld a, b
                            267    ld__b_ixh
                            268    ld__ixh_a
                            269    ;;------------
                            270 .endm
                            271 
                            272 ;; Macro: ex__hl_ix
                            273 ;;    Swap HL with IX
                            274 ;;    Uses 2 bytes on the stack for the swap
                            275 ;;    Modifies A register
                            276 ;; Cost: 15 us (60 CPU Cycles)
                            277 ;; 
                            278 .macro ex__hl_ix
                            279    ;; EX HL, IX
                            280    ;;------------
                            281    push  hl
                            282    ld__a_ixl
                            283    ld l, a
                            284    ld__a_ixh
                            285    ld h, a
                            286    pop   ix
                            287    ;;------------
                            288 .endm
                            289 
                            290 ;; Macro: ex__de_iy
                            291 ;;    Swap DE with IY
                            292 ;;    Modifies A Register
                            293 ;; Cost: 10 us (40 CPU Cycles)
                            294 ;; 
                            295 .macro ex__de_iy
                            296    ;; EX DE, IY
                            297    ;;------------
                            298    ld a, e
                            299    ld__e_iyl
                            300    ld__iyl_a
                            301    ld a, d
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 55.
Hexadecimal [16-Bits]



                            302    ld__d_iyh
                            303    ld__iyh_a
                            304    ;;------------
                            305 .endm
                            306 
                            307 ;; Macro: ex__bc_iy
                            308 ;;    Swap BC with IY
                            309 ;;    Modifies A Register
                            310 ;; Cost: 10 us (40 CPU Cycles)
                            311 ;; 
                            312 .macro ex__bc_iy
                            313    ;; EX BC, IY
                            314    ;;------------
                            315    ld a, c
                            316    ld__c_iyl
                            317    ld__iyl_a
                            318    ld a, b
                            319    ld__b_iyh
                            320    ld__iyh_a
                            321    ;;------------
                            322 .endm
                            323 
                            324 ;; Macro: ex__hl_iy
                            325 ;;    Swap HL with IY
                            326 ;;    Uses 2 bytes on the stack for the swap
                            327 ;;    Modifies A register
                            328 ;; Cost: 15 us (60 CPU Cycles)
                            329 ;; 
                            330 .macro ex__hl_iy
                            331    ;; EX HL, IY
                            332    ;;------------
                            333    push  hl
                            334    ld__a_iyl
                            335    ld l, a
                            336    ld__a_iyh
                            337    ld h, a
                            338    pop   iy
                            339    ;;------------
                            340 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 56.
Hexadecimal [16-Bits]



                             24 .include "macros/cpct_pushpop.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2020 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Push - Pop Macros
                             21 ;;
                             22 ;;    Useful macros to simplify push-pop save/restore operations
                             23 ;;
                             24 
                             25 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             26 ;; Macro: cpctm_push RO, R1, R2, R3, R4, R5
                             27 ;;
                             28 ;;    Pushes any given registers (up to 6) into the stack
                             29 ;;
                             30 ;; ASM Definition:
                             31 ;;    .macro <cpctm_push> R0, R1, R2, R3, R4, R5
                             32 ;;
                             33 ;; Parameters:
                             34 ;;    R0-R5 - Any number of 16-bit pushable registers, up to 6
                             35 ;;
                             36 ;; Details:
                             37 ;;    This macro converts the list of 16-bit registers given as parameters into a list
                             38 ;; of 'push' operations to push all of them into the stack. The registers are pushed
                             39 ;; into the stack in the same order as they are given in the parameter list.
                             40 ;;    The macro accepts any number of registers up to the maximum of 6 that are 
                             41 ;; predefined as parameters. However, you may use it with 1, 2, 3, 4 or 5 registers
                             42 ;; as parameters. There is no need to give the 6 parameters: only those given will 
                             43 ;; be considered.
                             44 ;;
                             45 ;; Modified Registers: 
                             46 ;;    none
                             47 ;;
                             48 ;; Required memory:
                             49 ;;    1 byte per register given (2 if they are IX or IY)
                             50 ;;
                             51 ;; Time Measures:
                             52 ;; (start code)
                             53 ;;  Case     | microSecs(us) | CPU Cycles
                             54 ;; ------------------------------------
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 57.
Hexadecimal [16-Bits]



                             55 ;;  Per Reg  |       4       |     16
                             56 ;; ------------------------------------
                             57 ;;  Per IX/IY|       5       |     20
                             58 ;; ------------------------------------
                             59 ;; (end code)
                             60 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             61 .macro cpctm_push r0, r1, r2, r3, r4, r5
                             62    .narg v
                             63    .if v
                             64    push r0
                             65    .if v-1
                             66    push r1
                             67    .if v-2
                             68    push r2
                             69    .if v-3
                             70    push r3
                             71    .if v-4
                             72    push r4
                             73    .if v-5
                             74    push r5
                             75    .else
                             76    .mexit
                             77    .endif
                             78    .else
                             79    .mexit
                             80    .endif
                             81    .else
                             82    .mexit
                             83    .endif
                             84    .else
                             85    .mexit
                             86    .endif
                             87    .else
                             88    .mexit
                             89    .endif
                             90    .else
                             91    .mexit
                             92    .endif
                             93 .endm
                             94 
                             95 
                             96 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             97 ;; Macro: cpctm_pop RO, R1, R2, R3, R4, R5
                             98 ;;
                             99 ;;    Pops any given registers (up to 6) from the stack
                            100 ;;
                            101 ;; ASM Definition:
                            102 ;;    .macro <cpctm_pop> R0, R1, R2, R3, R4, R5
                            103 ;;
                            104 ;; Parameters:
                            105 ;;    R0-R5 - Any number of 16-bit pushable/popable registers, up to 6
                            106 ;;
                            107 ;; Details:
                            108 ;;    This macro converts the list of 16-bit registers given as parameters into a list
                            109 ;; of 'pop' operations to pop all of them from the stack. The registers are poped
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 58.
Hexadecimal [16-Bits]



                            110 ;; in the same order as they are given in the parameter list.
                            111 ;;    The macro accepts any number of registers up to the maximum of 6 that are 
                            112 ;; predefined as parameters. However, you may use it with 1, 2, 3, 4 or 5 registers
                            113 ;; as parameters. There is no need to give the 6 parameters: only those given will 
                            114 ;; be considered.
                            115 ;;
                            116 ;; Modified Registers: 
                            117 ;;    R0, R1, R2, R3, R4, R5 (Those given as parameters are loaded from the stack)
                            118 ;;
                            119 ;; Required memory:
                            120 ;;    1 byte per register given (2 if they are IX or IY)
                            121 ;;
                            122 ;; Time Measures:
                            123 ;; (start code)
                            124 ;;  Case     | microSecs(us) | CPU Cycles
                            125 ;; ------------------------------------
                            126 ;;  Per Reg  |       3       |     12
                            127 ;; ------------------------------------
                            128 ;;  Per IX/IY|       5       |     20
                            129 ;; ------------------------------------
                            130 ;; (end code)
                            131 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            132 .macro cpctm_pop r0, r1, r2, r3, r4, r5
                            133    .narg v
                            134    .if v
                            135    pop r0
                            136    .if v-1
                            137    pop r1
                            138    .if v-2
                            139    pop r2
                            140    .if v-3
                            141    pop r3
                            142    .if v-4
                            143    pop r4
                            144    .if v-5
                            145    pop r5
                            146    .else
                            147    .mexit
                            148    .endif
                            149    .else
                            150    .mexit
                            151    .endif
                            152    .else
                            153    .mexit
                            154    .endif
                            155    .else
                            156    .mexit
                            157    .endif
                            158    .else
                            159    .mexit
                            160    .endif
                            161    .else
                            162    .mexit
                            163    .endif
                            164 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 59.
Hexadecimal [16-Bits]



                             25 .include "macros/cpct_luts.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2018 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: LUTs (Look-Up-Tables)
                             21 ;;
                             22 ;;    Useful macros for accessing and managing Look-Up-Tables
                             23 ;;
                             24 
                             25 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             26 ;; Macro: cpctm_lutget8
                             27 ;;
                             28 ;;    Gets a value from a 256-byte-max 8-bit table into A register
                             29 ;;
                             30 ;; Parameters:
                             31 ;;    Table         - Memory address where the 256-byte-max table starts. It can be 
                             32 ;;  either an hexadecimal, decimal or octal address, or a symbol (the table name).
                             33 ;;    TR1           - An 8-bits register from the set {B, D, H}
                             34 ;;    TR2           - An 8-bits register from the set {C, E, L}. This register must
                             35 ;;  match TR1 to form a valid 16-bits register (BC, DE or HL), as the register TR1'TR2
                             36 ;;  will be loaded with the address of the table, to be the base pointer.
                             37 ;; 
                             38 ;; Input Registers: 
                             39 ;;    A     - Index in the LUT to be accessed.
                             40 ;;
                             41 ;; Return Value:
                             42 ;;    A     - Value got from the LUT ( table[TR1'TR2 + A] )
                             43 ;;
                             44 ;; Details:
                             45 ;;    This macro gets a value from a table into the A register. The process is simple:
                             46 ;;
                             47 ;;    1. It loads the address of the table in the 16-bits register TR1'TR2
                             48 ;;    2. It adds the index (A) to TR1'TR2  (TR1'TR2 += A)
                             49 ;;    3. It loads into A register the byte pointed by TR1'TR2
                             50 ;;
                             51 ;; Modified Registers: 
                             52 ;;    AF, TR1, TR2
                             53 ;;
                             54 ;; Required memory:
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 60.
Hexadecimal [16-Bits]



                             55 ;;    9 bytes
                             56 ;;
                             57 ;; Time Measures:
                             58 ;; (start code)
                             59 ;;  Case | microSecs(us) | CPU Cycles
                             60 ;; ------------------------------------
                             61 ;;  Any  |      10       |     40
                             62 ;; ------------------------------------
                             63 ;; (end code)
                             64 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             65 
                             66 .macro cpctm_lutget8 Table, TR1, TR2
                             67     ld   TR1'TR2, #Table   ;; [3] TR1_TR2 points to the LUT
                             68     
                             69     ;; Compute TR1'TR2 += A
                             70     add  TR2               ;; [1] | TR2 += A
                             71     ld   TR2, a            ;; [1] |
                             72     sub  a                 ;; [1] A = 0 (preserving Carry Flag)
                             73     adc  TR1               ;; [1] | TR1 += Carry
                             74     ld   TR1, a            ;; [1] |
                             75 
                             76     ;; A = *(TR1_TR2 + A)
                             77     ld   a, (TR1'TR2)      ;; [2] A = Value stored at given index from the LUT 
                             78 .endm
                             79 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 61.
Hexadecimal [16-Bits]



                             26 
                             27 ;;//////////////////////////////////////////////////////////////////////
                             28 ;; Group: General Useful Macros
                             29 ;;//////////////////////////////////////////////////////////////////////
                             30 
                             31 ;;
                             32 ;; Macro: cpctm_produceHalts_asm
                             33 ;;
                             34 ;;   Produce a set of consecutive halt instructions in order to wait for 
                             35 ;; a given number of interrupts.
                             36 ;;
                             37 ;; C Definition:
                             38 ;;   .macro <cpctm_produceHalts_asm> *N*
                             39 ;;
                             40 ;; Input Parameters:
                             41 ;;   (_) N - Number of consecutive halts to be produced
                             42 ;;
                             43 ;; Known issues:
                             44 ;;    * *N* must be a constant expression that can evaluate to a number
                             45 ;; at compile time.
                             46 ;;    * If the code generated by this macro is executed with interrupts
                             47 ;; being disabled, your CPU will effectively hang forever.
                             48 ;;    * This macro can only be used from assembler code. For C callings
                             49 ;; use <cpctm_produceHalts> instead.
                             50 ;;
                             51 ;; Size of generated code:
                             52 ;;    * *N* bytes (1 byte each halt instruction produced)
                             53 ;;
                             54 ;; Time Measures:
                             55 ;;    * Time depends on the exact moment of execution and the status of
                             56 ;; interrupts. *N* interrupts will pass.
                             57 ;;
                             58 ;; Details:
                             59 ;;    This macro produces a set of *N* consecutive *halt* assembly 
                             60 ;; instructions. Each *halt* instruction stops de Z80 CPU until 
                             61 ;; an interrupt is received. Therefore, this waits for *N* interrupts
                             62 ;; to be produced. This can be used for waiting or synchronization 
                             63 ;; purposes.
                             64 ;;
                             65 ;;    Please, take into account that this is a macro, and not a function.
                             66 ;; Each time this macro is used in your code it will produce the requested
                             67 ;; amount of halts. That can produce more code than you effectively need.
                             68 ;; For a unique function that controls a loop of *halt* waiting use
                             69 ;; <cpct_waitHalts> instead.
                             70 ;;
                             71 ;;
                             72 .mdelete cpctm_produceHalts
                             73 .macro cpctm_produceHalts N
                             74    .rept N
                             75       halt
                             76    .endm
                             77 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 62.
Hexadecimal [16-Bits]



                             21 .include "keyboard/keyboard.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 .module cpct_keyboard
                             19 
                             20 ;;
                             21 ;; Constant: Key Definitions (asm)
                             22 ;;
                             23 ;;    Definitions of the KeyCodes required by <cpct_isKeyPressed> 
                             24 ;; function for assembler programs. These are 16-bit values that define 
                             25 ;; matrix line in the keyboard layout (Most Significant Byte) and bit to
                             26 ;; be tested in that matrix line status for the given key (Least Significant
                             27 ;; byte). Each matrix line in the keyboard returns a byte containing the
                             28 ;; status of 8 keys, 1 bit each.
                             29 ;;
                             30 ;; CPCtelera include file:
                             31 ;;    _keyboard/keyboard.h.s_
                             32 ;;
                             33 ;; Keycode constant names:
                             34 ;; (start code)
                             35 ;;  KeyCode | Constant        || KeyCode | Constant      || KeyCode |  Constant
                             36 ;; -------------------------------------------------------------------------------
                             37 ;;   0x0100 | Key_CursorUp    ||  0x0803 | Key_P         ||  0x4006 |  Key_B
                             38 ;;          |                 ||         |               ||     ''  |  Joy1_Fire3
                             39 ;;   0x0200 | Key_CursorRight ||  0x1003 | Key_SemiColon ||  0x8006 |  Key_V
                             40 ;;   0x0400 | Key_CursorDown  ||  0x2003 | Key_Colon     ||  0x0107 |  Key_4
                             41 ;;   0x0800 | Key_F9          ||  0x4003 | Key_Slash     ||  0x0207 |  Key_3
                             42 ;;   0x1000 | Key_F6          ||  0x8003 | Key_Dot       ||  0x0407 |  Key_E
                             43 ;;   0x2000 | Key_F3          ||  0x0104 | Key_0         ||  0x0807 |  Key_W
                             44 ;;   0x4000 | Key_Enter       ||  0x0204 | Key_9         ||  0x1007 |  Key_S
                             45 ;;   0x8000 | Key_FDot        ||  0x0404 | Key_O         ||  0x2007 |  Key_D
                             46 ;;   0x0101 | Key_CursorLeft  ||  0x0804 | Key_I         ||  0x4007 |  Key_C
                             47 ;;   0x0201 | Key_Copy        ||  0x1004 | Key_L         ||  0x8007 |  Key_X
                             48 ;;   0x0401 | Key_F7          ||  0x2004 | Key_K         ||  0x0108 |  Key_1
                             49 ;;   0x0801 | Key_F8          ||  0x4004 | Key_M         ||  0x0208 |  Key_2
                             50 ;;   0x1001 | Key_F5          ||  0x8004 | Key_Comma     ||  0x0408 |  Key_Esc
                             51 ;;   0x2001 | Key_F1          ||  0x0105 | Key_8         ||  0x0808 |  Key_Q
                             52 ;;   0x4001 | Key_F2          ||  0x0205 | Key_7         ||  0x1008 |  Key_Tab
                             53 ;;   0x8001 | Key_F0          ||  0x0405 | Key_U         ||  0x2008 |  Key_A
                             54 ;;   0x0102 | Key_Clr         ||  0x0805 | Key_Y         ||  0x4008 |  Key_CapsLock
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 63.
Hexadecimal [16-Bits]



                             55 ;;   0x0202 | Key_OpenBracket ||  0x1005 | Key_H         ||  0x8008 |  Key_Z
                             56 ;;   0x0402 | Key_Return      ||  0x2005 | Key_J         ||  0x0109 |  Joy0_Up
                             57 ;;   0x0802 | Key_CloseBracket||  0x4005 | Key_N         ||  0x0209 |  Joy0_Down
                             58 ;;   0x1002 | Key_F4          ||  0x8005 | Key_Space     ||  0x0409 |  Joy0_Left
                             59 ;;   0x2002 | Key_Shift       ||  0x0106 | Key_6         ||  0x0809 |  Joy0_Right
                             60 ;;          |                 ||     ''  | Joy1_Up       ||         |
                             61 ;;   0x4002 | Key_BackSlash   ||  0x0206 | Key_5         ||  0x1009 |  Joy0_Fire1
                             62 ;;          |                 ||     ''  | Joy1_Down     ||         |
                             63 ;;   0x8002 | Key_Control     ||  0x0406 | Key_R         ||  0x2009 |  Joy0_Fire2
                             64 ;;          |                 ||     ''  | Joy1_Left     ||         |
                             65 ;;   0x0103 | Key_Caret       ||  0x0806 | Key_T         ||  0x4009 |  Joy0_Fire3
                             66 ;;          |                 ||     ''  | Joy1 Right    ||
                             67 ;;   0x0203 | Key_Hyphen      ||  0x1006 | Key_G         ||  0x8009 |  Key_Del
                             68 ;;          |                 ||     ''  | Joy1_Fire1    ||
                             69 ;;   0x0403 | Key_At          ||  0x2006 | Key_F         ||
                             70 ;;          |                 ||     ''  | Joy1_Fire2    ||
                             71 ;; -------------------------------------------------------------------------------
                             72 ;;  Table 1. KeyCodes defined for each possible key, ordered by KeyCode
                             73 ;; (end)
                             74 ;;
                             75 
                             76 ;; Matrix Line 0x00
                     0100    77 Key_CursorUp     = #0x0100  ;; Bit 0 (01h) => | 0000 0001 |
                     0200    78 Key_CursorRight  = #0x0200  ;; Bit 1 (02h) => | 0000 0010 |
                     0400    79 Key_CursorDown   = #0x0400  ;; Bit 2 (04h) => | 0000 0100 |
                     0800    80 Key_F9           = #0x0800  ;; Bit 3 (08h) => | 0000 1000 |
                     1000    81 Key_F6           = #0x1000  ;; Bit 4 (10h) => | 0001 0000 |
                     2000    82 Key_F3           = #0x2000  ;; Bit 5 (20h) => | 0010 0000 |
                     4000    83 Key_Enter        = #0x4000  ;; Bit 6 (40h) => | 0100 0000 |
                     8000    84 Key_FDot         = #0x8000  ;; Bit 7 (80h) => | 1000 0000 |
                             85 ;; Matrix Line 0x01
                     0101    86 Key_CursorLeft   = #0x0101
                     0201    87 Key_Copy         = #0x0201
                     0401    88 Key_F7           = #0x0401
                     0801    89 Key_F8           = #0x0801
                     1001    90 Key_F5           = #0x1001
                     2001    91 Key_F1           = #0x2001
                     4001    92 Key_F2           = #0x4001
                     8001    93 Key_F0           = #0x8001
                             94 ;; Matrix Line 0x02
                     0102    95 Key_Clr          = #0x0102
                     0202    96 Key_OpenBracket  = #0x0202
                     0402    97 Key_Return       = #0x0402
                     0802    98 Key_CloseBracket = #0x0802
                     1002    99 Key_F4           = #0x1002
                     2002   100 Key_Shift        = #0x2002
                     4002   101 Key_BackSlash    = #0x4002
                     8002   102 Key_Control      = #0x8002
                            103 ;; Matrix Line 0x03
                     0103   104 Key_Caret        = #0x0103
                     0203   105 Key_Hyphen       = #0x0203
                     0403   106 Key_At           = #0x0403
                     0803   107 Key_P            = #0x0803
                     1003   108 Key_SemiColon    = #0x1003
                     2003   109 Key_Colon        = #0x2003
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 64.
Hexadecimal [16-Bits]



                     4003   110 Key_Slash        = #0x4003
                     8003   111 Key_Dot          = #0x8003
                            112 ;; Matrix Line 0x04
                     0104   113 Key_0            = #0x0104
                     0204   114 Key_9            = #0x0204
                     0404   115 Key_O            = #0x0404
                     0804   116 Key_I            = #0x0804
                     1004   117 Key_L            = #0x1004
                     2004   118 Key_K            = #0x2004
                     4004   119 Key_M            = #0x4004
                     8004   120 Key_Comma        = #0x8004
                            121 ;; Matrix Line 0x05
                     0105   122 Key_8            = #0x0105
                     0205   123 Key_7            = #0x0205
                     0405   124 Key_U            = #0x0405
                     0805   125 Key_Y            = #0x0805
                     1005   126 Key_H            = #0x1005
                     2005   127 Key_J            = #0x2005
                     4005   128 Key_N            = #0x4005
                     8005   129 Key_Space        = #0x8005
                            130 ;; Matrix Line 0x06
                     0106   131 Key_6            = #0x0106
                     0106   132 Joy1_Up          = #0x0106
                     0206   133 Key_5            = #0x0206
                     0206   134 Joy1_Down        = #0x0206
                     0406   135 Key_R            = #0x0406
                     0406   136 Joy1_Left        = #0x0406
                     0806   137 Key_T            = #0x0806
                     0806   138 Joy1_Right       = #0x0806
                     1006   139 Key_G            = #0x1006
                     1006   140 Joy1_Fire1       = #0x1006
                     2006   141 Key_F            = #0x2006
                     2006   142 Joy1_Fire2       = #0x2006
                     4006   143 Key_B            = #0x4006
                     4006   144 Joy1_Fire3       = #0x4006
                     8006   145 Key_V            = #0x8006
                            146 ;; Matrix Line 0x07
                     0107   147 Key_4            = #0x0107
                     0207   148 Key_3            = #0x0207
                     0407   149 Key_E            = #0x0407
                     0807   150 Key_W            = #0x0807
                     1007   151 Key_S            = #0x1007
                     2007   152 Key_D            = #0x2007
                     4007   153 Key_C            = #0x4007
                     8007   154 Key_X            = #0x8007
                            155 ;; Matrix Line 0x08
                     0108   156 Key_1            = #0x0108
                     0208   157 Key_2            = #0x0208
                     0408   158 Key_Esc          = #0x0408
                     0808   159 Key_Q            = #0x0808
                     1008   160 Key_Tab          = #0x1008
                     2008   161 Key_A            = #0x2008
                     4008   162 Key_CapsLock     = #0x4008
                     8008   163 Key_Z            = #0x8008
                            164 ;; Matrix Line 0x09
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 65.
Hexadecimal [16-Bits]



                     0109   165 Joy0_Up          = #0x0109
                     0209   166 Joy0_Down        = #0x0209
                     0409   167 Joy0_Left        = #0x0409
                     0809   168 Joy0_Right       = #0x0809
                     1009   169 Joy0_Fire1       = #0x1009
                     2009   170 Joy0_Fire2       = #0x2009
                     4009   171 Joy0_Fire3       = #0x4009
                     8009   172 Key_Del          = #0x8009
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 66.
Hexadecimal [16-Bits]



                             22 .include "video/videomode.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 .module cpct_video
                             19    
                             20 ;;
                             21 ;; Includes
                             22 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 67.
Hexadecimal [16-Bits]



                             23 .include "video/video_macros.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;//////////////////////////////////////////////////////////////////////
                             20 ;;//////////////////////////////////////////////////////////////////////
                             21 ;; File: Macros (asm)
                             22 ;;//////////////////////////////////////////////////////////////////////
                             23 ;;//////////////////////////////////////////////////////////////////////
                             24 
                             25 ;;//////////////////////////////////////////////////////////////////////
                             26 ;; Group: Video memory manipulation
                             27 ;;//////////////////////////////////////////////////////////////////////
                             28 
                             29 ;;
                             30 ;; Constant: CPCT_VMEM_START_ASM
                             31 ;;
                             32 ;;    The address where screen video memory starts by default in the Amstrad CPC.
                             33 ;;
                             34 ;;    This address is exactly 0xC000, and this macro represents this number but
                             35 ;; automatically converted to <u8>* (Pointer to unsigned byte). You can use this
                             36 ;; macro for any function requiring the start of video memory, like 
                             37 ;; <cpct_getScreenPtr>.
                             38 ;;
                     C000    39 CPCT_VMEM_START_ASM = 0xC000
                             40 
                             41 ;;
                             42 ;; Constants: Video Memory Pages
                             43 ;;
                             44 ;; Useful constants defining some typical Video Memory Pages to be used as 
                             45 ;; parameters for <cpct_setVideoMemoryPage>
                             46 ;;
                             47 ;; cpct_pageCO - Video Memory Page 0xC0 (0xC0··)
                             48 ;; cpct_page8O - Video Memory Page 0x80 (0x80··)
                             49 ;; cpct_page4O - Video Memory Page 0x40 (0x40··)
                             50 ;; cpct_page0O - Video Memory Page 0x00 (0x00··)
                             51 ;;
                     0030    52 cpct_pageC0_asm = 0x30
                     0020    53 cpct_page80_asm = 0x20
                     0010    54 cpct_page40_asm = 0x10
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 68.
Hexadecimal [16-Bits]



                     0000    55 cpct_page00_asm = 0x00
                             56 
                             57 ;;
                             58 ;; Macro: cpctm_memPage6_asm
                             59 ;;
                             60 ;;    Macro that encodes a video memory page in the 6 Least Significant bits (LSb)
                             61 ;; of a byte, required as parameter for <cpct_setVideoMemoryPage>. It loads resulting
                             62 ;; value into a given 8-bits register.
                             63 ;;
                             64 ;; ASM Definition:
                             65 ;; .macro <cpct_memPage6_asm> *REG8*, *PAGE*
                             66 ;;
                             67 ;; Parameters (1 byte):
                             68 ;; (__) REG8 - 8bits register where result will be loaded
                             69 ;; (1B) PAGE - Video memory page wanted 
                             70 ;;
                             71 ;; Known issues:
                             72 ;;   * This macro can only be used from assembler code. It is not accessible from 
                             73 ;; C scope. For C programs, please refer to <cpct_memPage6>
                             74 ;;   * This macro will work *only* with constant values, as its value needs to
                             75 ;; be calculated in compilation time. If fed with variable values, it will give 
                             76 ;; an assembler error.
                             77 ;;
                             78 ;; Destroyed Registers:
                             79 ;;    REG8
                             80 ;;
                             81 ;; Size of generated code:
                             82 ;;    2 bytes 
                             83 ;;
                             84 ;; Time Measures:
                             85 ;;    * 2 microseconds
                             86 ;;    * 8 CPU Cycles
                             87 ;;
                             88 ;; Details:
                             89 ;;  This is just a macro that shifts *PAGE* 2 bits to the right, to leave it
                             90 ;; with just 6 significant bits. For more information, check functions
                             91 ;; <cpct_setVideoMemoryPage> and <cpct_setVideoMemoryOffset>.
                             92 ;;
                             93 .macro cpctm_memPage6_asm REG8, PAGE 
                             94    ld REG8, #PAGE / 4      ;; [2] REG8 = PAGE/4
                             95 .endm
                             96 
                             97 ;;
                             98 ;; Macro: cpctm_screenPtr_asm
                             99 ;;
                            100 ;;    Macro that calculates the video memory location (byte pointer) of a 
                            101 ;; given pair of coordinates (*X*, *Y*). Value resulting from calculation 
                            102 ;; will be loaded into a 16-bits register.
                            103 ;;
                            104 ;; ASM Definition:
                            105 ;;    .macro <cpctm_screenPtr_asm> *REG16*, *VMEM*, *X*, *Y*
                            106 ;;
                            107 ;; Parameters:
                            108 ;;    (__) REG16 - 16-bits register where the resulting value will be loaded
                            109 ;;    (2B) VMEM  - Start of video memory buffer where (*X*, *Y*) coordinates will be calculated
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 69.
Hexadecimal [16-Bits]



                            110 ;;    (1B) X     - X Coordinate of the video memory location *in bytes* (*BEWARE! NOT in pixels!*)
                            111 ;;    (1B) Y     - Y Coordinate of the video memory location in pixels / bytes (they are same amount)
                            112 ;;
                            113 ;; Parameter Restrictions:
                            114 ;;    * *REG16* has to be a 16-bits register that can perform ld REG16, #value.
                            115 ;;    * *VMEM* will normally be the start of the video memory buffer where you want to 
                            116 ;; draw something. It could theoretically be any 16-bits value. 
                            117 ;;    * *X* must be in the range [0-79] for normal screen sizes (modes 0,1,2). Screen is
                            118 ;; always 80 bytes wide in these modes and this function is byte-aligned, so you have to 
                            119 ;; give it a byte coordinate (*NOT a pixel one!*).
                            120 ;;    * *Y* must be in the range [0-199] for normal screen sizes (modes 0,1,2). Screen is 
                            121 ;; always 200 pixels high in these modes. Pixels and bytes always coincide in vertical
                            122 ;; resolution, so this coordinate is the same in bytes that in pixels.
                            123 ;;    * If you give incorrect values to this function, the returned pointer could
                            124 ;; point anywhere in memory. This function will not cause any damage by itself, 
                            125 ;; but you may destroy important parts of your memory if you use its result to 
                            126 ;; write to memory, and you gave incorrect parameters by mistake. Take always
                            127 ;; care.
                            128 ;;
                            129 ;; Known issues:
                            130 ;;   * This macro can only be used from assembler code. It is not accessible from 
                            131 ;; C scope. For C programs, please refer to <cpct_getScreenPtr>
                            132 ;;   * This macro will work *only* with constant values, as calculations need to be 
                            133 ;; performed at assembler time.
                            134 ;;
                            135 ;; Destroyed Registers:
                            136 ;;    REG16
                            137 ;;
                            138 ;; Size of generated code:
                            139 ;;    3 bytes 
                            140 ;;
                            141 ;; Time Measures:
                            142 ;;    * 3 microseconds
                            143 ;;    * 12 CPU Cycles
                            144 ;;
                            145 ;; Details:
                            146 ;;    This macro does the same calculation than the function <cpct_getScreenPtr>. However,
                            147 ;; as it is a macro, if all 3 parameters (*VMEM*, *X*, *Y*) are constants, the calculation
                            148 ;; will be done at compile-time. This will free the binary from code or data, just putting in
                            149 ;; the result of this calculation (2 bytes with the resulting address). It is highly 
                            150 ;; recommended to use this macro instead of the function <cpct_getScreenPtr> when values
                            151 ;; involved are all constant. 
                            152 ;;
                            153 ;; Recommendations:
                            154 ;;    All constant values - Use this macro <cpctm_screenPtr_asm>
                            155 ;;    Any variable value  - Use the function <cpct_getScreenPtr>
                            156 ;;
                            157 .macro cpctm_screenPtr_asm REG16, VMEM, X, Y 
                            158    ld REG16, #VMEM + 80 * (Y / 8) + 2048 * (Y & 7) + X   ;; [3] REG16 = screenPtr
                            159 .endm
                            160 
                            161 ;;
                            162 ;; Macro: cpctm_screenPtrSym_asm
                            163 ;;
                            164 ;;    Macro that calculates the video memory location (byte pointer) of a 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 70.
Hexadecimal [16-Bits]



                            165 ;; given pair of coordinates (*X*, *Y*). Value resulting from calculation 
                            166 ;; will be assigned to the given ASZ80 local symbol.
                            167 ;;
                            168 ;; ASM Definition:
                            169 ;;    .macro <cpctm_screenPtr_asm> *SYM*, *VMEM*, *X*, *Y*
                            170 ;;
                            171 ;; Parameters:
                            172 ;;    (__) SYM   - ASZ80 local symbol to assign the result from the calculation to
                            173 ;;    (2B) VMEM  - Start of video memory buffer where (*X*, *Y*) coordinates will be calculated
                            174 ;;    (1B) X     - X Coordinate of the video memory location *in bytes* (*BEWARE! NOT in pixels!*)
                            175 ;;    (1B) Y     - Y Coordinate of the video memory location in pixels / bytes (they are same amount)
                            176 ;;
                            177 ;; Parameter Restrictions:
                            178 ;;    * *SYM* need to be a valid symbol according to ASZ80 rules for symbols
                            179 ;;    * *VMEM* will normally be the start of the video memory buffer where you want to 
                            180 ;; draw something. It could theoretically be any 16-bits value. 
                            181 ;;    * *X* must be in the range [0-79] for normal screen sizes (modes 0,1,2). Screen is
                            182 ;; always 80 bytes wide in these modes and this function is byte-aligned, so you have to 
                            183 ;; give it a byte coordinate (*NOT a pixel one!*).
                            184 ;;    * *Y* must be in the range [0-199] for normal screen sizes (modes 0,1,2). Screen is 
                            185 ;; always 200 pixels high in these modes. Pixels and bytes always coincide in vertical
                            186 ;; resolution, so this coordinate is the same in bytes that in pixels.
                            187 ;;    * If you give incorrect values to this function, the returned pointer could
                            188 ;; point anywhere in memory. This function will not cause any damage by itself, 
                            189 ;; but you may destroy important parts of your memory if you use its result to 
                            190 ;; write to memory, and you gave incorrect parameters by mistake. Take always
                            191 ;; care.
                            192 ;;
                            193 ;; Known issues:
                            194 ;;   * This macro can only be used from assembler code. It is not accessible from 
                            195 ;; C scope. For C programs, please refer to <cpct_getScreenPtr>
                            196 ;;   * This macro will work *only* with constant values, as calculations need to be 
                            197 ;; performed at assembler time.
                            198 ;;
                            199 ;; Destroyed Registers:
                            200 ;;    none
                            201 ;;
                            202 ;; Size of generated code:
                            203 ;;    none (symbols are compile-time, do not generate code)
                            204 ;;
                            205 ;; Time Measures:
                            206 ;;    - not applicable -
                            207 ;;
                            208 ;; Details:
                            209 ;;    This macro does the same calculation than the function <cpct_getScreenPtr>. However,
                            210 ;; as it is a macro, and as its parameters (*VMEM*, *X*, *Y*) must be constants, the calculation
                            211 ;; will be performed at compile-time. This will free the binary from code or data, just putting in
                            212 ;; the result of this calculation (2 bytes with the resulting address). It is highly 
                            213 ;; recommended to use this macro instead of the function <cpct_getScreenPtr> when values
                            214 ;; involved are all constant. 
                            215 ;;
                            216 ;; Recommendations:
                            217 ;;    All constant values - Use this macro <cpctm_screenPtrSym_asm> or <cpctm_screenPtr_asm> 
                            218 ;;    Any variable value  - Use the function <cpct_getScreenPtr>
                            219 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 71.
Hexadecimal [16-Bits]



                            220 .macro cpctm_screenPtrSym_asm SYM, VMEM, X, Y 
                            221    SYM = #VMEM + 80 * (Y / 8) + 2048 * (Y & 7) + X 
                            222 .endm
                            223 
                            224 ;;
                            225 ;; Macro: cpctm_setCRTCReg
                            226 ;;
                            227 ;;    Macro that sets a new value for a given CRTC register.
                            228 ;;
                            229 ;; ASM Definition:
                            230 ;;    .macro <cpctm_setCRTCReg> *HEXREG*, *HEXVAL*
                            231 ;;
                            232 ;; Parameters:
                            233 ;;    (1B) HEXREG - New value to be set for the register (in hexadecimal)
                            234 ;;    (1B) HEXVAL - Number of the register to be set (in hexadecimal)
                            235 ;;
                            236 ;; Parameter Restrictions:
                            237 ;;    * *HEXREG* has to be an hexadecimal value from 00 to 1F
                            238 ;;    * *HEXVAL* has to be an hexadecimal value. Its valid range will depend
                            239 ;;          upon the selected register that will be modified. 
                            240 ;;
                            241 ;; Known issues:
                            242 ;;   * This macro can *only* be used from assembler code. It is not accessible from 
                            243 ;; C scope. 
                            244 ;;   * This macro can only be used with *constant values*. As given values are 
                            245 ;; concatenated with a number, they must also be hexadecimal numbers. If a 
                            246 ;; register or other value is given, this macro will not work.
                            247 ;;   * Using values out of range have unpredicted behaviour and can even 
                            248 ;; potentially cause damage to real Amstrad CPC monitors. Please, use with care.
                            249 ;;
                            250 ;; Destroyed Registers:
                            251 ;;    BC
                            252 ;;
                            253 ;; Size of generated code:
                            254 ;;    10 bytes 
                            255 ;;
                            256 ;; Time Measures:
                            257 ;;    * 14 microseconds
                            258 ;;    * 56 CPU Cycles
                            259 ;;
                            260 ;; Details:
                            261 ;;    This macro expands to two CRTC commands: Register selection and Register setting.
                            262 ;; It selects the register given as first parameter, then sets its new value to 
                            263 ;; that given as second parameter. Both given parameters must be of exactly 1 byte
                            264 ;; in size and the have to be provided in hexadecimal. This is due to the way
                            265 ;; that macro expansion and concatenation works. Given values will be concatenated
                            266 ;; with another 8-bit hexadecimal value to form a unique 16-bits hexadecimal value.
                            267 ;; Therefore, any parameter given will always be considered hexadecimal.
                            268 ;;
                            269 .macro cpctm_setCRTCReg_asm HEXREG, HEXVAL
                            270    ld    bc, #0xBC'HEXREG  ;; [3] B=0xBC CRTC Select Register, C=register number to be selected
                            271    out  (c), c             ;; [4] Select register
                            272    ld    bc, #0xBD'HEXVAL  ;; [3] B=0xBD CRTC Set Register, C=Value to be set
                            273    out  (c), c             ;; [4] Set the value
                            274 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 72.
Hexadecimal [16-Bits]



                            275 
                            276 ;;//////////////////////////////////////////////////////////////////////
                            277 ;; Group: Setting the border
                            278 ;;//////////////////////////////////////////////////////////////////////
                            279 
                            280 ;;
                            281 ;; Macro: cpctm_setBorder_asm
                            282 ;;
                            283 ;;   Changes the colour of the screen border.
                            284 ;;
                            285 ;; ASM Definition:
                            286 ;;   .macro <cpctm_setBorder_asm> HWC 
                            287 ;;
                            288 ;; Input Parameters (1 Byte):
                            289 ;;   (1B) HWC - Hardware colour value for the screen border in *hexadecimal [00-1B]*.
                            290 ;;
                            291 ;; Known issues:
                            292 ;;   * *Beware!* *HWC* colour value must be given in *hexadecimal*, as it is
                            293 ;; substituted in place, and must be in the range [00-1B].
                            294 ;;   * This macro can only be used from assembler code. It is not accessible from 
                            295 ;; C scope. For C programs, please refer to <cpct_setBorder>
                            296 ;;   * This macro will work *only* with constant values, as calculations need to be 
                            297 ;; performed at assembler time.
                            298 ;;
                            299 ;; Destroyed Registers:
                            300 ;;    AF, B, HL
                            301 ;;
                            302 ;; Size of generated code:
                            303 ;;    * 16 bytes 
                            304 ;;     6b - generated code
                            305 ;;    10b - cpct_setPALColour_asm code
                            306 ;;
                            307 ;; Time Measures:
                            308 ;;    * 28 microseconds
                            309 ;;    * 112 CPU Cycles
                            310 ;;
                            311 ;; Details:
                            312 ;;   This is not a real function, but an assembler macro. Beware of using it along
                            313 ;; with complex expressions or calculations, as it may expand in non-desired
                            314 ;; ways.
                            315 ;;
                            316 ;;   For more information, check the real function <cpct_setPALColour>, which
                            317 ;; is called when using <cpctm_setBorder_asm> (It is called using 16 as *pen*
                            318 ;; argument, which identifies the border).
                            319 ;;
                            320 .macro cpctm_setBorder_asm HWC
                            321    .radix h
                            322    cpctm_setBorder_raw_asm \HWC ;; [28] Macro that does the job, but requires a number value to be passed
                            323    .radix d
                            324 .endm
                            325 .macro cpctm_setBorder_raw_asm HWC
                            326    .globl cpct_setPALColour_asm
                            327    ld   hl, #0x'HWC'10         ;; [3]  H=Hardware value of desired colour, L=Border INK (16)
                            328    call cpct_setPALColour_asm  ;; [25] Set Palette colour of the border
                            329 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 73.
Hexadecimal [16-Bits]



                            330 
                            331 ;;//////////////////////////////////////////////////////////////////////
                            332 ;; Group: Screen clearing
                            333 ;;//////////////////////////////////////////////////////////////////////
                            334 
                            335 ;;
                            336 ;; Macro: cpctm_clearScreen_asm
                            337 ;;
                            338 ;;    Macro to simplify clearing the screen.
                            339 ;;
                            340 ;; ASM Definition:
                            341 ;;   .macro <cpctm_clearScreen_asm> COL
                            342 ;;
                            343 ;; Input Parameters (1 byte):
                            344 ;;   (1B) COL - Colour pattern to be used for screen clearing. 
                            345 ;;
                            346 ;; Parameters:
                            347 ;;    *COL* - Any 8-bits value or the A register are valid. Typically, a 0x00 is used 
                            348 ;; to fill up all the screen with 0's (firmware colour 0). However, you may use it in 
                            349 ;; combination with <cpct_px2byteM0>, <cpct_px2byteM1> or a manually created colour pattern.
                            350 ;;
                            351 ;; Known issues:
                            352 ;;   * This macro can only be used from assembler code. It is not accessible from 
                            353 ;; C scope. For C programs, please refer to <cpct_clearScreen>
                            354 ;;
                            355 ;; Details:
                            356 ;;   Fills up all the standard screen (range [0xC000-0xFFFF]) with *COL* byte, the colour 
                            357 ;; pattern given.
                            358 ;;
                            359 ;; Destroyed Registers:
                            360 ;;    BC, DE, HL
                            361 ;;
                            362 ;; Size of generated code:
                            363 ;;    13 bytes 
                            364 ;;
                            365 ;; Time Measures:
                            366 ;;    98309 microseconds (*4.924 VSYNCs* on a 50Hz display).
                            367 ;;    393236 CPU Cycles 
                            368 ;;
                            369 .macro cpctm_clearScreen_asm COL
                            370    ld    hl, #0xC000    ;; [3] HL Points to Start of Video Memory
                            371    ld    de, #0xC001    ;; [3] DE Points to the next byte
                            372    ld    bc, #0x4000    ;; [3] BC = 16384 bytes to be copied
                            373    ld   (hl), #COL      ;; [3] First Byte = given Colour
                            374    ldir                 ;; [98297] Perform the copy
                            375 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 74.
Hexadecimal [16-Bits]



                             24 .include "video/colours.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;//////////////////////////////////////////////////////////////////////
                             20 ;;//////////////////////////////////////////////////////////////////////
                             21 ;; File: Colours (asm)
                             22 ;;//////////////////////////////////////////////////////////////////////
                             23 ;;//////////////////////////////////////////////////////////////////////
                             24 ;;
                             25 ;;    Constants and utilities to manage the 27 colours from
                             26 ;; the CPC Palette comfortably in assembler.
                             27 ;;
                             28 ;;
                             29 
                             30 ;; Constant: Firmware colour values
                             31 ;;
                             32 ;;    Enumerates all 27 firmware colours for assembler programs
                             33 ;;
                             34 ;; Values:
                             35 ;; (start code)
                             36 ;;   [=================================================]
                             37 ;;   | Identifier        | Val| Identifier        | Val|
                             38 ;;   |-------------------------------------------------|
                             39 ;;   | FW_BLACK          |  0 | FW_BLUE           |  1 |
                             40 ;;   | FW_BRIGHT_BLUE    |  2 | FW_RED            |  3 |
                             41 ;;   | FW_MAGENTA        |  4 | FW_MAUVE          |  5 |
                             42 ;;   | FW_BRIGHT_RED     |  6 | FW_PURPLE         |  7 |
                             43 ;;   | FW_BRIGHT_MAGENTA |  8 | FW_GREEN          |  9 |
                             44 ;;   | FW_CYAN           | 10 | FW_SKY_BLUE       | 11 |
                             45 ;;   | FW_YELLOW         | 12 | FW_WHITE          | 13 |
                             46 ;;   | FW_PASTEL_BLUE    | 14 | FW_ORANGE         | 15 |
                             47 ;;   | FW_PINK           | 16 | FW_PASTEL_MAGENTA | 17 |
                             48 ;;   | FW_BRIGHT_GREEN   | 18 | FW_SEA_GREEN      | 19 |
                             49 ;;   | FW_BRIGHT_CYAN    | 20 | FW_LIME           | 21 |
                             50 ;;   | FW_PASTEL_GREEN   | 22 | FW_PASTEL_CYAN    | 23 |
                             51 ;;   | FW_BRIGHT_YELLOW  | 24 | FW_PASTEL_YELLOW  | 25 |
                             52 ;;   | FW_BRIGHT_WHITE   | 26 |                   |    |
                             53 ;;   [=================================================]
                             54 ;; (end code)
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 75.
Hexadecimal [16-Bits]



                             55 
                     0000    56 FW_BLACK          =  0
                     0001    57 FW_BLUE           =  1
                     0002    58 FW_BRIGHT_BLUE    =  2
                     0003    59 FW_RED            =  3
                     0004    60 FW_MAGENTA        =  4
                     0005    61 FW_MAUVE          =  5
                     0006    62 FW_BRIGHT_RED     =  6
                     0007    63 FW_PURPLE         =  7
                     0008    64 FW_BRIGHT_MAGENTA =  8
                     0009    65 FW_GREEN          =  9
                     000A    66 FW_CYAN           = 10
                     000B    67 FW_SKY_BLUE       = 11
                     000C    68 FW_YELLOW         = 12
                     000D    69 FW_WHITE          = 13
                     000E    70 FW_PASTEL_BLUE    = 14
                     000F    71 FW_ORANGE         = 15
                     0010    72 FW_PINK           = 16
                     0011    73 FW_PASTEL_MAGENTA = 17
                     0012    74 FW_BRIGHT_GREEN   = 18
                     0013    75 FW_SEA_GREEN      = 19
                     0014    76 FW_BRIGHT_CYAN    = 20
                     0015    77 FW_LIME           = 21
                     0016    78 FW_PASTEL_GREEN   = 22
                     0017    79 FW_PASTEL_CYAN    = 23
                     0018    80 FW_BRIGHT_YELLOW  = 24
                     0019    81 FW_PASTEL_YELLOW  = 25
                     001A    82 FW_BRIGHT_WHITE   = 26
                             83 
                             84 ;; Constant: Hardware colour values
                             85 ;;
                             86 ;;    Enumerates all 27 hardware colours for assembler programs
                             87 ;;
                             88 ;; Values:
                             89 ;; (start code)
                             90 ;;   [=====================================================]
                             91 ;;   | Identifier        | Value| Identifier        | Value|
                             92 ;;   |-----------------------------------------------------|
                             93 ;;   | HW_BLACK          | 0x14 | HW_BLUE           | 0x04 |
                             94 ;;   | HW_BRIGHT_BLUE    | 0x15 | HW_RED            | 0x1C |
                             95 ;;   | HW_MAGENTA        | 0x18 | HW_MAUVE          | 0x1D |
                             96 ;;   | HW_BRIGHT_RED     | 0x0C | HW_PURPLE         | 0x05 |
                             97 ;;   | HW_BRIGHT_MAGENTA | 0x0D | HW_GREEN          | 0x16 |
                             98 ;;   | HW_CYAN           | 0x06 | HW_SKY_BLUE       | 0x17 |
                             99 ;;   | HW_YELLOW         | 0x1E | HW_WHITE          | 0x00 |
                            100 ;;   | HW_PASTEL_BLUE    | 0x1F | HW_ORANGE         | 0x0E |
                            101 ;;   | HW_PINK           | 0x07 | HW_PASTEL_MAGENTA | 0x0F |
                            102 ;;   | HW_BRIGHT_GREEN   | 0x12 | HW_SEA_GREEN      | 0x02 |
                            103 ;;   | HW_BRIGHT_CYAN    | 0x13 | HW_LIME           | 0x1A |
                            104 ;;   | HW_PASTEL_GREEN   | 0x19 | HW_PASTEL_CYAN    | 0x1B |
                            105 ;;   | HW_BRIGHT_YELLOW  | 0x0A | HW_PASTEL_YELLOW  | 0x03 |
                            106 ;;   | HW_BRIGHT_WHITE   | 0x0B |                   |      |
                            107 ;;   [=====================================================]
                            108 ;; (end code)
                            109 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 76.
Hexadecimal [16-Bits]



                     0014   110 HW_BLACK          = 0x14
                     0004   111 HW_BLUE           = 0x04
                     0015   112 HW_BRIGHT_BLUE    = 0x15
                     001C   113 HW_RED            = 0x1C
                     0018   114 HW_MAGENTA        = 0x18
                     001D   115 HW_MAUVE          = 0x1D
                     000C   116 HW_BRIGHT_RED     = 0x0C
                     0005   117 HW_PURPLE         = 0x05
                     000D   118 HW_BRIGHT_MAGENTA = 0x0D
                     0016   119 HW_GREEN          = 0x16
                     0006   120 HW_CYAN           = 0x06
                     0017   121 HW_SKY_BLUE       = 0x17
                     001E   122 HW_YELLOW         = 0x1E
                     0000   123 HW_WHITE          = 0x00
                     001F   124 HW_PASTEL_BLUE    = 0x1F
                     000E   125 HW_ORANGE         = 0x0E
                     0007   126 HW_PINK           = 0x07
                     000F   127 HW_PASTEL_MAGENTA = 0x0F
                     0012   128 HW_BRIGHT_GREEN   = 0x12
                     0002   129 HW_SEA_GREEN      = 0x02
                     0013   130 HW_BRIGHT_CYAN    = 0x13
                     001A   131 HW_LIME           = 0x1A
                     0019   132 HW_PASTEL_GREEN   = 0x19
                     001B   133 HW_PASTEL_CYAN    = 0x1B
                     000A   134 HW_BRIGHT_YELLOW  = 0x0A
                     0003   135 HW_PASTEL_YELLOW  = 0x03
                     000B   136 HW_BRIGHT_WHITE   = 0x0B
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 77.
Hexadecimal [16-Bits]



                             25 
                             26 ;;
                             27 ;; Constant values
                             28 ;;
                     7F00    29 GA_port        = 0x7F00  ;; 16-bit Port of the Gate Array (for the use with BC register)
                     007F    30 GA_port_byte   = 0x7F    ;; 8-bit Port of the Gate Array
                     0000    31 PAL_PENR       = 0x00    ;; Command to select a PEN register in the PAL chip
                     0040    32 PAL_INKR       = 0x40    ;; Command to set the INK of a previously selected PEN register in the PAL chip
                     00F5    33 PPI_PORT_B     = 0xF5    ;; Port B of the PPI, used to read Vsync/Jumpers/PrinterBusy/CasIn/Exp information
                     00BC    34 CRTC_SELECTREG = 0xBC    ;; CRTC Port and command "Select Register"
                     00BD    35 CRTC_SETVAL    = 0xBD    ;; CRTC Port and command "Set Value"
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 78.
Hexadecimal [16-Bits]



                             23 .include "sprites/sprites.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;#####################################################################
                             20 ;;### MODULE: Sprites
                             21 ;;#####################################################################
                             22 ;;### Functions, macros and definitions used for managing sprites
                             23 ;;### in assembler code
                             24 ;;#####################################################################
                             25 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 79.
Hexadecimal [16-Bits]



                             26 .include "sprites/flipping/flipping_macros.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2018 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;#####################################################################
                             20 ;;### MODULE: Sprites
                             21 ;;### SUBMODULE: flipping.macros
                             22 ;;#####################################################################
                             23 ;;### Macros used to speed up calculations required for to assist
                             24 ;;### flipping functions. Assembler version.
                             25 ;;#####################################################################
                             26 
                             27 ;;
                             28 ;; Macro: cpctm_ld_spbloff
                             29 ;;
                             30 ;;    Macro that calculates the offset to add to a sprite pointer to point 
                             31 ;; to it sbottom left pixel.
                             32 ;;
                             33 ;; ASM Definition:
                             34 ;;    .macro <cpctm_ld_spbloff> *REG*, *W*, *H*
                             35 ;;
                             36 ;; Acronym stands for:
                             37 ;;    ld_sbloff = Load Sprite Bottom Left Offset
                             38 ;;
                             39 ;; Parameters:
                             40 ;;    (1-2B) REG - Register that will load the resulting offset (8 or 16 bits)
                             41 ;;    (1B) W     - Width of the sprite in *bytes*
                             42 ;;    (1B) H     - Height of the sprite in pixels
                             43 ;;
                             44 ;; Parameter Restrictions:
                             45 ;;    *REG* - Must be a valid 8/16 bits register that can be immediately loaded
                             46 ;; using ld REG, #immediate.
                             47 ;;    *W*   - Must be an immediate value representing the width of the sprite 
                             48 ;; in *bytes* (Beware! Not in pixels). For sprites having interlaced mask, you 
                             49 ;; may input 2 times the width of the sprite for appropriate results.
                             50 ;;    *H*   - Must be an immediate value representing the height of the sprite 
                             51 ;; in pixels.
                             52 ;;
                             53 ;; Returns:
                             54 ;; (start code)
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 80.
Hexadecimal [16-Bits]



                             55 ;;    REG = W * (H - 1) ;; Register loaded with the offset
                             56 ;; (end code)
                             57 ;;
                             58 ;; Details:
                             59 ;;    This macro calculates the offset of the initial byte of the last row 
                             60 ;; of a given sprite (i.e. its bottom-left byte), with respect to its first
                             61 ;; byte (top-left corner). This value can easily be added to any sprite 
                             62 ;; pointer to get a pointer to the bottom-left byte. This pointer is required
                             63 ;; byte many flipping functions (like <cpct_vflipSpriteM0>). Values for width
                             64 ;; and height of the sprite must be constant immediate values. Otherwise, this
                             65 ;; macro will generate incorrect code that will fail to compile. 
                             66 ;;    The macro calculates *W* * (*H*-1) at compile-time and loads it into
                             67 ;; the given register. Please, take into account that the macro does no check
                             68 ;; about the size of the resulting values. If multiplication results in a value
                             69 ;; greater than 255, you will need to load it into a 16-bit register. You must
                             70 ;; take care of the expected size of the offset value.
                             71 ;;
                             72 ;; Known issues:
                             73 ;;    * This is a assembler macro. It cannot be called or used from C code.
                             74 ;;
                             75 .macro cpctm_ld_spbloff REG, W, H
                             76    ld    REG, #W * (H-1)
                             77 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 81.
Hexadecimal [16-Bits]



                             27 .include "sprites/pixel_macros.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;-------------------------------------------------------------------------------
                             20 ;; Title: Pixel Macros (ASM)
                             21 ;;-------------------------------------------------------------------------------
                             22 
                             23 ;; Macro: CPCTM_PEN2PIXELPATTERN_M1_ASM
                             24 ;;
                             25 ;;    Similarly to the function <cpct_pen2pixelPatternM1>, creates 1 byte in Mode 1 
                             26 ;; screen pixel format containing a pattern with all 4 pixels in the same pen colour 
                             27 ;; as given by the argument *PEN*.
                             28 ;;
                             29 ;; ASM Definition:
                             30 ;;    .macro <CPCTM_PEN2PIXELPATTERN_M1_ASM> *SYM*, *PEN*
                             31 ;;
                             32 ;; Parameters:
                             33 ;;    SYM - Name of a symbol to assign the resulting value of the calculation
                             34 ;;    PEN - ([0-3], unsigned) Pen Colour from which create the pixel pattern
                             35 ;; 
                             36 ;; Known limitations:
                             37 ;;    * It does not perform any kind of checking. Values other than unsigned integers [0-3]
                             38 ;; will produce undefined behaviour.
                             39 ;;    * As this is an assembly macro, it will only work with constant values or symbols. It
                             40 ;; will produce assembly errors when used with other kind of values.
                             41 ;;
                             42 ;; Details:
                             43 ;;    This macro does the same operations the function <cpct_pen2pixelPatternM1> does, but
                             44 ;; with an explicit operation that can be calculated at compile-time, producing a single 
                             45 ;; precalculated byte in your final binary (if you use it with constant values).
                             46 ;;
                             47 ;;    For more details on this operations, consult <cpct_pen2pixelPatternM1> help.
                             48 ;;
                             49 ;; Use example:
                             50 ;; (start code)
                             51 ;;    ;// Simple function that changes the Skin Colour 
                             52 ;;    ;// of a given Alien Sprite into Cyan (Alien Skin is yellow normally)  
                             53 ;;    ;// HL = Pointer to Alien Sprite
                             54 ;;    ;// BC = Size of Alien Sprite
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 82.
Hexadecimal [16-Bits]



                             55 ;;    changeAlienSkinColourToCyan:
                             56 ;;       CPCTM_PEN2PIXELPATTERN_M1_ASM OldPen, 1 ;// Produces 'OldPen = 0xF0'
                             57 ;;       CPCTM_PEN2PIXELPATTERN_M1_ASM NewPen, 2 ;// Produces 'NewPen = 0x0F'
                             58 ;;       ld    de, #(OldPen << 8) | NewPen
                             59 ;;       call  cpct_spriteColourizeM1_asm
                             60 ;;       ret
                             61 ;;    
                             62 ;;    ;// Simple function that restores the Skin Colour 
                             63 ;;    ;// of a given Alien Sprite to yellow (after being changed to Cyan)  
                             64 ;;    ;// HL = Pointer to Alien Sprite
                             65 ;;    ;// BC = Size of Alien Sprite
                             66 ;;    restoreAlienSkinColourToYellow:
                             67 ;;       CPCTM_PEN2PIXELPATTERN_M1_ASM OldPen, 2 ;// Produces 'OldPen = 0x0F'
                             68 ;;       CPCTM_PEN2PIXELPATTERN_M1_ASM NewPen, 1 ;// Produces 'NewPen = 0xF0'
                             69 ;;       ld    de, #(OldPen << 8) | NewPen
                             70 ;;       call  cpct_spriteColourizeM1_asm
                             71 ;;       ret
                             72 ;; (end code)
                             73 ;;
                             74 .mdelete CPCTM_PEN2PIXELPATTERN_M1_ASM
                             75 .macro CPCTM_PEN2PIXELPATTERN_M1_ASM _Sym, _Pen
                             76    _Sym = ((((_Pen) & 1) << 7) | (((_Pen) & 1) << 6) | (((_Pen) & 1) << 5) | (((_Pen) & 1) << 4) | (((_Pen) & 2) << 2) | (((_Pen) & 2) << 1) | (((_Pen) & 2)     ) | (((_Pen) & 2) >> 1))
                             77 .endm  
                             78 
                             79 ;;
                             80 ;; Macro: CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM
                             81 ;;
                             82 ;;    Similarly to the function <cpct_pens2pixelPatternPairM1>, creates a 16 bits 
                             83 ;; value in Mode 1 screen pixel format, containing two pattern with all 4 pixels in 
                             84 ;; the same pen colour as given by the arguments *OldPen* and *NewPen*. 
                             85 ;;
                             86 ;; C Definition:
                             87 ;;    .macro <CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM> *SYM*, *OldPen*, *NewPen*
                             88 ;;
                             89 ;; Parameters:
                             90 ;;    SYM    - Name of a symbol to assign the resulting value of the calculation
                             91 ;;    OldPen - ([0-3], unsigned) Pen Colour to be found and replaced in <cpct_spriteColourizeM1>
                             92 ;;    NewPen - ([0-3], unsigned) New Pen Colour to be inserted in <cpct_spriteColourizeM1>
                             93 ;; 
                             94 ;; Known limitations:
                             95 ;;    * It does not perform any kind of checking. Values other than unsigned integers [0-3]
                             96 ;; will produce undefined behaviour.
                             97 ;;    * As this is a macro, this is designed only for CONSTANT values, to perform compile-time
                             98 ;; calculations. If you use it with variables, it will generate poor & slow code. Moreover, 
                             99 ;; generated code will be repeated if the macro is used multiple times, bloating your binary.
                            100 ;; Use <cpct_pen2pixelPatternM1> function for variables instead.
                            101 ;;
                            102 ;; Details:
                            103 ;;    This macro does the same operations the function <cpct_pens2pixelPatternPairM1> does, 
                            104 ;; but with an explicit operation that can be calculated at compile-time, producing a single 
                            105 ;; precalculated 16-bits value in your final binary (if you use it with constant values).
                            106 ;;
                            107 ;;    For more details on this operations, consult <cpct_pens2pixelPatternPairM1> help.
                            108 ;;
                            109 ;; Use example:
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 83.
Hexadecimal [16-Bits]



                            110 ;; (start code)
                            111 ;; ;// Simple function that changes the Skin Colour 
                            112 ;; ;// of a given Alien Sprite into Cyan (2) (Alien Skin is yellow (1) normally)  
                            113 ;; ;// HL = Pointer to Alien Sprite
                            114 ;; ;// BC = Size of Alien Sprite
                            115 ;; changeAlienSkinColourToCyan:
                            116 ;;    CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM rplcPat, 1, 2   ;// Change Pen 1 into Pen 2
                            117 ;;    ld    de, #rplcPat                                 ;// rplcPat = 0xF00F
                            118 ;;    call  cpct_spriteColourizeM1_asm
                            119 ;;    ret
                            120 ;;
                            121 ;; ;// Simple function that restores the Skin Colour 
                            122 ;; ;// of a given Alien Sprite to yellow (1) (after being changed to Cyan (2) )
                            123 ;; ;// HL = Pointer to Alien Sprite
                            124 ;; ;// BC = Size of Alien Sprite
                            125 ;; restoreAlienSkinColourToYellow:
                            126 ;;    CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM rplcPat, 2, 1   ;// Change Pen 2 into Pen 1
                            127 ;;    ld    de, #rplcPat                                 ;// rplcPat = 0x0FF0
                            128 ;;    call  cpct_spriteColourizeM1_asm
                            129 ;;    ret
                            130 ;; (end code)
                            131 ;;
                            132 .mdelete CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM
                            133 .macro CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM _Sym, _OldPen, _NewPen
                            134    CPCTM_PEN2PIXELPATTERN_M1_ASM _Sym'__h, _OldPen
                            135    CPCTM_PEN2PIXELPATTERN_M1_ASM _Sym'__l, _NewPen
                            136    _Sym = (_Sym'__h << 8) | _Sym'__l
                            137 .endm  
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 84.
Hexadecimal [16-Bits]



                             24 .include "../man/sprites.h.s"
                              1 ;; MIT License
                              2 ;; 
                              3 ;; Copyright (c) 2021 capAI / Aitana Devis  Ávila (@AitanaDevis) / Carlos Peñarrubia Morcillo  (@carlospm12) / Pablo Ruiz Ponce (@pabloruizp)
                              4 ;; 
                              5 ;; Permission is hereby granted, free of charge, to any person obtaining a copy
                              6 ;; of this software and associated documentation files (the "Software"), to deal
                              7 ;; in the Software without restriction, including without limitation the rights
                              8 ;; to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
                              9 ;; copies of the Software, and to permit persons to whom the Software is
                             10 ;; furnished to do so, subject to the following conditions:
                             11 ;; 
                             12 ;; The above copyright notice and this permission notice shall be included in all
                             13 ;; copies or substantial portions of the Software.
                             14 ;; 
                             15 ;; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
                             16 ;; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
                             17 ;; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
                             18 ;; AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
                             19 ;; LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
                             20 ;; OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
                             21 ;; SOFTWARE.
                             22 
                             23 ;;/////////////////////
                             24 ;;      SPRITES
                             25 ;;/////////////////////
                             26 ;##PLAYER
                             27 .globl _walking_0
                             28 .globl _walking_1
                             29 .globl _walking_2
                             30 .globl _walking_3
                             31 .globl _walking_4
                             32 
                             33 .globl _doggoJump
                             34 
                             35 .globl _crouched_0
                             36 .globl _crouched_1
                             37 .globl _crouched_2
                             38 .globl _crouched_3
                             39 .globl _crouched_4
                             40 
                             41 ;; ##PRADO
                             42 .globl _bloque_prado
                             43 
                             44 .globl _pradoBird
                             45 .globl _pradoRedBird
                             46 .globl _arbol2
                             47 .globl _arbol3
                             48 .globl _arbol4
                             49 
                             50 .globl _ralenPrado
                             51 
                             52 ;; ##DESIERTO
                             53 .globl _bloque_desierto
                             54 .globl _desiertoBird
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 85.
Hexadecimal [16-Bits]



                             55 .globl _desiertoIABird
                             56 .globl _cactus2
                             57 .globl _cactus3
                             58 .globl _cactus4
                             59 .globl _ralenDes
                             60 
                             61 ;; ##HALLOWEEN
                             62 .globl _bloque_halloween
                             63 .globl _halloweenBird
                             64 .globl _halloweenIABird
                             65 .globl _hallArbol2
                             66 .globl _hallArbol3
                             67 .globl _hallArbol4
                             68 .globl _ralenHallo
                             69 
                             70 
                             71 ;; ##GENERALES
                             72 .globl _ground
                             73 .globl _groundDesierto
                             74 .globl _groundHalloween
                             75 
                             76 .globl _endMapa
                             77 .globl _colisionFinal
                             78 .globl _bonus
                             79 .globl _muerte
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 86.
Hexadecimal [16-Bits]



                             25 .include "../man/entity.h.s"
                              1 ;; MIT License
                              2 ;; 
                              3 ;; Copyright (c) 2021 capAI / Aitana Devis  Ávila (@AitanaDevis) / Carlos Peñarrubia Morcillo  (@carlospm12) / Pablo Ruiz Ponce (@pabloruizp)
                              4 ;; 
                              5 ;; Permission is hereby granted, free of charge, to any person obtaining a copy
                              6 ;; of this software and associated documentation files (the "Software"), to deal
                              7 ;; in the Software without restriction, including without limitation the rights
                              8 ;; to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
                              9 ;; copies of the Software, and to permit persons to whom the Software is
                             10 ;; furnished to do so, subject to the following conditions:
                             11 ;; 
                             12 ;; The above copyright notice and this permission notice shall be included in all
                             13 ;; copies or substantial portions of the Software.
                             14 ;; 
                             15 ;; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
                             16 ;; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
                             17 ;; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
                             18 ;; AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
                             19 ;; LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
                             20 ;; OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
                             21 ;; SOFTWARE.
                             22 
                             23 ;;/////////////////////
                             24 ;; CONSTANS AND GLOBALS
                             25 ;;/////////////////////
                             26 
                             27 .globl cpct_memcpy_asm
                             28 
                     00AA    29 NIVEL_SUELO = #170
                     0010    30 P_H_INITIAL = #16
                     0000    31 nullptr = #0x00
                     FFFFFFFF    32 GRAVITY = #-1
                             33 
                             34 
                             35 ;;/////////////////////
                             36 ;; PLAYER DEFINITION
                             37 ;;/////////////////////
                             38 
                             39 ;;; MACRO FOR DEFINING A PLAYER 
                             40 
                             41 .macro DefinePlayer _NAME, P_X, P_Y, P_W, P_H, P_JUMP, P_PREV, P_VY, P_JUMP_COUNTER, P_STATE, P_SPR, P_ANIM, P_ANIM_STATE, P_ANIM_COUNTER, P_PREV_POINTER1, P_PREV_POINTER2
                             42 _NAME::
                             43     .db P_X
                             44     .db P_Y
                             45     .db P_W
                             46     .db P_H
                             47     .db P_JUMP ;;if its jumping
                             48     .dw P_PREV
                             49     .db P_VY
                             50     .db P_JUMP_COUNTER ;;if its jumping
                             51     .db P_STATE ;;0 if standing, 1 if crouched (agachado)
                             52     .dw P_SPR ;;puntero al sprite
                             53     .dw P_ANIM ;;puntero a la animación 
                             54     .db P_ANIM_STATE
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 87.
Hexadecimal [16-Bits]



                             55     .db P_ANIM_COUNTER
                             56     .dw P_PREV_POINTER1
                             57     .dw P_PREV_POINTER2
                             58 .endm
                             59 
                     000A    60 defaultFrames == 10 ;;animation duration frames
                             61 
                             62 .globl _player
                     0004    63 BASE_WIDTH_PLAYER = 4
                             64 
                     0000    65 P_X = 0 
                     0001    66 P_Y = 1 
                     0002    67 P_W = 2 
                     0003    68 P_H = 3 
                     0004    69 P_JUMP = 4       ;; VARIABLE PARA COMPROBAR SI ESTA EN EL AIRE
                     0005    70 P_PREV = 5      ;;(2) check if still alive
                     0007    71 P_VY = 7
                     0008    72 P_JUMP_COUNTER = 8
                     0009    73 P_STATE = 9        ;; 0 si está de pie, 1 si está agachado
                     000A    74 P_SPR = 10 ;;(2)
                     000C    75 P_ANIM = 12 ;;(2)
                     000E    76 P_ANIM_STATE = 14
                     000F    77 P_ANIM_COUNTER = 15
                     0010    78 P_PREV_POINTER1 = 16
                     0012    79 P_PREV_POINTER2 = 18
                             80 
                     0014    81 SIZE_PLAYER = 20
                             82 
                             83 ;;/////////////////////
                             84 ;; ENTITY DEFINITION
                             85 ;;/////////////////////
                             86 .macro DefineEntity E_TIPO, E_COMPONENTE, E_X, E_Y, E_OFFSET_L, E_OFFSET_H, E_W, E_H, E_PREV, E_SPR, E_AI_COUNTER 
                             87     .db E_TIPO
                             88     .db E_COMPONENTE
                             89     .db E_X
                             90     .db E_Y
                             91     .db E_OFFSET_L
                             92     .db E_OFFSET_H
                             93     .db E_W 
                             94     .db E_H
                             95     .dw E_PREV 
                             96     .dw E_SPR
                             97     .db E_AI_COUNTER
                             98 .endm
                             99 
                     0000   100 E_TIPO = 0
                     0001   101 E_COMPONENTE = 1
                            102 ;; COMPONENTE 1 (IA)
                            103 ;; COMPONENTE 2 (NO-RENDER)
                     0002   104 E_X = 2
                     0003   105 E_Y = 3
                     0004   106 E_OFFSET_L = 4           ;; (2)
                     0005   107 E_OFFSET_H = 5
                     0006   108 E_W = 6
                     0007   109 E_H = 7
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 88.
Hexadecimal [16-Bits]



                     0008   110 E_PREV = 8            ;; (2) indicates whether there's AI or not
                     000A   111 E_SPR_L = 10        ;;sprite pointer (2)
                     000B   112 E_SPR_H = 11
                     000C   113 E_AI_COUNTER = 12
                            114 
                            115 
                     000D   116 SIZE_ENTITY = 13 
                            117 
                            118 
                            119 ;; POR ULTIMO HAY QUE AÑADIR UN ENTERO QUE FUNCIONE COMO MASCARA PARA DETECTAR COLISIONES
                            120 ;; ESTE ATRIBUTO NOS INDICA CONTRA QUE TIPOS COLISIONO
                            121 
                            122 
                     0000   123 E_TYPE_INVALID = #0x00
                     0001   124 E_TYPE_DEAD = #0x01
                     0002   125 E_TYPE_DEFAULT = #0x02
                            126 
                     0001   127 E_CMP_RENDER = #0x01      ;; ENTIDAD SIN MOVIMIENTO
                     0002   128 E_CMP_MOVABLE = #0x02     ;; ENTIDAD QUE SE MUEVE POR PANTALLA
                     0020   129 E_CMP_COLLIDER = #0x20     ;; DEFINE SI EN ESTA ENTIDAD HAY QUE COMPROBAR COLISIONES
                     007F   130 E_CMP_DEFAULT = #0x7F
                            131 
                            132 ;;/////////////////////
                            133 ;;      MAPAS
                            134 ;;/////////////////////
                     009C   135 SIZE_MAPA_1 = #SIZE_ENTITY*12 
                            136 .globl _mapa1
                            137 
                     0179   138 SIZE_MAPA_2 = #SIZE_ENTITY*29
                            139 .globl _mapa2
                            140 
                     0111   141 SIZE_MAPA_3 = #SIZE_ENTITY*21  
                            142 .globl _mapa3
                            143 
                     0145   144 SIZE_MAPA_4 = #SIZE_ENTITY*25  
                            145 .globl _mapa4
                            146 
                     01AD   147 SIZE_MAPA_5 = #SIZE_ENTITY*33  
                            148 .globl _mapa5
                            149 
                     01C7   150 SIZE_MAPA_6 = #SIZE_ENTITY*35
                            151 .globl _mapa6
                            152 
                     01A0   153 SIZE_MAPA_7 = #SIZE_ENTITY*32
                            154 .globl _mapa7
                            155 
                     01AD   156 SIZE_MAPA_8 = #SIZE_ENTITY*33
                            157 .globl _mapa8
                            158 
                     01D4   159 SIZE_MAPA_9 = #SIZE_ENTITY*36 
                            160 .globl _mapa9
                            161 
                     0009   162 MAX_NIVEL = #9 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 89.
Hexadecimal [16-Bits]



                             26 
                             27 .globl _sys_ai_update_top_down
                             28 .globl _sys_ai_update_following
                             29 .globl _slow_game
                             30 .globl _add_20_score
                             31 .globl _add_10_score
                             32 
                             33 .area _DATA
                             34 
                             35 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             36 ;;                                                               ;;
                             37 ;;                       MAPAS OFICIALES                         ;;
                             38 ;;                                                               ;;
                             39 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             40 
                             41 
                             42 ;; MAPA 1 - TUTORIAL APRENDER A SALTAR
                             43 ;;
                             44 ;; DURACION ESTIMADA: 20 s
                             45 ;;
   5BE9                      46 _mapa1:: 
                             47 ;;          TIPO COMP  X    Y  OFF_L  OFF_H  E_W  E_H     E_PREV  E_SPR        E_AI_COUNTER
   0000                      48 DefineEntity 4,  0,    0, 138,  0,    80,     6,  16*2,     0,    #_arbol2, 0  
   5BE9 04                    1     .db 4
   5BEA 00                    2     .db 0
   5BEB 00                    3     .db 0
   5BEC 8A                    4     .db 138
   5BED 00                    5     .db 0
   5BEE 50                    6     .db 80
   5BEF 06                    7     .db 6 
   5BF0 20                    8     .db 16*2
   5BF1 00 00                 9     .dw 0 
   5BF3 56 1E                10     .dw #_arbol2
   5BF5 00                   11     .db 0
   000D                      49 DefineEntity 4,  0,    0, 138,  0,    160,    6,  16*2,     0,    #_arbol2, 0  
   5BF6 04                    1     .db 4
   5BF7 00                    2     .db 0
   5BF8 00                    3     .db 0
   5BF9 8A                    4     .db 138
   5BFA 00                    5     .db 0
   5BFB A0                    6     .db 160
   5BFC 06                    7     .db 6 
   5BFD 20                    8     .db 16*2
   5BFE 00 00                 9     .dw 0 
   5C00 56 1E                10     .dw #_arbol2
   5C02 00                   11     .db 0
   001A                      50 DefineEntity 8,  0,    0, 154, 0,     180,    5,  10,     #_add_10_score,    #_bonus, 0 
   5C03 08                    1     .db 8
   5C04 00                    2     .db 0
   5C05 00                    3     .db 0
   5C06 9A                    4     .db 154
   5C07 00                    5     .db 0
   5C08 B4                    6     .db 180
   5C09 05                    7     .db 5 
   5C0A 0A                    8     .db 10
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 90.
Hexadecimal [16-Bits]



   5C0B 33 46                 9     .dw #_add_10_score 
   5C0D D3 33                10     .dw #_bonus
   5C0F 00                   11     .db 0
   0027                      51 DefineEntity 4,  0,    0, 138,  0,    230,    6,  16*2,     0,    #_arbol2, 0  
   5C10 04                    1     .db 4
   5C11 00                    2     .db 0
   5C12 00                    3     .db 0
   5C13 8A                    4     .db 138
   5C14 00                    5     .db 0
   5C15 E6                    6     .db 230
   5C16 06                    7     .db 6 
   5C17 20                    8     .db 16*2
   5C18 00 00                 9     .dw 0 
   5C1A 56 1E                10     .dw #_arbol2
   5C1C 00                   11     .db 0
   0034                      52 DefineEntity 8,  0,    0, 154, 0,     240,    5,  10,     #_add_10_score,    #_bonus, 0 
   5C1D 08                    1     .db 8
   5C1E 00                    2     .db 0
   5C1F 00                    3     .db 0
   5C20 9A                    4     .db 154
   5C21 00                    5     .db 0
   5C22 F0                    6     .db 240
   5C23 05                    7     .db 5 
   5C24 0A                    8     .db 10
   5C25 33 46                 9     .dw #_add_10_score 
   5C27 D3 33                10     .dw #_bonus
   5C29 00                   11     .db 0
   0041                      53 DefineEntity 4,  0,    0, 138,  1,    20,     6,  16*2,     0,    #_arbol2, 0  
   5C2A 04                    1     .db 4
   5C2B 00                    2     .db 0
   5C2C 00                    3     .db 0
   5C2D 8A                    4     .db 138
   5C2E 01                    5     .db 1
   5C2F 14                    6     .db 20
   5C30 06                    7     .db 6 
   5C31 20                    8     .db 16*2
   5C32 00 00                 9     .dw 0 
   5C34 56 1E                10     .dw #_arbol2
   5C36 00                   11     .db 0
   004E                      54 DefineEntity 4,  0,    0, 122,  1,    60,     6,  16*3,     0,    #_arbol3, 0
   5C37 04                    1     .db 4
   5C38 00                    2     .db 0
   5C39 00                    3     .db 0
   5C3A 7A                    4     .db 122
   5C3B 01                    5     .db 1
   5C3C 3C                    6     .db 60
   5C3D 06                    7     .db 6 
   5C3E 30                    8     .db 16*3
   5C3F 00 00                 9     .dw 0 
   5C41 36 1D                10     .dw #_arbol3
   5C43 00                   11     .db 0
   005B                      55 DefineEntity 8,  0,    0, 154, 1,     90,     5,  10,     #_add_10_score,    #_bonus, 0 
   5C44 08                    1     .db 8
   5C45 00                    2     .db 0
   5C46 00                    3     .db 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 91.
Hexadecimal [16-Bits]



   5C47 9A                    4     .db 154
   5C48 01                    5     .db 1
   5C49 5A                    6     .db 90
   5C4A 05                    7     .db 5 
   5C4B 0A                    8     .db 10
   5C4C 33 46                 9     .dw #_add_10_score 
   5C4E D3 33                10     .dw #_bonus
   5C50 00                   11     .db 0
   0068                      56 DefineEntity 4,  0,    0, 138,  1,    120,    6,  16*2,     0,    #_arbol2, 0  
   5C51 04                    1     .db 4
   5C52 00                    2     .db 0
   5C53 00                    3     .db 0
   5C54 8A                    4     .db 138
   5C55 01                    5     .db 1
   5C56 78                    6     .db 120
   5C57 06                    7     .db 6 
   5C58 20                    8     .db 16*2
   5C59 00 00                 9     .dw 0 
   5C5B 56 1E                10     .dw #_arbol2
   5C5D 00                   11     .db 0
   0075                      57 DefineEntity 4,  0,    0, 106,  1,    190,    6,  16*4,     0,    #_arbol4, 0
   5C5E 04                    1     .db 4
   5C5F 00                    2     .db 0
   5C60 00                    3     .db 0
   5C61 6A                    4     .db 106
   5C62 01                    5     .db 1
   5C63 BE                    6     .db 190
   5C64 06                    7     .db 6 
   5C65 40                    8     .db 16*4
   5C66 00 00                 9     .dw 0 
   5C68 B6 1B                10     .dw #_arbol4
   5C6A 00                   11     .db 0
                             58 
   0082                      59 DefineEntity 16, 0,    0, 114,  2,    60,  6,  56, 0, #_endMapa, 0  
   5C6B 10                    1     .db 16
   5C6C 00                    2     .db 0
   5C6D 00                    3     .db 0
   5C6E 72                    4     .db 114
   5C6F 02                    5     .db 2
   5C70 3C                    6     .db 60
   5C71 06                    7     .db 6 
   5C72 38                    8     .db 56
   5C73 00 00                 9     .dw 0 
   5C75 83 32                10     .dw #_endMapa
   5C77 00                   11     .db 0
   008F                      60 DefineEntity 16, 0,    0,   20,  2,    66,  1,  114,0, #_colisionFinal, 0
   5C78 10                    1     .db 16
   5C79 00                    2     .db 0
   5C7A 00                    3     .db 0
   5C7B 14                    4     .db 20
   5C7C 02                    5     .db 2
   5C7D 42                    6     .db 66
   5C7E 01                    7     .db 1 
   5C7F 72                    8     .db 114
   5C80 00 00                 9     .dw 0 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 92.
Hexadecimal [16-Bits]



   5C82 11 32                10     .dw #_colisionFinal
   5C84 00                   11     .db 0
                             61 
                             62 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             63 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             64 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             65 
                             66 
                             67 
                             68 ;; MAPA 2 - TUTORIAL PLATAFORMAS
                             69 ;;
                             70 ;; DURACION ESTIMADA: 20 s
                             71 ;;
   5C85                      72 _mapa2::
                             73 ;;          TIPO COMP  X    Y  OFF_L  OFF_H  E_W  E_H  E_PREV  E_SPR        E_AI_COUNTER
   009C                      74 DefineEntity 2,  0,    0, 120, 0,     124,    6,  16,     0,    #_bloque_prado, 0
   5C85 02                    1     .db 2
   5C86 00                    2     .db 0
   5C87 00                    3     .db 0
   5C88 78                    4     .db 120
   5C89 00                    5     .db 0
   5C8A 7C                    6     .db 124
   5C8B 06                    7     .db 6 
   5C8C 10                    8     .db 16
   5C8D 00 00                 9     .dw 0 
   5C8F 5E 1F                10     .dw #_bloque_prado
   5C91 00                   11     .db 0
   00A9                      75 DefineEntity 8,  0,    0, 110,  0,    126,    5,  10,     #_add_10_score,    #_bonus, 0 
   5C92 08                    1     .db 8
   5C93 00                    2     .db 0
   5C94 00                    3     .db 0
   5C95 6E                    4     .db 110
   5C96 00                    5     .db 0
   5C97 7E                    6     .db 126
   5C98 05                    7     .db 5 
   5C99 0A                    8     .db 10
   5C9A 33 46                 9     .dw #_add_10_score 
   5C9C D3 33                10     .dw #_bonus
   5C9E 00                   11     .db 0
   00B6                      76 DefineEntity 2,  0,    0, 120, 0,     128,    6,  16,     0,    #_bloque_prado, 0
   5C9F 02                    1     .db 2
   5CA0 00                    2     .db 0
   5CA1 00                    3     .db 0
   5CA2 78                    4     .db 120
   5CA3 00                    5     .db 0
   5CA4 80                    6     .db 128
   5CA5 06                    7     .db 6 
   5CA6 10                    8     .db 16
   5CA7 00 00                 9     .dw 0 
   5CA9 5E 1F                10     .dw #_bloque_prado
   5CAB 00                   11     .db 0
                             77 
   00C3                      78 DefineEntity 2,  0,    0, 120, 0,     194,    6,  16,     0,    #_bloque_prado, 0
   5CAC 02                    1     .db 2
   5CAD 00                    2     .db 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 93.
Hexadecimal [16-Bits]



   5CAE 00                    3     .db 0
   5CAF 78                    4     .db 120
   5CB0 00                    5     .db 0
   5CB1 C2                    6     .db 194
   5CB2 06                    7     .db 6 
   5CB3 10                    8     .db 16
   5CB4 00 00                 9     .dw 0 
   5CB6 5E 1F                10     .dw #_bloque_prado
   5CB8 00                   11     .db 0
   00D0                      79 DefineEntity 2,  0,    0, 120, 0,     198,    6,  16,     0,    #_bloque_prado, 0
   5CB9 02                    1     .db 2
   5CBA 00                    2     .db 0
   5CBB 00                    3     .db 0
   5CBC 78                    4     .db 120
   5CBD 00                    5     .db 0
   5CBE C6                    6     .db 198
   5CBF 06                    7     .db 6 
   5CC0 10                    8     .db 16
   5CC1 00 00                 9     .dw 0 
   5CC3 5E 1F                10     .dw #_bloque_prado
   5CC5 00                   11     .db 0
   00DD                      80 DefineEntity 8,  0,    0, 110,  0,    202,    5,  10,     #_add_10_score,    #_bonus, 0 
   5CC6 08                    1     .db 8
   5CC7 00                    2     .db 0
   5CC8 00                    3     .db 0
   5CC9 6E                    4     .db 110
   5CCA 00                    5     .db 0
   5CCB CA                    6     .db 202
   5CCC 05                    7     .db 5 
   5CCD 0A                    8     .db 10
   5CCE 33 46                 9     .dw #_add_10_score 
   5CD0 D3 33                10     .dw #_bonus
   5CD2 00                   11     .db 0
   00EA                      81 DefineEntity 2,  0,    0, 120, 0,     202,    6,  16,     0,    #_bloque_prado, 0
   5CD3 02                    1     .db 2
   5CD4 00                    2     .db 0
   5CD5 00                    3     .db 0
   5CD6 78                    4     .db 120
   5CD7 00                    5     .db 0
   5CD8 CA                    6     .db 202
   5CD9 06                    7     .db 6 
   5CDA 10                    8     .db 16
   5CDB 00 00                 9     .dw 0 
   5CDD 5E 1F                10     .dw #_bloque_prado
   5CDF 00                   11     .db 0
   00F7                      82 DefineEntity 2,  0,    0, 120, 0,     206,    6,  16,     0,    #_bloque_prado, 0
   5CE0 02                    1     .db 2
   5CE1 00                    2     .db 0
   5CE2 00                    3     .db 0
   5CE3 78                    4     .db 120
   5CE4 00                    5     .db 0
   5CE5 CE                    6     .db 206
   5CE6 06                    7     .db 6 
   5CE7 10                    8     .db 16
   5CE8 00 00                 9     .dw 0 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 94.
Hexadecimal [16-Bits]



   5CEA 5E 1F                10     .dw #_bloque_prado
   5CEC 00                   11     .db 0
                             83 
   0104                      84 DefineEntity 2,  0,    0, 100, 1,     130,    6,  16,     0,    #_bloque_prado, 0
   5CED 02                    1     .db 2
   5CEE 00                    2     .db 0
   5CEF 00                    3     .db 0
   5CF0 64                    4     .db 100
   5CF1 01                    5     .db 1
   5CF2 82                    6     .db 130
   5CF3 06                    7     .db 6 
   5CF4 10                    8     .db 16
   5CF5 00 00                 9     .dw 0 
   5CF7 5E 1F                10     .dw #_bloque_prado
   5CF9 00                   11     .db 0
   0111                      85 DefineEntity 2,  0,    0, 100, 1,     134,    6,  16,     0,    #_bloque_prado, 0
   5CFA 02                    1     .db 2
   5CFB 00                    2     .db 0
   5CFC 00                    3     .db 0
   5CFD 64                    4     .db 100
   5CFE 01                    5     .db 1
   5CFF 86                    6     .db 134
   5D00 06                    7     .db 6 
   5D01 10                    8     .db 16
   5D02 00 00                 9     .dw 0 
   5D04 5E 1F                10     .dw #_bloque_prado
   5D06 00                   11     .db 0
   011E                      86 DefineEntity 2,  0,    0, 100, 1,     138,    6,  16,     0,    #_bloque_prado, 0
   5D07 02                    1     .db 2
   5D08 00                    2     .db 0
   5D09 00                    3     .db 0
   5D0A 64                    4     .db 100
   5D0B 01                    5     .db 1
   5D0C 8A                    6     .db 138
   5D0D 06                    7     .db 6 
   5D0E 10                    8     .db 16
   5D0F 00 00                 9     .dw 0 
   5D11 5E 1F                10     .dw #_bloque_prado
   5D13 00                   11     .db 0
                             87 
   012B                      88 DefineEntity 2,  0,    0, 85, 1,     162,    6,  16,     0,    #_bloque_prado, 0
   5D14 02                    1     .db 2
   5D15 00                    2     .db 0
   5D16 00                    3     .db 0
   5D17 55                    4     .db 85
   5D18 01                    5     .db 1
   5D19 A2                    6     .db 162
   5D1A 06                    7     .db 6 
   5D1B 10                    8     .db 16
   5D1C 00 00                 9     .dw 0 
   5D1E 5E 1F                10     .dw #_bloque_prado
   5D20 00                   11     .db 0
   0138                      89 DefineEntity 2,  0,    0, 85, 1,     166,    6,  16,     0,    #_bloque_prado, 0
   5D21 02                    1     .db 2
   5D22 00                    2     .db 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 95.
Hexadecimal [16-Bits]



   5D23 00                    3     .db 0
   5D24 55                    4     .db 85
   5D25 01                    5     .db 1
   5D26 A6                    6     .db 166
   5D27 06                    7     .db 6 
   5D28 10                    8     .db 16
   5D29 00 00                 9     .dw 0 
   5D2B 5E 1F                10     .dw #_bloque_prado
   5D2D 00                   11     .db 0
   0145                      90 DefineEntity 8,  0,    0, 70, 1,     167,    5,  10,     #_add_20_score,    #_bonus, 0 
   5D2E 08                    1     .db 8
   5D2F 00                    2     .db 0
   5D30 00                    3     .db 0
   5D31 46                    4     .db 70
   5D32 01                    5     .db 1
   5D33 A7                    6     .db 167
   5D34 05                    7     .db 5 
   5D35 0A                    8     .db 10
   5D36 1F 46                 9     .dw #_add_20_score 
   5D38 D3 33                10     .dw #_bonus
   5D3A 00                   11     .db 0
   0152                      91 DefineEntity 2,  0,    0, 85, 1,     167,    6,  16,     0,    #_bloque_prado, 0
   5D3B 02                    1     .db 2
   5D3C 00                    2     .db 0
   5D3D 00                    3     .db 0
   5D3E 55                    4     .db 85
   5D3F 01                    5     .db 1
   5D40 A7                    6     .db 167
   5D41 06                    7     .db 6 
   5D42 10                    8     .db 16
   5D43 00 00                 9     .dw 0 
   5D45 5E 1F                10     .dw #_bloque_prado
   5D47 00                   11     .db 0
                             92 
                             93 
   015F                      94 DefineEntity 2,  0,    0, 120, 2,     2,    6,  16,     0,    #_bloque_prado, 0
   5D48 02                    1     .db 2
   5D49 00                    2     .db 0
   5D4A 00                    3     .db 0
   5D4B 78                    4     .db 120
   5D4C 02                    5     .db 2
   5D4D 02                    6     .db 2
   5D4E 06                    7     .db 6 
   5D4F 10                    8     .db 16
   5D50 00 00                 9     .dw 0 
   5D52 5E 1F                10     .dw #_bloque_prado
   5D54 00                   11     .db 0
   016C                      95 DefineEntity 2,  0,    0, 120, 2,     6,    6,  16,     0,    #_bloque_prado, 0
   5D55 02                    1     .db 2
   5D56 00                    2     .db 0
   5D57 00                    3     .db 0
   5D58 78                    4     .db 120
   5D59 02                    5     .db 2
   5D5A 06                    6     .db 6
   5D5B 06                    7     .db 6 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 96.
Hexadecimal [16-Bits]



   5D5C 10                    8     .db 16
   5D5D 00 00                 9     .dw 0 
   5D5F 5E 1F                10     .dw #_bloque_prado
   5D61 00                   11     .db 0
                             96 
                             97 
   0179                      98 DefineEntity 2,  0,    0, 85, 2,     30,    6,  16,     0,    #_bloque_prado, 0
   5D62 02                    1     .db 2
   5D63 00                    2     .db 0
   5D64 00                    3     .db 0
   5D65 55                    4     .db 85
   5D66 02                    5     .db 2
   5D67 1E                    6     .db 30
   5D68 06                    7     .db 6 
   5D69 10                    8     .db 16
   5D6A 00 00                 9     .dw 0 
   5D6C 5E 1F                10     .dw #_bloque_prado
   5D6E 00                   11     .db 0
   0186                      99 DefineEntity 2,  0,    0, 85, 2,     34,    6,  16,     0,    #_bloque_prado, 0
   5D6F 02                    1     .db 2
   5D70 00                    2     .db 0
   5D71 00                    3     .db 0
   5D72 55                    4     .db 85
   5D73 02                    5     .db 2
   5D74 22                    6     .db 34
   5D75 06                    7     .db 6 
   5D76 10                    8     .db 16
   5D77 00 00                 9     .dw 0 
   5D79 5E 1F                10     .dw #_bloque_prado
   5D7B 00                   11     .db 0
                            100 
                            101 
   0193                     102 DefineEntity 2,  0,    0, 60, 2,     54,    6,  16,     0,    #_bloque_prado, 0
   5D7C 02                    1     .db 2
   5D7D 00                    2     .db 0
   5D7E 00                    3     .db 0
   5D7F 3C                    4     .db 60
   5D80 02                    5     .db 2
   5D81 36                    6     .db 54
   5D82 06                    7     .db 6 
   5D83 10                    8     .db 16
   5D84 00 00                 9     .dw 0 
   5D86 5E 1F                10     .dw #_bloque_prado
   5D88 00                   11     .db 0
   01A0                     103 DefineEntity 8,  0,    0, 50, 2,     58,    5,  10,     #_add_10_score,    #_bonus, 0 
   5D89 08                    1     .db 8
   5D8A 00                    2     .db 0
   5D8B 00                    3     .db 0
   5D8C 32                    4     .db 50
   5D8D 02                    5     .db 2
   5D8E 3A                    6     .db 58
   5D8F 05                    7     .db 5 
   5D90 0A                    8     .db 10
   5D91 33 46                 9     .dw #_add_10_score 
   5D93 D3 33                10     .dw #_bonus
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 97.
Hexadecimal [16-Bits]



   5D95 00                   11     .db 0
   01AD                     104 DefineEntity 2,  0,    0, 60, 2,     58,    6,  16,     0,    #_bloque_prado, 0
   5D96 02                    1     .db 2
   5D97 00                    2     .db 0
   5D98 00                    3     .db 0
   5D99 3C                    4     .db 60
   5D9A 02                    5     .db 2
   5D9B 3A                    6     .db 58
   5D9C 06                    7     .db 6 
   5D9D 10                    8     .db 16
   5D9E 00 00                 9     .dw 0 
   5DA0 5E 1F                10     .dw #_bloque_prado
   5DA2 00                   11     .db 0
                            105 
                            106 
   01BA                     107 DefineEntity 2,  0,    0, 85, 2,     100,    6,  16,     0,    #_bloque_prado, 0
   5DA3 02                    1     .db 2
   5DA4 00                    2     .db 0
   5DA5 00                    3     .db 0
   5DA6 55                    4     .db 85
   5DA7 02                    5     .db 2
   5DA8 64                    6     .db 100
   5DA9 06                    7     .db 6 
   5DAA 10                    8     .db 16
   5DAB 00 00                 9     .dw 0 
   5DAD 5E 1F                10     .dw #_bloque_prado
   5DAF 00                   11     .db 0
   01C7                     108 DefineEntity 2,  0,    0, 85, 2,     104,    6,  16,     0,    #_bloque_prado, 0
   5DB0 02                    1     .db 2
   5DB1 00                    2     .db 0
   5DB2 00                    3     .db 0
   5DB3 55                    4     .db 85
   5DB4 02                    5     .db 2
   5DB5 68                    6     .db 104
   5DB6 06                    7     .db 6 
   5DB7 10                    8     .db 16
   5DB8 00 00                 9     .dw 0 
   5DBA 5E 1F                10     .dw #_bloque_prado
   5DBC 00                   11     .db 0
   01D4                     109 DefineEntity 2,  0,    0, 60, 2,     112,    6,  16,     0,    #_bloque_prado, 0
   5DBD 02                    1     .db 2
   5DBE 00                    2     .db 0
   5DBF 00                    3     .db 0
   5DC0 3C                    4     .db 60
   5DC1 02                    5     .db 2
   5DC2 70                    6     .db 112
   5DC3 06                    7     .db 6 
   5DC4 10                    8     .db 16
   5DC5 00 00                 9     .dw 0 
   5DC7 5E 1F                10     .dw #_bloque_prado
   5DC9 00                   11     .db 0
   01E1                     110 DefineEntity 8,  0,    0, 50, 2,     114,    5,  10,     #_add_10_score,    #_bonus, 0 
   5DCA 08                    1     .db 8
   5DCB 00                    2     .db 0
   5DCC 00                    3     .db 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 98.
Hexadecimal [16-Bits]



   5DCD 32                    4     .db 50
   5DCE 02                    5     .db 2
   5DCF 72                    6     .db 114
   5DD0 05                    7     .db 5 
   5DD1 0A                    8     .db 10
   5DD2 33 46                 9     .dw #_add_10_score 
   5DD4 D3 33                10     .dw #_bonus
   5DD6 00                   11     .db 0
   01EE                     111 DefineEntity 2,  0,    0, 60, 2,     116,    6,  16,     0,    #_bloque_prado, 0
   5DD7 02                    1     .db 2
   5DD8 00                    2     .db 0
   5DD9 00                    3     .db 0
   5DDA 3C                    4     .db 60
   5DDB 02                    5     .db 2
   5DDC 74                    6     .db 116
   5DDD 06                    7     .db 6 
   5DDE 10                    8     .db 16
   5DDF 00 00                 9     .dw 0 
   5DE1 5E 1F                10     .dw #_bloque_prado
   5DE3 00                   11     .db 0
                            112 
                            113 ;; ESTARIA BIEN PONER EN EL SUELO ALGUN ARBOL PARA FORZAR A LA PERSONA A TENER QUE USAR LAS PLATAFORMAS
                            114 
   01FB                     115 DefineEntity 16, 0,    0, 114,   2,    240,  6,  56, 0, #_endMapa, 0  
   5DE4 10                    1     .db 16
   5DE5 00                    2     .db 0
   5DE6 00                    3     .db 0
   5DE7 72                    4     .db 114
   5DE8 02                    5     .db 2
   5DE9 F0                    6     .db 240
   5DEA 06                    7     .db 6 
   5DEB 38                    8     .db 56
   5DEC 00 00                 9     .dw 0 
   5DEE 83 32                10     .dw #_endMapa
   5DF0 00                   11     .db 0
   0208                     116 DefineEntity 16, 0,    0,   20,  2,    247,  1,  114,0, #_colisionFinal, 0
   5DF1 10                    1     .db 16
   5DF2 00                    2     .db 0
   5DF3 00                    3     .db 0
   5DF4 14                    4     .db 20
   5DF5 02                    5     .db 2
   5DF6 F7                    6     .db 247
   5DF7 01                    7     .db 1 
   5DF8 72                    8     .db 114
   5DF9 00 00                 9     .dw 0 
   5DFB 11 32                10     .dw #_colisionFinal
   5DFD 00                   11     .db 0
                            117 
                            118 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            119 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            120 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            121 
                            122 
                            123 
                            124 ;; MAPA 3 - TUTORIAL ENEMIGOS + IA + RALENTIZAR
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 99.
Hexadecimal [16-Bits]



                            125 ;;
                            126 ;; DURACION ESTIMADA: 20 s
                            127 ;;
   5DFE                     128 _mapa3::
                            129 ;;          TIPO COMP  X    Y  OFF_L  OFF_H  E_W  E_H  E_PREV  E_SPR        E_AI_COUNTER
   0215                     130 DefineEntity 4,  0,    1, 110,  0,     80,  4,  5,              0,              #_pradoBird,      0   
   5DFE 04                    1     .db 4
   5DFF 00                    2     .db 0
   5E00 01                    3     .db 1
   5E01 6E                    4     .db 110
   5E02 00                    5     .db 0
   5E03 50                    6     .db 80
   5E04 04                    7     .db 4 
   5E05 05                    8     .db 5
   5E06 00 00                 9     .dw 0 
   5E08 4A 1F                10     .dw #_pradoBird
   5E0A 00                   11     .db 0
   0222                     131 DefineEntity 4,  0,    1, 150,  0,     160,  4,  5,              0,              #_pradoBird,      0   
   5E0B 04                    1     .db 4
   5E0C 00                    2     .db 0
   5E0D 01                    3     .db 1
   5E0E 96                    4     .db 150
   5E0F 00                    5     .db 0
   5E10 A0                    6     .db 160
   5E11 04                    7     .db 4 
   5E12 05                    8     .db 5
   5E13 00 00                 9     .dw 0 
   5E15 4A 1F                10     .dw #_pradoBird
   5E17 00                   11     .db 0
                            132 
   022F                     133 DefineEntity 4,  0,    1, 150,  0,     220,  4,  5,              0,              #_pradoBird,      0   
   5E18 04                    1     .db 4
   5E19 00                    2     .db 0
   5E1A 01                    3     .db 1
   5E1B 96                    4     .db 150
   5E1C 00                    5     .db 0
   5E1D DC                    6     .db 220
   5E1E 04                    7     .db 4 
   5E1F 05                    8     .db 5
   5E20 00 00                 9     .dw 0 
   5E22 4A 1F                10     .dw #_pradoBird
   5E24 00                   11     .db 0
   023C                     134 DefineEntity 8,  0,    0, 154,  0,     230,    5,  10,     #_add_10_score,       #_bonus, 0 
   5E25 08                    1     .db 8
   5E26 00                    2     .db 0
   5E27 00                    3     .db 0
   5E28 9A                    4     .db 154
   5E29 00                    5     .db 0
   5E2A E6                    6     .db 230
   5E2B 05                    7     .db 5 
   5E2C 0A                    8     .db 10
   5E2D 33 46                 9     .dw #_add_10_score 
   5E2F D3 33                10     .dw #_bonus
   5E31 00                   11     .db 0
   0249                     135 DefineEntity 4,  0,    1, 110,  0,     240,  4,  5,              0,              #_pradoBird,      0  
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 100.
Hexadecimal [16-Bits]



   5E32 04                    1     .db 4
   5E33 00                    2     .db 0
   5E34 01                    3     .db 1
   5E35 6E                    4     .db 110
   5E36 00                    5     .db 0
   5E37 F0                    6     .db 240
   5E38 04                    7     .db 4 
   5E39 05                    8     .db 5
   5E3A 00 00                 9     .dw 0 
   5E3C 4A 1F                10     .dw #_pradoBird
   5E3E 00                   11     .db 0
   0256                     136 DefineEntity 4,  0,    1, 125,  0,     250,  4,  5,              0,              #_pradoBird,      0  
   5E3F 04                    1     .db 4
   5E40 00                    2     .db 0
   5E41 01                    3     .db 1
   5E42 7D                    4     .db 125
   5E43 00                    5     .db 0
   5E44 FA                    6     .db 250
   5E45 04                    7     .db 4 
   5E46 05                    8     .db 5
   5E47 00 00                 9     .dw 0 
   5E49 4A 1F                10     .dw #_pradoBird
   5E4B 00                   11     .db 0
                            137 
   0263                     138 DefineEntity 4,  0,    1, 150,  1,     80,  4,  5,              0,              #_pradoBird,      0   
   5E4C 04                    1     .db 4
   5E4D 00                    2     .db 0
   5E4E 01                    3     .db 1
   5E4F 96                    4     .db 150
   5E50 01                    5     .db 1
   5E51 50                    6     .db 80
   5E52 04                    7     .db 4 
   5E53 05                    8     .db 5
   5E54 00 00                 9     .dw 0 
   5E56 4A 1F                10     .dw #_pradoBird
   5E58 00                   11     .db 0
   0270                     139 DefineEntity 4,  0,    0, 106,  1,     120,    6,  16*4,         0,              #_arbol4, 0
   5E59 04                    1     .db 4
   5E5A 00                    2     .db 0
   5E5B 00                    3     .db 0
   5E5C 6A                    4     .db 106
   5E5D 01                    5     .db 1
   5E5E 78                    6     .db 120
   5E5F 06                    7     .db 6 
   5E60 40                    8     .db 16*4
   5E61 00 00                 9     .dw 0 
   5E63 B6 1B                10     .dw #_arbol4
   5E65 00                   11     .db 0
   027D                     140 DefineEntity 4,  0,    1, 160,  1,     180,  4,  5,              0,              #_pradoBird,      0   
   5E66 04                    1     .db 4
   5E67 00                    2     .db 0
   5E68 01                    3     .db 1
   5E69 A0                    4     .db 160
   5E6A 01                    5     .db 1
   5E6B B4                    6     .db 180
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 101.
Hexadecimal [16-Bits]



   5E6C 04                    7     .db 4 
   5E6D 05                    8     .db 5
   5E6E 00 00                 9     .dw 0 
   5E70 4A 1F                10     .dw #_pradoBird
   5E72 00                   11     .db 0
   028A                     141 DefineEntity 4,  0,    1, 140,  1,     195,  4,  5,              0,              #_pradoBird,      0  
   5E73 04                    1     .db 4
   5E74 00                    2     .db 0
   5E75 01                    3     .db 1
   5E76 8C                    4     .db 140
   5E77 01                    5     .db 1
   5E78 C3                    6     .db 195
   5E79 04                    7     .db 4 
   5E7A 05                    8     .db 5
   5E7B 00 00                 9     .dw 0 
   5E7D 4A 1F                10     .dw #_pradoBird
   5E7F 00                   11     .db 0
   0297                     142 DefineEntity 8,  0,    0, 154,  1,     195,    5,  10,     #_add_20_score,       #_bonus, 0 
   5E80 08                    1     .db 8
   5E81 00                    2     .db 0
   5E82 00                    3     .db 0
   5E83 9A                    4     .db 154
   5E84 01                    5     .db 1
   5E85 C3                    6     .db 195
   5E86 05                    7     .db 5 
   5E87 0A                    8     .db 10
   5E88 1F 46                 9     .dw #_add_20_score 
   5E8A D3 33                10     .dw #_bonus
   5E8C 00                   11     .db 0
                            143 
                            144 
                            145 ;; EN 58 colisiona
   02A4                     146 DefineEntity 4,  1,    2, 150,  2,     58,  4,  13, #_sys_ai_update_top_down,   #_pradoRedBird,      0   
   5E8D 04                    1     .db 4
   5E8E 01                    2     .db 1
   5E8F 02                    3     .db 2
   5E90 96                    4     .db 150
   5E91 02                    5     .db 2
   5E92 3A                    6     .db 58
   5E93 04                    7     .db 4 
   5E94 0D                    8     .db 13
   5E95 9D 3F                 9     .dw #_sys_ai_update_top_down 
   5E97 16 1F                10     .dw #_pradoRedBird
   5E99 00                   11     .db 0
   02B1                     147 DefineEntity 4,  1,    2, 150,  2,     138,  4,  13, #_sys_ai_update_top_down,   #_pradoRedBird,      0   
   5E9A 04                    1     .db 4
   5E9B 01                    2     .db 1
   5E9C 02                    3     .db 2
   5E9D 96                    4     .db 150
   5E9E 02                    5     .db 2
   5E9F 8A                    6     .db 138
   5EA0 04                    7     .db 4 
   5EA1 0D                    8     .db 13
   5EA2 9D 3F                 9     .dw #_sys_ai_update_top_down 
   5EA4 16 1F                10     .dw #_pradoRedBird
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 102.
Hexadecimal [16-Bits]



   5EA6 00                   11     .db 0
   02BE                     148 DefineEntity 8,  0,    0, 154,  2,     150,    5,  10,     #_add_20_score,       #_bonus, 0 
   5EA7 08                    1     .db 8
   5EA8 00                    2     .db 0
   5EA9 00                    3     .db 0
   5EAA 9A                    4     .db 154
   5EAB 02                    5     .db 2
   5EAC 96                    6     .db 150
   5EAD 05                    7     .db 5 
   5EAE 0A                    8     .db 10
   5EAF 1F 46                 9     .dw #_add_20_score 
   5EB1 D3 33                10     .dw #_bonus
   5EB3 00                   11     .db 0
   02CB                     149 DefineEntity 4,  0,    1, 120,  2,     160,  4,  5,              0,              #_pradoBird,      0  
   5EB4 04                    1     .db 4
   5EB5 00                    2     .db 0
   5EB6 01                    3     .db 1
   5EB7 78                    4     .db 120
   5EB8 02                    5     .db 2
   5EB9 A0                    6     .db 160
   5EBA 04                    7     .db 4 
   5EBB 05                    8     .db 5
   5EBC 00 00                 9     .dw 0 
   5EBE 4A 1F                10     .dw #_pradoBird
   5EC0 00                   11     .db 0
                            150 
                            151 ;; TODO
   02D8                     152 DefineEntity 4,  1,    2, 150,  3,     0,  4,  13, #_sys_ai_update_following,   #_pradoRedBird,      0   
   5EC1 04                    1     .db 4
   5EC2 01                    2     .db 1
   5EC3 02                    3     .db 2
   5EC4 96                    4     .db 150
   5EC5 03                    5     .db 3
   5EC6 00                    6     .db 0
   5EC7 04                    7     .db 4 
   5EC8 0D                    8     .db 13
   5EC9 4B 3F                 9     .dw #_sys_ai_update_following 
   5ECB 16 1F                10     .dw #_pradoRedBird
   5ECD 00                   11     .db 0
   02E5                     153 DefineEntity 8,  0,    0, 154,  3,     30,    5,  10,     #_add_20_score,       #_bonus, 0 
   5ECE 08                    1     .db 8
   5ECF 00                    2     .db 0
   5ED0 00                    3     .db 0
   5ED1 9A                    4     .db 154
   5ED2 03                    5     .db 3
   5ED3 1E                    6     .db 30
   5ED4 05                    7     .db 5 
   5ED5 0A                    8     .db 10
   5ED6 1F 46                 9     .dw #_add_20_score 
   5ED8 D3 33                10     .dw #_bonus
   5EDA 00                   11     .db 0
                            154 
   02F2                     155 DefineEntity 4,  1,    2, 150,  3,     138,  4,  13, #_sys_ai_update_following,   #_pradoRedBird,      0   
   5EDB 04                    1     .db 4
   5EDC 01                    2     .db 1
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 103.
Hexadecimal [16-Bits]



   5EDD 02                    3     .db 2
   5EDE 96                    4     .db 150
   5EDF 03                    5     .db 3
   5EE0 8A                    6     .db 138
   5EE1 04                    7     .db 4 
   5EE2 0D                    8     .db 13
   5EE3 4B 3F                 9     .dw #_sys_ai_update_following 
   5EE5 16 1F                10     .dw #_pradoRedBird
   5EE7 00                   11     .db 0
   02FF                     156 DefineEntity 4,  0,    1, 120,  3,     160,  4,  5,              0,              #_pradoBird,      0  
   5EE8 04                    1     .db 4
   5EE9 00                    2     .db 0
   5EEA 01                    3     .db 1
   5EEB 78                    4     .db 120
   5EEC 03                    5     .db 3
   5EED A0                    6     .db 160
   5EEE 04                    7     .db 4 
   5EEF 05                    8     .db 5
   5EF0 00 00                 9     .dw 0 
   5EF2 4A 1F                10     .dw #_pradoBird
   5EF4 00                   11     .db 0
                            157 
                            158 
   030C                     159 DefineEntity 16, 0,    0, 114,   4,    0,  6,  56, 0, #_endMapa, 0  
   5EF5 10                    1     .db 16
   5EF6 00                    2     .db 0
   5EF7 00                    3     .db 0
   5EF8 72                    4     .db 114
   5EF9 04                    5     .db 4
   5EFA 00                    6     .db 0
   5EFB 06                    7     .db 6 
   5EFC 38                    8     .db 56
   5EFD 00 00                 9     .dw 0 
   5EFF 83 32                10     .dw #_endMapa
   5F01 00                   11     .db 0
   0319                     160 DefineEntity 16, 0,    0,   20,  4,    6,  1,  114,0, #_colisionFinal, 0
   5F02 10                    1     .db 16
   5F03 00                    2     .db 0
   5F04 00                    3     .db 0
   5F05 14                    4     .db 20
   5F06 04                    5     .db 4
   5F07 06                    6     .db 6
   5F08 01                    7     .db 1 
   5F09 72                    8     .db 114
   5F0A 00 00                 9     .dw 0 
   5F0C 11 32                10     .dw #_colisionFinal
   5F0E 00                   11     .db 0
                            161 
                            162 
                            163 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            164 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            165 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            166 
                            167 
                            168 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 104.
Hexadecimal [16-Bits]



                            169 ;; MAPA 4 - COMBINACION DE CONCEPTOS
                            170 ;;
                            171 ;; DURACION ESTIMADA: 20 s
                            172 ;;
   5F0F                     173 _mapa4::
                            174 ;;          TIPO COMP  X    Y  OFF_L  OFF_H  E_W  E_H  E_PREV           E_SPR                   E_AI_COUNTER
   0326                     175 DefineEntity 2,  0,    0, 120, 0,     70,    6,  16,     0,                 #_bloque_prado,  0
   5F0F 02                    1     .db 2
   5F10 00                    2     .db 0
   5F11 00                    3     .db 0
   5F12 78                    4     .db 120
   5F13 00                    5     .db 0
   5F14 46                    6     .db 70
   5F15 06                    7     .db 6 
   5F16 10                    8     .db 16
   5F17 00 00                 9     .dw 0 
   5F19 5E 1F                10     .dw #_bloque_prado
   5F1B 00                   11     .db 0
   0333                     176 DefineEntity 8,  0,    0, 110, 0,     71,    5,  10,     #_add_10_score,    #_bonus,            0
   5F1C 08                    1     .db 8
   5F1D 00                    2     .db 0
   5F1E 00                    3     .db 0
   5F1F 6E                    4     .db 110
   5F20 00                    5     .db 0
   5F21 47                    6     .db 71
   5F22 05                    7     .db 5 
   5F23 0A                    8     .db 10
   5F24 33 46                 9     .dw #_add_10_score 
   5F26 D3 33                10     .dw #_bonus
   5F28 00                   11     .db 0
   0340                     177 DefineEntity 2,  0,    0, 120, 0,     74,    6,  16,     0,                 #_bloque_prado,  0
   5F29 02                    1     .db 2
   5F2A 00                    2     .db 0
   5F2B 00                    3     .db 0
   5F2C 78                    4     .db 120
   5F2D 00                    5     .db 0
   5F2E 4A                    6     .db 74
   5F2F 06                    7     .db 6 
   5F30 10                    8     .db 16
   5F31 00 00                 9     .dw 0 
   5F33 5E 1F                10     .dw #_bloque_prado
   5F35 00                   11     .db 0
                            178 
   034D                     179 DefineEntity 4,  0,    0, 138,  0,    120,   6,  16*2,     0,               #_arbol2,          0  
   5F36 04                    1     .db 4
   5F37 00                    2     .db 0
   5F38 00                    3     .db 0
   5F39 8A                    4     .db 138
   5F3A 00                    5     .db 0
   5F3B 78                    6     .db 120
   5F3C 06                    7     .db 6 
   5F3D 20                    8     .db 16*2
   5F3E 00 00                 9     .dw 0 
   5F40 56 1E                10     .dw #_arbol2
   5F42 00                   11     .db 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 105.
Hexadecimal [16-Bits]



                            180 
   035A                     181 DefineEntity 4,  0,    0, 138,  0,    180,   6,  16*2,     0,                    #_arbol2,     0  
   5F43 04                    1     .db 4
   5F44 00                    2     .db 0
   5F45 00                    3     .db 0
   5F46 8A                    4     .db 138
   5F47 00                    5     .db 0
   5F48 B4                    6     .db 180
   5F49 06                    7     .db 6 
   5F4A 20                    8     .db 16*2
   5F4B 00 00                 9     .dw 0 
   5F4D 56 1E                10     .dw #_arbol2
   5F4F 00                   11     .db 0
                            182 
   0367                     183 DefineEntity 4,  0,    1, 154,  0,     220,  4,  5,             0,              #_pradoBird,      0  
   5F50 04                    1     .db 4
   5F51 00                    2     .db 0
   5F52 01                    3     .db 1
   5F53 9A                    4     .db 154
   5F54 00                    5     .db 0
   5F55 DC                    6     .db 220
   5F56 04                    7     .db 4 
   5F57 05                    8     .db 5
   5F58 00 00                 9     .dw 0 
   5F5A 4A 1F                10     .dw #_pradoBird
   5F5C 00                   11     .db 0
                            184 
                            185 
   0374                     186 DefineEntity 8,  0,    0, 154,  1,    25,   5,  10,      #_slow_game,           #_ralenPrado,    0   
   5F5D 08                    1     .db 8
   5F5E 00                    2     .db 0
   5F5F 00                    3     .db 0
   5F60 9A                    4     .db 154
   5F61 01                    5     .db 1
   5F62 19                    6     .db 25
   5F63 05                    7     .db 5 
   5F64 0A                    8     .db 10
   5F65 67 49                 9     .dw #_slow_game 
   5F67 84 1B                10     .dw #_ralenPrado
   5F69 00                   11     .db 0
   0381                     187 DefineEntity 2,  0,    0, 120, 1,     54,    6,  16,     0,                 #_bloque_prado,  0
   5F6A 02                    1     .db 2
   5F6B 00                    2     .db 0
   5F6C 00                    3     .db 0
   5F6D 78                    4     .db 120
   5F6E 01                    5     .db 1
   5F6F 36                    6     .db 54
   5F70 06                    7     .db 6 
   5F71 10                    8     .db 16
   5F72 00 00                 9     .dw 0 
   5F74 5E 1F                10     .dw #_bloque_prado
   5F76 00                   11     .db 0
   038E                     188 DefineEntity 2,  0,    0, 120, 1,     58,    6,  16,     0,                 #_bloque_prado,  0
   5F77 02                    1     .db 2
   5F78 00                    2     .db 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 106.
Hexadecimal [16-Bits]



   5F79 00                    3     .db 0
   5F7A 78                    4     .db 120
   5F7B 01                    5     .db 1
   5F7C 3A                    6     .db 58
   5F7D 06                    7     .db 6 
   5F7E 10                    8     .db 16
   5F7F 00 00                 9     .dw 0 
   5F81 5E 1F                10     .dw #_bloque_prado
   5F83 00                   11     .db 0
                            189 
   039B                     190 DefineEntity 4, 0,    0, 122,  1,    70,   6,  16*3,          0,              #_arbol3, 0  
   5F84 04                    1     .db 4
   5F85 00                    2     .db 0
   5F86 00                    3     .db 0
   5F87 7A                    4     .db 122
   5F88 01                    5     .db 1
   5F89 46                    6     .db 70
   5F8A 06                    7     .db 6 
   5F8B 30                    8     .db 16*3
   5F8C 00 00                 9     .dw 0 
   5F8E 36 1D                10     .dw #_arbol3
   5F90 00                   11     .db 0
                            191 
                            192 
   03A8                     193 DefineEntity 4,  0,    0, 122,  1,    140,   6,  16*3,     0,                    #_arbol3,     0  
   5F91 04                    1     .db 4
   5F92 00                    2     .db 0
   5F93 00                    3     .db 0
   5F94 7A                    4     .db 122
   5F95 01                    5     .db 1
   5F96 8C                    6     .db 140
   5F97 06                    7     .db 6 
   5F98 30                    8     .db 16*3
   5F99 00 00                 9     .dw 0 
   5F9B 36 1D                10     .dw #_arbol3
   5F9D 00                   11     .db 0
   03B5                     194 DefineEntity 2,  0,    0, 120, 1,     180,    6,  16,     0,                 #_bloque_prado,  0
   5F9E 02                    1     .db 2
   5F9F 00                    2     .db 0
   5FA0 00                    3     .db 0
   5FA1 78                    4     .db 120
   5FA2 01                    5     .db 1
   5FA3 B4                    6     .db 180
   5FA4 06                    7     .db 6 
   5FA5 10                    8     .db 16
   5FA6 00 00                 9     .dw 0 
   5FA8 5E 1F                10     .dw #_bloque_prado
   5FAA 00                   11     .db 0
   03C2                     195 DefineEntity 8,  0,    0, 110,  1,    182,    5,  10,     #_add_10_score,    #_bonus,            0
   5FAB 08                    1     .db 8
   5FAC 00                    2     .db 0
   5FAD 00                    3     .db 0
   5FAE 6E                    4     .db 110
   5FAF 01                    5     .db 1
   5FB0 B6                    6     .db 182
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 107.
Hexadecimal [16-Bits]



   5FB1 05                    7     .db 5 
   5FB2 0A                    8     .db 10
   5FB3 33 46                 9     .dw #_add_10_score 
   5FB5 D3 33                10     .dw #_bonus
   5FB7 00                   11     .db 0
   03CF                     196 DefineEntity 2,  0,    0, 120, 1,     184,    6,  16,     0,                 #_bloque_prado,  0
   5FB8 02                    1     .db 2
   5FB9 00                    2     .db 0
   5FBA 00                    3     .db 0
   5FBB 78                    4     .db 120
   5FBC 01                    5     .db 1
   5FBD B8                    6     .db 184
   5FBE 06                    7     .db 6 
   5FBF 10                    8     .db 16
   5FC0 00 00                 9     .dw 0 
   5FC2 5E 1F                10     .dw #_bloque_prado
   5FC4 00                   11     .db 0
                            197 
   03DC                     198 DefineEntity 4,  1,    2, 140,  1,    210,   4,  13, #_sys_ai_update_top_down,   #_pradoRedBird,      0   
   5FC5 04                    1     .db 4
   5FC6 01                    2     .db 1
   5FC7 02                    3     .db 2
   5FC8 8C                    4     .db 140
   5FC9 01                    5     .db 1
   5FCA D2                    6     .db 210
   5FCB 04                    7     .db 4 
   5FCC 0D                    8     .db 13
   5FCD 9D 3F                 9     .dw #_sys_ai_update_top_down 
   5FCF 16 1F                10     .dw #_pradoRedBird
   5FD1 00                   11     .db 0
   03E9                     199 DefineEntity 4,  0,    0, 138,  1,    230,   6,  16*2,          0,              #_arbol2, 0  
   5FD2 04                    1     .db 4
   5FD3 00                    2     .db 0
   5FD4 00                    3     .db 0
   5FD5 8A                    4     .db 138
   5FD6 01                    5     .db 1
   5FD7 E6                    6     .db 230
   5FD8 06                    7     .db 6 
   5FD9 20                    8     .db 16*2
   5FDA 00 00                 9     .dw 0 
   5FDC 56 1E                10     .dw #_arbol2
   5FDE 00                   11     .db 0
                            200 
   03F6                     201 DefineEntity 8,  0,    0, 154,  2,    20,    5,  10,     #_add_10_score,    #_bonus,            0
   5FDF 08                    1     .db 8
   5FE0 00                    2     .db 0
   5FE1 00                    3     .db 0
   5FE2 9A                    4     .db 154
   5FE3 02                    5     .db 2
   5FE4 14                    6     .db 20
   5FE5 05                    7     .db 5 
   5FE6 0A                    8     .db 10
   5FE7 33 46                 9     .dw #_add_10_score 
   5FE9 D3 33                10     .dw #_bonus
   5FEB 00                   11     .db 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 108.
Hexadecimal [16-Bits]



   0403                     202 DefineEntity 4,  0,    0, 138,  2,    30,   6,  16*2,          0,              #_arbol2, 0  
   5FEC 04                    1     .db 4
   5FED 00                    2     .db 0
   5FEE 00                    3     .db 0
   5FEF 8A                    4     .db 138
   5FF0 02                    5     .db 2
   5FF1 1E                    6     .db 30
   5FF2 06                    7     .db 6 
   5FF3 20                    8     .db 16*2
   5FF4 00 00                 9     .dw 0 
   5FF6 56 1E                10     .dw #_arbol2
   5FF8 00                   11     .db 0
   0410                     203 DefineEntity 8,  0,    0, 154,  2,    40,    5,  10,     #_add_10_score,    #_bonus,            0
   5FF9 08                    1     .db 8
   5FFA 00                    2     .db 0
   5FFB 00                    3     .db 0
   5FFC 9A                    4     .db 154
   5FFD 02                    5     .db 2
   5FFE 28                    6     .db 40
   5FFF 05                    7     .db 5 
   6000 0A                    8     .db 10
   6001 33 46                 9     .dw #_add_10_score 
   6003 D3 33                10     .dw #_bonus
   6005 00                   11     .db 0
   041D                     204 DefineEntity 4,  0,    0, 138,  2,    50,   6,  16*2,          0,              #_arbol2, 0  
   6006 04                    1     .db 4
   6007 00                    2     .db 0
   6008 00                    3     .db 0
   6009 8A                    4     .db 138
   600A 02                    5     .db 2
   600B 32                    6     .db 50
   600C 06                    7     .db 6 
   600D 20                    8     .db 16*2
   600E 00 00                 9     .dw 0 
   6010 56 1E                10     .dw #_arbol2
   6012 00                   11     .db 0
                            205 
                            206 
   042A                     207 DefineEntity 2,  0,    0, 120,  2,     110,    6,  16,     0,                 #_bloque_prado,  0
   6013 02                    1     .db 2
   6014 00                    2     .db 0
   6015 00                    3     .db 0
   6016 78                    4     .db 120
   6017 02                    5     .db 2
   6018 6E                    6     .db 110
   6019 06                    7     .db 6 
   601A 10                    8     .db 16
   601B 00 00                 9     .dw 0 
   601D 5E 1F                10     .dw #_bloque_prado
   601F 00                   11     .db 0
   0437                     208 DefineEntity 8,  0,    0, 110,  2,     111,    5,  10,     #_add_10_score,    #_bonus,            0
   6020 08                    1     .db 8
   6021 00                    2     .db 0
   6022 00                    3     .db 0
   6023 6E                    4     .db 110
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 109.
Hexadecimal [16-Bits]



   6024 02                    5     .db 2
   6025 6F                    6     .db 111
   6026 05                    7     .db 5 
   6027 0A                    8     .db 10
   6028 33 46                 9     .dw #_add_10_score 
   602A D3 33                10     .dw #_bonus
   602C 00                   11     .db 0
   0444                     209 DefineEntity 2,  0,    0, 120,  2,     114,    6,  16,     0,                 #_bloque_prado,  0
   602D 02                    1     .db 2
   602E 00                    2     .db 0
   602F 00                    3     .db 0
   6030 78                    4     .db 120
   6031 02                    5     .db 2
   6032 72                    6     .db 114
   6033 06                    7     .db 6 
   6034 10                    8     .db 16
   6035 00 00                 9     .dw 0 
   6037 5E 1F                10     .dw #_bloque_prado
   6039 00                   11     .db 0
                            210 
                            211 
   0451                     212 DefineEntity 16, 0,    0, 114,   3,    0,  6,  56, 0, #_endMapa, 0  
   603A 10                    1     .db 16
   603B 00                    2     .db 0
   603C 00                    3     .db 0
   603D 72                    4     .db 114
   603E 03                    5     .db 3
   603F 00                    6     .db 0
   6040 06                    7     .db 6 
   6041 38                    8     .db 56
   6042 00 00                 9     .dw 0 
   6044 83 32                10     .dw #_endMapa
   6046 00                   11     .db 0
   045E                     213 DefineEntity 16, 0,    0,   20,  3,    6,  1,  114,0, #_colisionFinal, 0
   6047 10                    1     .db 16
   6048 00                    2     .db 0
   6049 00                    3     .db 0
   604A 14                    4     .db 20
   604B 03                    5     .db 3
   604C 06                    6     .db 6
   604D 01                    7     .db 1 
   604E 72                    8     .db 114
   604F 00 00                 9     .dw 0 
   6051 11 32                10     .dw #_colisionFinal
   6053 00                   11     .db 0
                            214 
                            215 
                            216 
                            217 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            218 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            219 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            220 
                            221 
                            222 
                            223 ;;////////////////////////////////////////////////////////////////////////////////////
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 110.
Hexadecimal [16-Bits]



                            224 ;; MAPA 5: 
                            225 ;;      mapa simple, solo enemigos suelo. Ppio muy separados y conforme avanza se juntan más 
                            226 ;;///////////////////////////////////////////////////////////////////////////////////
   6054                     227 _mapa5::
                            228 ;;          TIPO COMP  X    Y  OFF_L  OFF_H  E_W  E_H  E_PREV  E_SPR             E_AI_COUNTER
   046B                     229 DefineEntity 4,  0,    0, 138,  0,    80,      6,  16*2,     0,    #_cactus2, 0  
   6054 04                    1     .db 4
   6055 00                    2     .db 0
   6056 00                    3     .db 0
   6057 8A                    4     .db 138
   6058 00                    5     .db 0
   6059 50                    6     .db 80
   605A 06                    7     .db 6 
   605B 20                    8     .db 16*2
   605C 00 00                 9     .dw 0 
   605E 1C 1A                10     .dw #_cactus2
   6060 00                   11     .db 0
   0478                     230 DefineEntity 4,  0,    0, 138,  0,    160,     6,  16*2,     0,    #_cactus2, 0  
   6061 04                    1     .db 4
   6062 00                    2     .db 0
   6063 00                    3     .db 0
   6064 8A                    4     .db 138
   6065 00                    5     .db 0
   6066 A0                    6     .db 160
   6067 06                    7     .db 6 
   6068 20                    8     .db 16*2
   6069 00 00                 9     .dw 0 
   606B 1C 1A                10     .dw #_cactus2
   606D 00                   11     .db 0
   0485                     231 DefineEntity 4,  0,    0, 138,  0,    240,     6,  16*2,     0,    #_cactus2, 0  
   606E 04                    1     .db 4
   606F 00                    2     .db 0
   6070 00                    3     .db 0
   6071 8A                    4     .db 138
   6072 00                    5     .db 0
   6073 F0                    6     .db 240
   6074 06                    7     .db 6 
   6075 20                    8     .db 16*2
   6076 00 00                 9     .dw 0 
   6078 1C 1A                10     .dw #_cactus2
   607A 00                   11     .db 0
   0492                     232 DefineEntity 4,  0,    0, 138,  1,    20,      6,  16*2,     0,    #_cactus2, 0  
   607B 04                    1     .db 4
   607C 00                    2     .db 0
   607D 00                    3     .db 0
   607E 8A                    4     .db 138
   607F 01                    5     .db 1
   6080 14                    6     .db 20
   6081 06                    7     .db 6 
   6082 20                    8     .db 16*2
   6083 00 00                 9     .dw 0 
   6085 1C 1A                10     .dw #_cactus2
   6087 00                   11     .db 0
   049F                     233 DefineEntity 4,  0,    0, 122,  1,    60,      6,  16*3,     0,    #_cactus3, 0
   6088 04                    1     .db 4
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 111.
Hexadecimal [16-Bits]



   6089 00                    2     .db 0
   608A 00                    3     .db 0
   608B 7A                    4     .db 122
   608C 01                    5     .db 1
   608D 3C                    6     .db 60
   608E 06                    7     .db 6 
   608F 30                    8     .db 16*3
   6090 00 00                 9     .dw 0 
   6092 FC 18                10     .dw #_cactus3
   6094 00                   11     .db 0
   04AC                     234 DefineEntity 4,  0,    0, 138,  1,    100,     6,  16*2,     0,    #_cactus2, 0  
   6095 04                    1     .db 4
   6096 00                    2     .db 0
   6097 00                    3     .db 0
   6098 8A                    4     .db 138
   6099 01                    5     .db 1
   609A 64                    6     .db 100
   609B 06                    7     .db 6 
   609C 20                    8     .db 16*2
   609D 00 00                 9     .dw 0 
   609F 1C 1A                10     .dw #_cactus2
   60A1 00                   11     .db 0
   04B9                     235 DefineEntity 4,  0,    0, 106,  1,    190,     6,  16*4,     0,    #_cactus4, 0
   60A2 04                    1     .db 4
   60A3 00                    2     .db 0
   60A4 00                    3     .db 0
   60A5 6A                    4     .db 106
   60A6 01                    5     .db 1
   60A7 BE                    6     .db 190
   60A8 06                    7     .db 6 
   60A9 40                    8     .db 16*4
   60AA 00 00                 9     .dw 0 
   60AC 7C 17                10     .dw #_cactus4
   60AE 00                   11     .db 0
                            236 ;; TODO BIEN HASTA AQUI
                            237 
   04C6                     238 DefineEntity 2,  0,    0, 120, 2,     2,    6,  16,     0,    #_bloque_desierto, 0
   60AF 02                    1     .db 2
   60B0 00                    2     .db 0
   60B1 00                    3     .db 0
   60B2 78                    4     .db 120
   60B3 02                    5     .db 2
   60B4 02                    6     .db 2
   60B5 06                    7     .db 6 
   60B6 10                    8     .db 16
   60B7 00 00                 9     .dw 0 
   60B9 24 1B                10     .dw #_bloque_desierto
   60BB 00                   11     .db 0
   04D3                     239 DefineEntity 2,  0,    0, 120, 2,     6,    6,  16,     0,    #_bloque_desierto, 0
   60BC 02                    1     .db 2
   60BD 00                    2     .db 0
   60BE 00                    3     .db 0
   60BF 78                    4     .db 120
   60C0 02                    5     .db 2
   60C1 06                    6     .db 6
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 112.
Hexadecimal [16-Bits]



   60C2 06                    7     .db 6 
   60C3 10                    8     .db 16
   60C4 00 00                 9     .dw 0 
   60C6 24 1B                10     .dw #_bloque_desierto
   60C8 00                   11     .db 0
                            240 
                            241 
   04E0                     242 DefineEntity 2,  0,    0, 85, 2,     30,    6,  16,     0,    #_bloque_desierto, 0
   60C9 02                    1     .db 2
   60CA 00                    2     .db 0
   60CB 00                    3     .db 0
   60CC 55                    4     .db 85
   60CD 02                    5     .db 2
   60CE 1E                    6     .db 30
   60CF 06                    7     .db 6 
   60D0 10                    8     .db 16
   60D1 00 00                 9     .dw 0 
   60D3 24 1B                10     .dw #_bloque_desierto
   60D5 00                   11     .db 0
   04ED                     243 DefineEntity 8,  0,    0, 75, 2,     34,    5,  10,     #_add_10_score,    #_bonus, 0 
   60D6 08                    1     .db 8
   60D7 00                    2     .db 0
   60D8 00                    3     .db 0
   60D9 4B                    4     .db 75
   60DA 02                    5     .db 2
   60DB 22                    6     .db 34
   60DC 05                    7     .db 5 
   60DD 0A                    8     .db 10
   60DE 33 46                 9     .dw #_add_10_score 
   60E0 D3 33                10     .dw #_bonus
   60E2 00                   11     .db 0
   04FA                     244 DefineEntity 2,  0,    0, 85, 2,     34,    6,  16,     0,    #_bloque_desierto, 0
   60E3 02                    1     .db 2
   60E4 00                    2     .db 0
   60E5 00                    3     .db 0
   60E6 55                    4     .db 85
   60E7 02                    5     .db 2
   60E8 22                    6     .db 34
   60E9 06                    7     .db 6 
   60EA 10                    8     .db 16
   60EB 00 00                 9     .dw 0 
   60ED 24 1B                10     .dw #_bloque_desierto
   60EF 00                   11     .db 0
                            245 
                            246 ;DefineEntity 4,  0,    1, 154,  2,     36,  4,  5,             0,              #_desiertoBird,      0  
                            247 
   0507                     248 DefineEntity 2,  0,    0, 120, 2,     44,    6,  16,     0,    #_bloque_desierto, 0
   60F0 02                    1     .db 2
   60F1 00                    2     .db 0
   60F2 00                    3     .db 0
   60F3 78                    4     .db 120
   60F4 02                    5     .db 2
   60F5 2C                    6     .db 44
   60F6 06                    7     .db 6 
   60F7 10                    8     .db 16
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 113.
Hexadecimal [16-Bits]



   60F8 00 00                 9     .dw 0 
   60FA 24 1B                10     .dw #_bloque_desierto
   60FC 00                   11     .db 0
                            249 
                            250 
                            251 
                            252 
   0514                     253 DefineEntity 4,  0,    0, 138,  2,    80,     6,  16*2,     0,    #_cactus2, 0  
   60FD 04                    1     .db 4
   60FE 00                    2     .db 0
   60FF 00                    3     .db 0
   6100 8A                    4     .db 138
   6101 02                    5     .db 2
   6102 50                    6     .db 80
   6103 06                    7     .db 6 
   6104 20                    8     .db 16*2
   6105 00 00                 9     .dw 0 
   6107 1C 1A                10     .dw #_cactus2
   6109 00                   11     .db 0
   0521                     254 DefineEntity 4,  0,    0, 138,  2,    110,    6,  16*2,     0,    #_cactus2, 0
   610A 04                    1     .db 4
   610B 00                    2     .db 0
   610C 00                    3     .db 0
   610D 8A                    4     .db 138
   610E 02                    5     .db 2
   610F 6E                    6     .db 110
   6110 06                    7     .db 6 
   6111 20                    8     .db 16*2
   6112 00 00                 9     .dw 0 
   6114 1C 1A                10     .dw #_cactus2
   6116 00                   11     .db 0
   052E                     255 DefineEntity 8,  0,    0, 154,  2,    125,    5,  10,     #_add_10_score,    #_bonus, 0
   6117 08                    1     .db 8
   6118 00                    2     .db 0
   6119 00                    3     .db 0
   611A 9A                    4     .db 154
   611B 02                    5     .db 2
   611C 7D                    6     .db 125
   611D 05                    7     .db 5 
   611E 0A                    8     .db 10
   611F 33 46                 9     .dw #_add_10_score 
   6121 D3 33                10     .dw #_bonus
   6123 00                   11     .db 0
   053B                     256 DefineEntity 4,  0,    0, 138,  2,    140,    6,  16*2,     0,    #_cactus2, 0
   6124 04                    1     .db 4
   6125 00                    2     .db 0
   6126 00                    3     .db 0
   6127 8A                    4     .db 138
   6128 02                    5     .db 2
   6129 8C                    6     .db 140
   612A 06                    7     .db 6 
   612B 20                    8     .db 16*2
   612C 00 00                 9     .dw 0 
   612E 1C 1A                10     .dw #_cactus2
   6130 00                   11     .db 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 114.
Hexadecimal [16-Bits]



   0548                     257 DefineEntity 4,  0,    0, 138,  2,    180,    6,  16*2,     0,    #_cactus2, 0
   6131 04                    1     .db 4
   6132 00                    2     .db 0
   6133 00                    3     .db 0
   6134 8A                    4     .db 138
   6135 02                    5     .db 2
   6136 B4                    6     .db 180
   6137 06                    7     .db 6 
   6138 20                    8     .db 16*2
   6139 00 00                 9     .dw 0 
   613B 1C 1A                10     .dw #_cactus2
   613D 00                   11     .db 0
                            258 
                            259 
   0555                     260 DefineEntity 4,  0,    0, 138,  2,    230,    6,  16*2,     0,    #_cactus2, 0  
   613E 04                    1     .db 4
   613F 00                    2     .db 0
   6140 00                    3     .db 0
   6141 8A                    4     .db 138
   6142 02                    5     .db 2
   6143 E6                    6     .db 230
   6144 06                    7     .db 6 
   6145 20                    8     .db 16*2
   6146 00 00                 9     .dw 0 
   6148 1C 1A                10     .dw #_cactus2
   614A 00                   11     .db 0
   0562                     261 DefineEntity 4,  0,    0, 138,  2,    240,    6,  16*2,     0,    #_cactus2, 0
   614B 04                    1     .db 4
   614C 00                    2     .db 0
   614D 00                    3     .db 0
   614E 8A                    4     .db 138
   614F 02                    5     .db 2
   6150 F0                    6     .db 240
   6151 06                    7     .db 6 
   6152 20                    8     .db 16*2
   6153 00 00                 9     .dw 0 
   6155 1C 1A                10     .dw #_cactus2
   6157 00                   11     .db 0
                            262 
   056F                     263 DefineEntity 4,  0,    0, 138,  3,    30,    6,  16*2,     0,    #_cactus2, 0
   6158 04                    1     .db 4
   6159 00                    2     .db 0
   615A 00                    3     .db 0
   615B 8A                    4     .db 138
   615C 03                    5     .db 3
   615D 1E                    6     .db 30
   615E 06                    7     .db 6 
   615F 20                    8     .db 16*2
   6160 00 00                 9     .dw 0 
   6162 1C 1A                10     .dw #_cactus2
   6164 00                   11     .db 0
   057C                     264 DefineEntity 4,  0,    0, 122,  3,    50,    6,  16*3,     0,    #_cactus3, 0
   6165 04                    1     .db 4
   6166 00                    2     .db 0
   6167 00                    3     .db 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 115.
Hexadecimal [16-Bits]



   6168 7A                    4     .db 122
   6169 03                    5     .db 3
   616A 32                    6     .db 50
   616B 06                    7     .db 6 
   616C 30                    8     .db 16*3
   616D 00 00                 9     .dw 0 
   616F FC 18                10     .dw #_cactus3
   6171 00                   11     .db 0
   0589                     265 DefineEntity 4,  0,    0, 138,  3,    80,    6,  16*2,     0,    #_cactus2, 0
   6172 04                    1     .db 4
   6173 00                    2     .db 0
   6174 00                    3     .db 0
   6175 8A                    4     .db 138
   6176 03                    5     .db 3
   6177 50                    6     .db 80
   6178 06                    7     .db 6 
   6179 20                    8     .db 16*2
   617A 00 00                 9     .dw 0 
   617C 1C 1A                10     .dw #_cactus2
   617E 00                   11     .db 0
                            266 
                            267 
                            268 
   0596                     269 DefineEntity 8,  0,    0, 154,  3,    110,    5,  10,     #_add_20_score,    #_bonus, 0 ;;add_20_score explota
   617F 08                    1     .db 8
   6180 00                    2     .db 0
   6181 00                    3     .db 0
   6182 9A                    4     .db 154
   6183 03                    5     .db 3
   6184 6E                    6     .db 110
   6185 05                    7     .db 5 
   6186 0A                    8     .db 10
   6187 1F 46                 9     .dw #_add_20_score 
   6189 D3 33                10     .dw #_bonus
   618B 00                   11     .db 0
   05A3                     270 DefineEntity 4,  0,    0, 138,  3,    120,    6,  16*2,     0,    #_cactus2, 0
   618C 04                    1     .db 4
   618D 00                    2     .db 0
   618E 00                    3     .db 0
   618F 8A                    4     .db 138
   6190 03                    5     .db 3
   6191 78                    6     .db 120
   6192 06                    7     .db 6 
   6193 20                    8     .db 16*2
   6194 00 00                 9     .dw 0 
   6196 1C 1A                10     .dw #_cactus2
   6198 00                   11     .db 0
   05B0                     271 DefineEntity 8,  0,    0, 154,  3,    135,    5,  10,     #_add_10_score,    #_bonus, 0
   6199 08                    1     .db 8
   619A 00                    2     .db 0
   619B 00                    3     .db 0
   619C 9A                    4     .db 154
   619D 03                    5     .db 3
   619E 87                    6     .db 135
   619F 05                    7     .db 5 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 116.
Hexadecimal [16-Bits]



   61A0 0A                    8     .db 10
   61A1 33 46                 9     .dw #_add_10_score 
   61A3 D3 33                10     .dw #_bonus
   61A5 00                   11     .db 0
   05BD                     272 DefineEntity 4,  0,    0, 138,  3,    150,    6,  16*2,     0,    #_cactus2, 0
   61A6 04                    1     .db 4
   61A7 00                    2     .db 0
   61A8 00                    3     .db 0
   61A9 8A                    4     .db 138
   61AA 03                    5     .db 3
   61AB 96                    6     .db 150
   61AC 06                    7     .db 6 
   61AD 20                    8     .db 16*2
   61AE 00 00                 9     .dw 0 
   61B0 1C 1A                10     .dw #_cactus2
   61B2 00                   11     .db 0
   05CA                     273 DefineEntity 8,  0,    0, 154,  3,    165,    5,  10,     #_add_10_score,    #_bonus, 0
   61B3 08                    1     .db 8
   61B4 00                    2     .db 0
   61B5 00                    3     .db 0
   61B6 9A                    4     .db 154
   61B7 03                    5     .db 3
   61B8 A5                    6     .db 165
   61B9 05                    7     .db 5 
   61BA 0A                    8     .db 10
   61BB 33 46                 9     .dw #_add_10_score 
   61BD D3 33                10     .dw #_bonus
   61BF 00                   11     .db 0
   05D7                     274 DefineEntity 4,  0,    0, 106,  3,    180,    6,  16*4,     0,    #_cactus4, 0
   61C0 04                    1     .db 4
   61C1 00                    2     .db 0
   61C2 00                    3     .db 0
   61C3 6A                    4     .db 106
   61C4 03                    5     .db 3
   61C5 B4                    6     .db 180
   61C6 06                    7     .db 6 
   61C7 40                    8     .db 16*4
   61C8 00 00                 9     .dw 0 
   61CA 7C 17                10     .dw #_cactus4
   61CC 00                   11     .db 0
   05E4                     275 DefineEntity 4,  0,    0, 138,  3,    220,    6,  16*2,     0,    #_cactus2, 0
   61CD 04                    1     .db 4
   61CE 00                    2     .db 0
   61CF 00                    3     .db 0
   61D0 8A                    4     .db 138
   61D1 03                    5     .db 3
   61D2 DC                    6     .db 220
   61D3 06                    7     .db 6 
   61D4 20                    8     .db 16*2
   61D5 00 00                 9     .dw 0 
   61D7 1C 1A                10     .dw #_cactus2
   61D9 00                   11     .db 0
   05F1                     276 DefineEntity 4,  0,    0, 138,  3,    240,    6,  16*2,     0,    #_cactus2, 0
   61DA 04                    1     .db 4
   61DB 00                    2     .db 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 117.
Hexadecimal [16-Bits]



   61DC 00                    3     .db 0
   61DD 8A                    4     .db 138
   61DE 03                    5     .db 3
   61DF F0                    6     .db 240
   61E0 06                    7     .db 6 
   61E1 20                    8     .db 16*2
   61E2 00 00                 9     .dw 0 
   61E4 1C 1A                10     .dw #_cactus2
   61E6 00                   11     .db 0
                            277 
                            278 
   05FE                     279 DefineEntity 16, 0,    0, 114,   4,    0,  6,  56, 0, #_endMapa, 0  
   61E7 10                    1     .db 16
   61E8 00                    2     .db 0
   61E9 00                    3     .db 0
   61EA 72                    4     .db 114
   61EB 04                    5     .db 4
   61EC 00                    6     .db 0
   61ED 06                    7     .db 6 
   61EE 38                    8     .db 56
   61EF 00 00                 9     .dw 0 
   61F1 83 32                10     .dw #_endMapa
   61F3 00                   11     .db 0
   060B                     280 DefineEntity 16, 0,    0,   20,  4,    6,  1,  114,0, #_colisionFinal, 0
   61F4 10                    1     .db 16
   61F5 00                    2     .db 0
   61F6 00                    3     .db 0
   61F7 14                    4     .db 20
   61F8 04                    5     .db 4
   61F9 06                    6     .db 6
   61FA 01                    7     .db 1 
   61FB 72                    8     .db 114
   61FC 00 00                 9     .dw 0 
   61FE 11 32                10     .dw #_colisionFinal
   6200 00                   11     .db 0
                            281 
                            282 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            283 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            284 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            285 
                            286 ;;////////////////////////////////////////
                            287 ;; MAPA 6: 
                            288 ;;      mapa con plataformas a distintos niveles 
                            289 ;;///////////////////////////////////////
   6201                     290 _mapa6::
                            291 ;;          TIPO COMP  X    Y  OFF_L  OFF_H  E_W  E_H  E_PREV  E_SPR             E_AI_COUNTER
   0618                     292 DefineEntity 2,  0,    0, 120, 0,     64,    6,  16,     0,    #_bloque_desierto, 0
   6201 02                    1     .db 2
   6202 00                    2     .db 0
   6203 00                    3     .db 0
   6204 78                    4     .db 120
   6205 00                    5     .db 0
   6206 40                    6     .db 64
   6207 06                    7     .db 6 
   6208 10                    8     .db 16
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 118.
Hexadecimal [16-Bits]



   6209 00 00                 9     .dw 0 
   620B 24 1B                10     .dw #_bloque_desierto
   620D 00                   11     .db 0
   0625                     293 DefineEntity 2,  0,    0, 120, 0,     68,    6,  16,     0,    #_bloque_desierto, 0
   620E 02                    1     .db 2
   620F 00                    2     .db 0
   6210 00                    3     .db 0
   6211 78                    4     .db 120
   6212 00                    5     .db 0
   6213 44                    6     .db 68
   6214 06                    7     .db 6 
   6215 10                    8     .db 16
   6216 00 00                 9     .dw 0 
   6218 24 1B                10     .dw #_bloque_desierto
   621A 00                   11     .db 0
                            294 
                            295 
   0632                     296 DefineEntity 8,  0,    0, 50,  0,     124,    5,  10,     #_add_10_score,    #_bonus, 0 
   621B 08                    1     .db 8
   621C 00                    2     .db 0
   621D 00                    3     .db 0
   621E 32                    4     .db 50
   621F 00                    5     .db 0
   6220 7C                    6     .db 124
   6221 05                    7     .db 5 
   6222 0A                    8     .db 10
   6223 33 46                 9     .dw #_add_10_score 
   6225 D3 33                10     .dw #_bonus
   6227 00                   11     .db 0
   063F                     297 DefineEntity 2,  0,    0, 60, 0,     124,    6,  16,     0,    #_bloque_desierto, 0
   6228 02                    1     .db 2
   6229 00                    2     .db 0
   622A 00                    3     .db 0
   622B 3C                    4     .db 60
   622C 00                    5     .db 0
   622D 7C                    6     .db 124
   622E 06                    7     .db 6 
   622F 10                    8     .db 16
   6230 00 00                 9     .dw 0 
   6232 24 1B                10     .dw #_bloque_desierto
   6234 00                   11     .db 0
                            298 
   064C                     299 DefineEntity 4,  1,    1, 150, 0,     170,  4,  13, #_sys_ai_update_following,  #_desiertoIABird,      0   
   6235 04                    1     .db 4
   6236 01                    2     .db 1
   6237 01                    3     .db 1
   6238 96                    4     .db 150
   6239 00                    5     .db 0
   623A AA                    6     .db 170
   623B 04                    7     .db 4 
   623C 0D                    8     .db 13
   623D 4B 3F                 9     .dw #_sys_ai_update_following 
   623F DC 1A                10     .dw #_desiertoIABird
   6241 00                   11     .db 0
                            300 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 119.
Hexadecimal [16-Bits]



   0659                     301 DefineEntity 2,  0,    0, 100, 0,     190,    6,  16,     0,    #_bloque_desierto, 0
   6242 02                    1     .db 2
   6243 00                    2     .db 0
   6244 00                    3     .db 0
   6245 64                    4     .db 100
   6246 00                    5     .db 0
   6247 BE                    6     .db 190
   6248 06                    7     .db 6 
   6249 10                    8     .db 16
   624A 00 00                 9     .dw 0 
   624C 24 1B                10     .dw #_bloque_desierto
   624E 00                   11     .db 0
   0666                     302 DefineEntity 8,  0,    0, 154,  0,     194,    5,  10,     #_add_20_score,    #_bonus, 0 
   624F 08                    1     .db 8
   6250 00                    2     .db 0
   6251 00                    3     .db 0
   6252 9A                    4     .db 154
   6253 00                    5     .db 0
   6254 C2                    6     .db 194
   6255 05                    7     .db 5 
   6256 0A                    8     .db 10
   6257 1F 46                 9     .dw #_add_20_score 
   6259 D3 33                10     .dw #_bonus
   625B 00                   11     .db 0
                            303 
   0673                     304 DefineEntity 4,  0,    0, 138, 0,     250,    6,  16*2,     0,    #_cactus2, 0  
   625C 04                    1     .db 4
   625D 00                    2     .db 0
   625E 00                    3     .db 0
   625F 8A                    4     .db 138
   6260 00                    5     .db 0
   6261 FA                    6     .db 250
   6262 06                    7     .db 6 
   6263 20                    8     .db 16*2
   6264 00 00                 9     .dw 0 
   6266 1C 1A                10     .dw #_cactus2
   6268 00                   11     .db 0
   0680                     305 DefineEntity 8,  0,    0, 160, 1,     20,    5,  10,     #_add_10_score,    #_bonus, 0 
   6269 08                    1     .db 8
   626A 00                    2     .db 0
   626B 00                    3     .db 0
   626C A0                    4     .db 160
   626D 01                    5     .db 1
   626E 14                    6     .db 20
   626F 05                    7     .db 5 
   6270 0A                    8     .db 10
   6271 33 46                 9     .dw #_add_10_score 
   6273 D3 33                10     .dw #_bonus
   6275 00                   11     .db 0
   068D                     306 DefineEntity 4,  0,    0, 138, 1,     35,    6,  16*2,     0,    #_cactus2, 0  
   6276 04                    1     .db 4
   6277 00                    2     .db 0
   6278 00                    3     .db 0
   6279 8A                    4     .db 138
   627A 01                    5     .db 1
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 120.
Hexadecimal [16-Bits]



   627B 23                    6     .db 35
   627C 06                    7     .db 6 
   627D 20                    8     .db 16*2
   627E 00 00                 9     .dw 0 
   6280 1C 1A                10     .dw #_cactus2
   6282 00                   11     .db 0
                            307 
   069A                     308 DefineEntity 4,  0,    1, 154, 1,     80,  4,  5,             0,              #_desiertoBird,      0  
   6283 04                    1     .db 4
   6284 00                    2     .db 0
   6285 01                    3     .db 1
   6286 9A                    4     .db 154
   6287 01                    5     .db 1
   6288 50                    6     .db 80
   6289 04                    7     .db 4 
   628A 05                    8     .db 5
   628B 00 00                 9     .dw 0 
   628D 10 1B                10     .dw #_desiertoBird
   628F 00                   11     .db 0
   06A7                     309 DefineEntity 4,  0,    1, 154, 1,     100,  4,  5,             0,              #_desiertoBird,      0  
   6290 04                    1     .db 4
   6291 00                    2     .db 0
   6292 01                    3     .db 1
   6293 9A                    4     .db 154
   6294 01                    5     .db 1
   6295 64                    6     .db 100
   6296 04                    7     .db 4 
   6297 05                    8     .db 5
   6298 00 00                 9     .dw 0 
   629A 10 1B                10     .dw #_desiertoBird
   629C 00                   11     .db 0
   06B4                     310 DefineEntity 4,  0,    1, 154, 1,     120,  4,  5,             0,              #_desiertoBird,      0  
   629D 04                    1     .db 4
   629E 00                    2     .db 0
   629F 01                    3     .db 1
   62A0 9A                    4     .db 154
   62A1 01                    5     .db 1
   62A2 78                    6     .db 120
   62A3 04                    7     .db 4 
   62A4 05                    8     .db 5
   62A5 00 00                 9     .dw 0 
   62A7 10 1B                10     .dw #_desiertoBird
   62A9 00                   11     .db 0
   06C1                     311 DefineEntity 4,  0,    1, 154, 1,     140,  4,  5,             0,              #_desiertoBird,      0  
   62AA 04                    1     .db 4
   62AB 00                    2     .db 0
   62AC 01                    3     .db 1
   62AD 9A                    4     .db 154
   62AE 01                    5     .db 1
   62AF 8C                    6     .db 140
   62B0 04                    7     .db 4 
   62B1 05                    8     .db 5
   62B2 00 00                 9     .dw 0 
   62B4 10 1B                10     .dw #_desiertoBird
   62B6 00                   11     .db 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 121.
Hexadecimal [16-Bits]



                            312 
   06CE                     313 DefineEntity 2,  0,    0, 120, 1,     170,    6,  16,     0,    #_bloque_desierto, 0
   62B7 02                    1     .db 2
   62B8 00                    2     .db 0
   62B9 00                    3     .db 0
   62BA 78                    4     .db 120
   62BB 01                    5     .db 1
   62BC AA                    6     .db 170
   62BD 06                    7     .db 6 
   62BE 10                    8     .db 16
   62BF 00 00                 9     .dw 0 
   62C1 24 1B                10     .dw #_bloque_desierto
   62C3 00                   11     .db 0
   06DB                     314 DefineEntity 2,  0,    0, 80, 1,     200,    6,  16,     0,    #_bloque_desierto, 0
   62C4 02                    1     .db 2
   62C5 00                    2     .db 0
   62C6 00                    3     .db 0
   62C7 50                    4     .db 80
   62C8 01                    5     .db 1
   62C9 C8                    6     .db 200
   62CA 06                    7     .db 6 
   62CB 10                    8     .db 16
   62CC 00 00                 9     .dw 0 
   62CE 24 1B                10     .dw #_bloque_desierto
   62D0 00                   11     .db 0
   06E8                     315 DefineEntity 8,  0,    0, 30,  1,     230,    5,  10,     #_add_20_score,    #_bonus, 0 
   62D1 08                    1     .db 8
   62D2 00                    2     .db 0
   62D3 00                    3     .db 0
   62D4 1E                    4     .db 30
   62D5 01                    5     .db 1
   62D6 E6                    6     .db 230
   62D7 05                    7     .db 5 
   62D8 0A                    8     .db 10
   62D9 1F 46                 9     .dw #_add_20_score 
   62DB D3 33                10     .dw #_bonus
   62DD 00                   11     .db 0
   06F5                     316 DefineEntity 2,  0,    0, 40, 1,     230,    6,  16,     0,    #_bloque_desierto, 0
   62DE 02                    1     .db 2
   62DF 00                    2     .db 0
   62E0 00                    3     .db 0
   62E1 28                    4     .db 40
   62E2 01                    5     .db 1
   62E3 E6                    6     .db 230
   62E4 06                    7     .db 6 
   62E5 10                    8     .db 16
   62E6 00 00                 9     .dw 0 
   62E8 24 1B                10     .dw #_bloque_desierto
   62EA 00                   11     .db 0
                            317 
                            318 
   0702                     319 DefineEntity 4,  0,    0, 122,  1,    245,    6,  16*3,     0,    #_cactus3, 0
   62EB 04                    1     .db 4
   62EC 00                    2     .db 0
   62ED 00                    3     .db 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 122.
Hexadecimal [16-Bits]



   62EE 7A                    4     .db 122
   62EF 01                    5     .db 1
   62F0 F5                    6     .db 245
   62F1 06                    7     .db 6 
   62F2 30                    8     .db 16*3
   62F3 00 00                 9     .dw 0 
   62F5 FC 18                10     .dw #_cactus3
   62F7 00                   11     .db 0
                            320 
                            321 
   070F                     322 DefineEntity 8,   0,   0, 160,  2,     30,     5,   10,   #_slow_game,    #_ralenDes,      0 
   62F8 08                    1     .db 8
   62F9 00                    2     .db 0
   62FA 00                    3     .db 0
   62FB A0                    4     .db 160
   62FC 02                    5     .db 2
   62FD 1E                    6     .db 30
   62FE 05                    7     .db 5 
   62FF 0A                    8     .db 10
   6300 67 49                 9     .dw #_slow_game 
   6302 4A 17                10     .dw #_ralenDes
   6304 00                   11     .db 0
                            323 
   071C                     324 DefineEntity 4,  1,    2, 150,  2,     52,  4,  13, #_sys_ai_update_top_down,   #_pradoRedBird,      0   
   6305 04                    1     .db 4
   6306 01                    2     .db 1
   6307 02                    3     .db 2
   6308 96                    4     .db 150
   6309 02                    5     .db 2
   630A 34                    6     .db 52
   630B 04                    7     .db 4 
   630C 0D                    8     .db 13
   630D 9D 3F                 9     .dw #_sys_ai_update_top_down 
   630F 16 1F                10     .dw #_pradoRedBird
   6311 00                   11     .db 0
   0729                     325 DefineEntity 4,  1,    2, 150,  2,     82,  4,  13, #_sys_ai_update_top_down,   #_pradoRedBird,      0   
   6312 04                    1     .db 4
   6313 01                    2     .db 1
   6314 02                    3     .db 2
   6315 96                    4     .db 150
   6316 02                    5     .db 2
   6317 52                    6     .db 82
   6318 04                    7     .db 4 
   6319 0D                    8     .db 13
   631A 9D 3F                 9     .dw #_sys_ai_update_top_down 
   631C 16 1F                10     .dw #_pradoRedBird
   631E 00                   11     .db 0
   0736                     326 DefineEntity 4,  1,    2, 150,  2,     112,  4,  13, #_sys_ai_update_top_down,   #_pradoRedBird,      0   
   631F 04                    1     .db 4
   6320 01                    2     .db 1
   6321 02                    3     .db 2
   6322 96                    4     .db 150
   6323 02                    5     .db 2
   6324 70                    6     .db 112
   6325 04                    7     .db 4 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 123.
Hexadecimal [16-Bits]



   6326 0D                    8     .db 13
   6327 9D 3F                 9     .dw #_sys_ai_update_top_down 
   6329 16 1F                10     .dw #_pradoRedBird
   632B 00                   11     .db 0
                            327 
                            328 
   0743                     329 DefineEntity 4,  0,    0, 138,  2,    230,    6,  16*2,     0,    #_cactus2, 0
   632C 04                    1     .db 4
   632D 00                    2     .db 0
   632E 00                    3     .db 0
   632F 8A                    4     .db 138
   6330 02                    5     .db 2
   6331 E6                    6     .db 230
   6332 06                    7     .db 6 
   6333 20                    8     .db 16*2
   6334 00 00                 9     .dw 0 
   6336 1C 1A                10     .dw #_cactus2
   6338 00                   11     .db 0
   0750                     330 DefineEntity 4,  0,    0, 122,  2,    238,    6,  16*3,     0,    #_cactus3, 0
   6339 04                    1     .db 4
   633A 00                    2     .db 0
   633B 00                    3     .db 0
   633C 7A                    4     .db 122
   633D 02                    5     .db 2
   633E EE                    6     .db 238
   633F 06                    7     .db 6 
   6340 30                    8     .db 16*3
   6341 00 00                 9     .dw 0 
   6343 FC 18                10     .dw #_cactus3
   6345 00                   11     .db 0
   075D                     331 DefineEntity 4,  0,    0, 138,  2,    246,    6,  16*2,     0,    #_cactus2, 0
   6346 04                    1     .db 4
   6347 00                    2     .db 0
   6348 00                    3     .db 0
   6349 8A                    4     .db 138
   634A 02                    5     .db 2
   634B F6                    6     .db 246
   634C 06                    7     .db 6 
   634D 20                    8     .db 16*2
   634E 00 00                 9     .dw 0 
   6350 1C 1A                10     .dw #_cactus2
   6352 00                   11     .db 0
                            332 
                            333 
   076A                     334 DefineEntity 4,  0,    0, 138,  3,    70,    6,  16*2,     0,    #_cactus2, 0
   6353 04                    1     .db 4
   6354 00                    2     .db 0
   6355 00                    3     .db 0
   6356 8A                    4     .db 138
   6357 03                    5     .db 3
   6358 46                    6     .db 70
   6359 06                    7     .db 6 
   635A 20                    8     .db 16*2
   635B 00 00                 9     .dw 0 
   635D 1C 1A                10     .dw #_cactus2
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 124.
Hexadecimal [16-Bits]



   635F 00                   11     .db 0
   0777                     335 DefineEntity 4,  0,    0, 138,  3,    100,    6,  16*2,     0,    #_cactus2, 0
   6360 04                    1     .db 4
   6361 00                    2     .db 0
   6362 00                    3     .db 0
   6363 8A                    4     .db 138
   6364 03                    5     .db 3
   6365 64                    6     .db 100
   6366 06                    7     .db 6 
   6367 20                    8     .db 16*2
   6368 00 00                 9     .dw 0 
   636A 1C 1A                10     .dw #_cactus2
   636C 00                   11     .db 0
   0784                     336 DefineEntity 4,  0,    0, 138,  3,    130,    6,  16*2,     0,    #_cactus2, 0
   636D 04                    1     .db 4
   636E 00                    2     .db 0
   636F 00                    3     .db 0
   6370 8A                    4     .db 138
   6371 03                    5     .db 3
   6372 82                    6     .db 130
   6373 06                    7     .db 6 
   6374 20                    8     .db 16*2
   6375 00 00                 9     .dw 0 
   6377 1C 1A                10     .dw #_cactus2
   6379 00                   11     .db 0
                            337 
                            338 
   0791                     339 DefineEntity 8,   0,   0, 160,  3,     150,     5,   10,   #_slow_game,    #_ralenDes,      0 
   637A 08                    1     .db 8
   637B 00                    2     .db 0
   637C 00                    3     .db 0
   637D A0                    4     .db 160
   637E 03                    5     .db 3
   637F 96                    6     .db 150
   6380 05                    7     .db 5 
   6381 0A                    8     .db 10
   6382 67 49                 9     .dw #_slow_game 
   6384 4A 17                10     .dw #_ralenDes
   6386 00                   11     .db 0
                            340 
   079E                     341 DefineEntity 4,  1,    2, 150,  3,     170,  4,  13, #_sys_ai_update_top_down,   #_pradoRedBird,      0   
   6387 04                    1     .db 4
   6388 01                    2     .db 1
   6389 02                    3     .db 2
   638A 96                    4     .db 150
   638B 03                    5     .db 3
   638C AA                    6     .db 170
   638D 04                    7     .db 4 
   638E 0D                    8     .db 13
   638F 9D 3F                 9     .dw #_sys_ai_update_top_down 
   6391 16 1F                10     .dw #_pradoRedBird
   6393 00                   11     .db 0
   07AB                     342 DefineEntity 4,  1,    2, 150,  3,     200,  4,  13, #_sys_ai_update_top_down,   #_pradoRedBird,      0   
   6394 04                    1     .db 4
   6395 01                    2     .db 1
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 125.
Hexadecimal [16-Bits]



   6396 02                    3     .db 2
   6397 96                    4     .db 150
   6398 03                    5     .db 3
   6399 C8                    6     .db 200
   639A 04                    7     .db 4 
   639B 0D                    8     .db 13
   639C 9D 3F                 9     .dw #_sys_ai_update_top_down 
   639E 16 1F                10     .dw #_pradoRedBird
   63A0 00                   11     .db 0
   07B8                     343 DefineEntity 4,  1,    2, 150,  3,     230,  4,  13, #_sys_ai_update_top_down,   #_pradoRedBird,      0   
   63A1 04                    1     .db 4
   63A2 01                    2     .db 1
   63A3 02                    3     .db 2
   63A4 96                    4     .db 150
   63A5 03                    5     .db 3
   63A6 E6                    6     .db 230
   63A7 04                    7     .db 4 
   63A8 0D                    8     .db 13
   63A9 9D 3F                 9     .dw #_sys_ai_update_top_down 
   63AB 16 1F                10     .dw #_pradoRedBird
   63AD 00                   11     .db 0
                            344 
                            345 
   07C5                     346 DefineEntity 16, 0,    0, 114,   4,    0,  6,  56, 0, #_endMapa, 0  
   63AE 10                    1     .db 16
   63AF 00                    2     .db 0
   63B0 00                    3     .db 0
   63B1 72                    4     .db 114
   63B2 04                    5     .db 4
   63B3 00                    6     .db 0
   63B4 06                    7     .db 6 
   63B5 38                    8     .db 56
   63B6 00 00                 9     .dw 0 
   63B8 83 32                10     .dw #_endMapa
   63BA 00                   11     .db 0
   07D2                     347 DefineEntity 16, 0,    0,   20,  4,    6,  1,  114,0, #_colisionFinal, 0
   63BB 10                    1     .db 16
   63BC 00                    2     .db 0
   63BD 00                    3     .db 0
   63BE 14                    4     .db 20
   63BF 04                    5     .db 4
   63C0 06                    6     .db 6
   63C1 01                    7     .db 1 
   63C2 72                    8     .db 114
   63C3 00 00                 9     .dw 0 
   63C5 11 32                10     .dw #_colisionFinal
   63C7 00                   11     .db 0
                            348 
                            349 
                            350 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            351 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            352 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            353 
                            354 ;;////////////////
                            355 ;;/// MAPA 7 /// ;; mapa con saltos + enemigos voladores 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 126.
Hexadecimal [16-Bits]



                            356 ;;///////////////
   63C8                     357 _mapa7:: 
                            358 ;;          TIPO COMP  X    Y  OFF_L OFF_H  E_W  E_H  E_PREV                    E_SPR             E_AI_COUNTER
   07DF                     359 DefineEntity 2,   0,   0, 120, 0,     70,      6,   16,   0,                 #_bloque_halloween,    0 
   63C8 02                    1     .db 2
   63C9 00                    2     .db 0
   63CA 00                    3     .db 0
   63CB 78                    4     .db 120
   63CC 00                    5     .db 0
   63CD 46                    6     .db 70
   63CE 06                    7     .db 6 
   63CF 10                    8     .db 16
   63D0 00 00                 9     .dw 0 
   63D2 EA 16                10     .dw #_bloque_halloween
   63D4 00                   11     .db 0
   07EC                     360 DefineEntity 8,   0,   0, 108, 0,     71,       5,   10,     #_add_20_score,    #_bonus,     0  
   63D5 08                    1     .db 8
   63D6 00                    2     .db 0
   63D7 00                    3     .db 0
   63D8 6C                    4     .db 108
   63D9 00                    5     .db 0
   63DA 47                    6     .db 71
   63DB 05                    7     .db 5 
   63DC 0A                    8     .db 10
   63DD 1F 46                 9     .dw #_add_20_score 
   63DF D3 33                10     .dw #_bonus
   63E1 00                   11     .db 0
   07F9                     361 DefineEntity 2,   0,   0, 120, 0,     74,      6,   16,   0,                 #_bloque_halloween,    0   
   63E2 02                    1     .db 2
   63E3 00                    2     .db 0
   63E4 00                    3     .db 0
   63E5 78                    4     .db 120
   63E6 00                    5     .db 0
   63E7 4A                    6     .db 74
   63E8 06                    7     .db 6 
   63E9 10                    8     .db 16
   63EA 00 00                 9     .dw 0 
   63EC EA 16                10     .dw #_bloque_halloween
   63EE 00                   11     .db 0
                            362 
   0806                     363 DefineEntity 4,   0,   0, 138, 0,     130,      6,   16*2,   0,                 #_hallArbol2,    0   
   63EF 04                    1     .db 4
   63F0 00                    2     .db 0
   63F1 00                    3     .db 0
   63F2 8A                    4     .db 138
   63F3 00                    5     .db 0
   63F4 82                    6     .db 130
   63F5 06                    7     .db 6 
   63F6 20                    8     .db 16*2
   63F7 00 00                 9     .dw 0 
   63F9 E2 15                10     .dw #_hallArbol2
   63FB 00                   11     .db 0
   0813                     364 DefineEntity 4,   1,   1, 138, 0,     170,      4,     13, #_sys_ai_update_top_down,   #_halloweenIABird,      0
   63FC 04                    1     .db 4
   63FD 01                    2     .db 1
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 127.
Hexadecimal [16-Bits]



   63FE 01                    3     .db 1
   63FF 8A                    4     .db 138
   6400 00                    5     .db 0
   6401 AA                    6     .db 170
   6402 04                    7     .db 4 
   6403 0D                    8     .db 13
   6404 9D 3F                 9     .dw #_sys_ai_update_top_down 
   6406 A2 16                10     .dw #_halloweenIABird
   6408 00                   11     .db 0
   0820                     365 DefineEntity 4,   0,   0, 138, 0,     185,      6,   16*2,   0,                 #_hallArbol2,    0
   6409 04                    1     .db 4
   640A 00                    2     .db 0
   640B 00                    3     .db 0
   640C 8A                    4     .db 138
   640D 00                    5     .db 0
   640E B9                    6     .db 185
   640F 06                    7     .db 6 
   6410 20                    8     .db 16*2
   6411 00 00                 9     .dw 0 
   6413 E2 15                10     .dw #_hallArbol2
   6415 00                   11     .db 0
   082D                     366 DefineEntity 4,   0,   0, 138, 0,     210,      6,   16*2,   0,                 #_hallArbol2,    0
   6416 04                    1     .db 4
   6417 00                    2     .db 0
   6418 00                    3     .db 0
   6419 8A                    4     .db 138
   641A 00                    5     .db 0
   641B D2                    6     .db 210
   641C 06                    7     .db 6 
   641D 20                    8     .db 16*2
   641E 00 00                 9     .dw 0 
   6420 E2 15                10     .dw #_hallArbol2
   6422 00                   11     .db 0
   083A                     367 DefineEntity 4,   0,   1, 102, 0,     212,      4,      5,   0,          #_halloweenBird,      0 
   6423 04                    1     .db 4
   6424 00                    2     .db 0
   6425 01                    3     .db 1
   6426 66                    4     .db 102
   6427 00                    5     .db 0
   6428 D4                    6     .db 212
   6429 04                    7     .db 4 
   642A 05                    8     .db 5
   642B 00 00                 9     .dw 0 
   642D D6 16                10     .dw #_halloweenBird
   642F 00                   11     .db 0
                            368 
   0847                     369 DefineEntity 4,   0,   0, 138, 0,     250,      6,   16*2,   0,                 #_hallArbol2,    0
   6430 04                    1     .db 4
   6431 00                    2     .db 0
   6432 00                    3     .db 0
   6433 8A                    4     .db 138
   6434 00                    5     .db 0
   6435 FA                    6     .db 250
   6436 06                    7     .db 6 
   6437 20                    8     .db 16*2
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 128.
Hexadecimal [16-Bits]



   6438 00 00                 9     .dw 0 
   643A E2 15                10     .dw #_hallArbol2
   643C 00                   11     .db 0
   0854                     370 DefineEntity 4,   0,   0, 138, 1,     20,       6,   16*2,   0,                 #_hallArbol2,    0
   643D 04                    1     .db 4
   643E 00                    2     .db 0
   643F 00                    3     .db 0
   6440 8A                    4     .db 138
   6441 01                    5     .db 1
   6442 14                    6     .db 20
   6443 06                    7     .db 6 
   6444 20                    8     .db 16*2
   6445 00 00                 9     .dw 0 
   6447 E2 15                10     .dw #_hallArbol2
   6449 00                   11     .db 0
   0861                     371 DefineEntity 8,   0,   0, 128, 1,     25,       5,   10,     #_add_20_score,    #_bonus,     0  
   644A 08                    1     .db 8
   644B 00                    2     .db 0
   644C 00                    3     .db 0
   644D 80                    4     .db 128
   644E 01                    5     .db 1
   644F 19                    6     .db 25
   6450 05                    7     .db 5 
   6451 0A                    8     .db 10
   6452 1F 46                 9     .dw #_add_20_score 
   6454 D3 33                10     .dw #_bonus
   6456 00                   11     .db 0
                            372 
   086E                     373 DefineEntity 4,   0,   0, 138, 1,     60,       6,   16*2,   0,                 #_hallArbol2,    0
   6457 04                    1     .db 4
   6458 00                    2     .db 0
   6459 00                    3     .db 0
   645A 8A                    4     .db 138
   645B 01                    5     .db 1
   645C 3C                    6     .db 60
   645D 06                    7     .db 6 
   645E 20                    8     .db 16*2
   645F 00 00                 9     .dw 0 
   6461 E2 15                10     .dw #_hallArbol2
   6463 00                   11     .db 0
   087B                     374 DefineEntity 8,   0,   0, 128, 1,     70,       5,   10,     #_add_20_score,    #_bonus,     0  
   6464 08                    1     .db 8
   6465 00                    2     .db 0
   6466 00                    3     .db 0
   6467 80                    4     .db 128
   6468 01                    5     .db 1
   6469 46                    6     .db 70
   646A 05                    7     .db 5 
   646B 0A                    8     .db 10
   646C 1F 46                 9     .dw #_add_20_score 
   646E D3 33                10     .dw #_bonus
   6470 00                   11     .db 0
   0888                     375 DefineEntity 4,   0,   0, 138, 1,     80,       6,   16*2,   0,                 #_hallArbol2,    0
   6471 04                    1     .db 4
   6472 00                    2     .db 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 129.
Hexadecimal [16-Bits]



   6473 00                    3     .db 0
   6474 8A                    4     .db 138
   6475 01                    5     .db 1
   6476 50                    6     .db 80
   6477 06                    7     .db 6 
   6478 20                    8     .db 16*2
   6479 00 00                 9     .dw 0 
   647B E2 15                10     .dw #_hallArbol2
   647D 00                   11     .db 0
   0895                     376 DefineEntity 4,   0,   0, 106, 1,     140,      6,   16*4,   0,                 #_hallArbol4,    0
   647E 04                    1     .db 4
   647F 00                    2     .db 0
   6480 00                    3     .db 0
   6481 6A                    4     .db 106
   6482 01                    5     .db 1
   6483 8C                    6     .db 140
   6484 06                    7     .db 6 
   6485 40                    8     .db 16*4
   6486 00 00                 9     .dw 0 
   6488 42 13                10     .dw #_hallArbol4
   648A 00                   11     .db 0
   08A2                     377 DefineEntity 4,   0,   0, 138, 1,     180,      6,   16*2,   0,                 #_hallArbol2,    0
   648B 04                    1     .db 4
   648C 00                    2     .db 0
   648D 00                    3     .db 0
   648E 8A                    4     .db 138
   648F 01                    5     .db 1
   6490 B4                    6     .db 180
   6491 06                    7     .db 6 
   6492 20                    8     .db 16*2
   6493 00 00                 9     .dw 0 
   6495 E2 15                10     .dw #_hallArbol2
   6497 00                   11     .db 0
                            378 
   08AF                     379 DefineEntity 2,   0,   0, 120, 1,     240,      6,   16,   0,                 #_bloque_halloween,    0 
   6498 02                    1     .db 2
   6499 00                    2     .db 0
   649A 00                    3     .db 0
   649B 78                    4     .db 120
   649C 01                    5     .db 1
   649D F0                    6     .db 240
   649E 06                    7     .db 6 
   649F 10                    8     .db 16
   64A0 00 00                 9     .dw 0 
   64A2 EA 16                10     .dw #_bloque_halloween
   64A4 00                   11     .db 0
   08BC                     380 DefineEntity 8,   0,   0, 110, 1,     242,      5,   10,     #_add_20_score,    #_bonus,     0  
   64A5 08                    1     .db 8
   64A6 00                    2     .db 0
   64A7 00                    3     .db 0
   64A8 6E                    4     .db 110
   64A9 01                    5     .db 1
   64AA F2                    6     .db 242
   64AB 05                    7     .db 5 
   64AC 0A                    8     .db 10
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 130.
Hexadecimal [16-Bits]



   64AD 1F 46                 9     .dw #_add_20_score 
   64AF D3 33                10     .dw #_bonus
   64B1 00                   11     .db 0
   08C9                     381 DefineEntity 2,   0,   0, 120, 1,     244,      6,   16,   0,                 #_bloque_halloween,    0
   64B2 02                    1     .db 2
   64B3 00                    2     .db 0
   64B4 00                    3     .db 0
   64B5 78                    4     .db 120
   64B6 01                    5     .db 1
   64B7 F4                    6     .db 244
   64B8 06                    7     .db 6 
   64B9 10                    8     .db 16
   64BA 00 00                 9     .dw 0 
   64BC EA 16                10     .dw #_bloque_halloween
   64BE 00                   11     .db 0
   08D6                     382 DefineEntity 2,   0,   0, 120, 1,     248,      6,   16,   0,                 #_bloque_halloween,    0
   64BF 02                    1     .db 2
   64C0 00                    2     .db 0
   64C1 00                    3     .db 0
   64C2 78                    4     .db 120
   64C3 01                    5     .db 1
   64C4 F8                    6     .db 248
   64C5 06                    7     .db 6 
   64C6 10                    8     .db 16
   64C7 00 00                 9     .dw 0 
   64C9 EA 16                10     .dw #_bloque_halloween
   64CB 00                   11     .db 0
                            383 
   08E3                     384 DefineEntity 8,   0,   0, 154, 2,     42,      5,   10,     #_add_20_score,    #_bonus,     0  ;;si pilla el bonus se muere contra el cactus
   64CC 08                    1     .db 8
   64CD 00                    2     .db 0
   64CE 00                    3     .db 0
   64CF 9A                    4     .db 154
   64D0 02                    5     .db 2
   64D1 2A                    6     .db 42
   64D2 05                    7     .db 5 
   64D3 0A                    8     .db 10
   64D4 1F 46                 9     .dw #_add_20_score 
   64D6 D3 33                10     .dw #_bonus
   64D8 00                   11     .db 0
   08F0                     385 DefineEntity 2,   0,   0, 130, 2,     40,      6,   16,   0,                 #_bloque_halloween,    0
   64D9 02                    1     .db 2
   64DA 00                    2     .db 0
   64DB 00                    3     .db 0
   64DC 82                    4     .db 130
   64DD 02                    5     .db 2
   64DE 28                    6     .db 40
   64DF 06                    7     .db 6 
   64E0 10                    8     .db 16
   64E1 00 00                 9     .dw 0 
   64E3 EA 16                10     .dw #_bloque_halloween
   64E5 00                   11     .db 0
   08FD                     386 DefineEntity 2,   0,   0, 130, 2,     44,      6,   16,   0,                 #_bloque_halloween,    0
   64E6 02                    1     .db 2
   64E7 00                    2     .db 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 131.
Hexadecimal [16-Bits]



   64E8 00                    3     .db 0
   64E9 82                    4     .db 130
   64EA 02                    5     .db 2
   64EB 2C                    6     .db 44
   64EC 06                    7     .db 6 
   64ED 10                    8     .db 16
   64EE 00 00                 9     .dw 0 
   64F0 EA 16                10     .dw #_bloque_halloween
   64F2 00                   11     .db 0
   090A                     387 DefineEntity 4,   0,   0, 138, 2,     56,      6,   16*2,   0,                 #_hallArbol2,    0
   64F3 04                    1     .db 4
   64F4 00                    2     .db 0
   64F5 00                    3     .db 0
   64F6 8A                    4     .db 138
   64F7 02                    5     .db 2
   64F8 38                    6     .db 56
   64F9 06                    7     .db 6 
   64FA 20                    8     .db 16*2
   64FB 00 00                 9     .dw 0 
   64FD E2 15                10     .dw #_hallArbol2
   64FF 00                   11     .db 0
                            388 
   0917                     389 DefineEntity 4,   0,   0, 122, 2,     90,      6,   16*3,   0,                 #_hallArbol3,    0
   6500 04                    1     .db 4
   6501 00                    2     .db 0
   6502 00                    3     .db 0
   6503 7A                    4     .db 122
   6504 02                    5     .db 2
   6505 5A                    6     .db 90
   6506 06                    7     .db 6 
   6507 30                    8     .db 16*3
   6508 00 00                 9     .dw 0 
   650A C2 14                10     .dw #_hallArbol3
   650C 00                   11     .db 0
   0924                     390 DefineEntity 8,   0,   0, 154, 2,     115,      5,   10,     #_add_20_score,    #_bonus,     0  
   650D 08                    1     .db 8
   650E 00                    2     .db 0
   650F 00                    3     .db 0
   6510 9A                    4     .db 154
   6511 02                    5     .db 2
   6512 73                    6     .db 115
   6513 05                    7     .db 5 
   6514 0A                    8     .db 10
   6515 1F 46                 9     .dw #_add_20_score 
   6517 D3 33                10     .dw #_bonus
   6519 00                   11     .db 0
   0931                     391 DefineEntity 4,   0,   0, 138, 2,     150,      6,   16*2,   0,                 #_hallArbol2,    0
   651A 04                    1     .db 4
   651B 00                    2     .db 0
   651C 00                    3     .db 0
   651D 8A                    4     .db 138
   651E 02                    5     .db 2
   651F 96                    6     .db 150
   6520 06                    7     .db 6 
   6521 20                    8     .db 16*2
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 132.
Hexadecimal [16-Bits]



   6522 00 00                 9     .dw 0 
   6524 E2 15                10     .dw #_hallArbol2
   6526 00                   11     .db 0
                            392 
   093E                     393 DefineEntity 4,   0,   0, 122, 3,     45,      6,   16*3,   0,                 #_hallArbol3,    0   
   6527 04                    1     .db 4
   6528 00                    2     .db 0
   6529 00                    3     .db 0
   652A 7A                    4     .db 122
   652B 03                    5     .db 3
   652C 2D                    6     .db 45
   652D 06                    7     .db 6 
   652E 30                    8     .db 16*3
   652F 00 00                 9     .dw 0 
   6531 C2 14                10     .dw #_hallArbol3
   6533 00                   11     .db 0
   094B                     394 DefineEntity 8,   0,   0, 154, 3,     60,      5,   10,     #_add_10_score,    #_bonus,     0  
   6534 08                    1     .db 8
   6535 00                    2     .db 0
   6536 00                    3     .db 0
   6537 9A                    4     .db 154
   6538 03                    5     .db 3
   6539 3C                    6     .db 60
   653A 05                    7     .db 5 
   653B 0A                    8     .db 10
   653C 33 46                 9     .dw #_add_10_score 
   653E D3 33                10     .dw #_bonus
   6540 00                   11     .db 0
   0958                     395 DefineEntity 4,   0,   0, 138, 3,     80,      6,   16*2,   0,                 #_hallArbol2,    0 
   6541 04                    1     .db 4
   6542 00                    2     .db 0
   6543 00                    3     .db 0
   6544 8A                    4     .db 138
   6545 03                    5     .db 3
   6546 50                    6     .db 80
   6547 06                    7     .db 6 
   6548 20                    8     .db 16*2
   6549 00 00                 9     .dw 0 
   654B E2 15                10     .dw #_hallArbol2
   654D 00                   11     .db 0
                            396 
                            397 
   0965                     398 DefineEntity 16, 0,    0, 114,   3,    200,  6,  56, 0, #_endMapa, 0  
   654E 10                    1     .db 16
   654F 00                    2     .db 0
   6550 00                    3     .db 0
   6551 72                    4     .db 114
   6552 03                    5     .db 3
   6553 C8                    6     .db 200
   6554 06                    7     .db 6 
   6555 38                    8     .db 56
   6556 00 00                 9     .dw 0 
   6558 83 32                10     .dw #_endMapa
   655A 00                   11     .db 0
   0972                     399 DefineEntity 16, 0,    0,   20,  3,    206,  1,  114,0, #_colisionFinal, 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 133.
Hexadecimal [16-Bits]



   655B 10                    1     .db 16
   655C 00                    2     .db 0
   655D 00                    3     .db 0
   655E 14                    4     .db 20
   655F 03                    5     .db 3
   6560 CE                    6     .db 206
   6561 01                    7     .db 1 
   6562 72                    8     .db 114
   6563 00 00                 9     .dw 0 
   6565 11 32                10     .dw #_colisionFinal
   6567 00                   11     .db 0
                            400 
                            401 
                            402 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            403 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            404 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            405 
                            406 ;;////////////////////////////
                            407 ;;/// MAPA 8:                   
                            408 ;;/// mapa halloween todo combinado 
                            409 ;;///////////////////////////
   6568                     410 _mapa8::
                            411 ;;          TIPO COMP  X   Y  OFF_L  OFF_H     E_W  E_H   E_PREV                  E_SPR     E_AI_COUNTER
   097F                     412 DefineEntity 4,   0,   0, 138,  0,     70,    6,   16*2,   0,    #_hallArbol2,      0
   6568 04                    1     .db 4
   6569 00                    2     .db 0
   656A 00                    3     .db 0
   656B 8A                    4     .db 138
   656C 00                    5     .db 0
   656D 46                    6     .db 70
   656E 06                    7     .db 6 
   656F 20                    8     .db 16*2
   6570 00 00                 9     .dw 0 
   6572 E2 15                10     .dw #_hallArbol2
   6574 00                   11     .db 0
   098C                     413 DefineEntity 4,   1,   1, 154,  0,     90,    4,     13, #_sys_ai_update_following,   #_halloweenIABird,      0
   6575 04                    1     .db 4
   6576 01                    2     .db 1
   6577 01                    3     .db 1
   6578 9A                    4     .db 154
   6579 00                    5     .db 0
   657A 5A                    6     .db 90
   657B 04                    7     .db 4 
   657C 0D                    8     .db 13
   657D 4B 3F                 9     .dw #_sys_ai_update_following 
   657F A2 16                10     .dw #_halloweenIABird
   6581 00                   11     .db 0
   0999                     414 DefineEntity 4,   0,   0, 138,  0,     100,   6,   16*2,   0,    #_hallArbol2,      0 
   6582 04                    1     .db 4
   6583 00                    2     .db 0
   6584 00                    3     .db 0
   6585 8A                    4     .db 138
   6586 00                    5     .db 0
   6587 64                    6     .db 100
   6588 06                    7     .db 6 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 134.
Hexadecimal [16-Bits]



   6589 20                    8     .db 16*2
   658A 00 00                 9     .dw 0 
   658C E2 15                10     .dw #_hallArbol2
   658E 00                   11     .db 0
                            415 
   09A6                     416 DefineEntity 4,   0,   0, 138,  0,     148,   6,   16*2,   0,    #_hallArbol2,      0  
   658F 04                    1     .db 4
   6590 00                    2     .db 0
   6591 00                    3     .db 0
   6592 8A                    4     .db 138
   6593 00                    5     .db 0
   6594 94                    6     .db 148
   6595 06                    7     .db 6 
   6596 20                    8     .db 16*2
   6597 00 00                 9     .dw 0 
   6599 E2 15                10     .dw #_hallArbol2
   659B 00                   11     .db 0
   09B3                     417 DefineEntity 8,   0,   0, 160,  0,     170,     5,   10,   #_slow_game,    #_ralenHallo,      0 
   659C 08                    1     .db 8
   659D 00                    2     .db 0
   659E 00                    3     .db 0
   659F A0                    4     .db 160
   65A0 00                    5     .db 0
   65A1 AA                    6     .db 170
   65A2 05                    7     .db 5 
   65A3 0A                    8     .db 10
   65A4 67 49                 9     .dw #_slow_game 
   65A6 10 13                10     .dw #_ralenHallo
   65A8 00                   11     .db 0
                            418 
                            419 ;;si suben aquí mueren contra el árbol de altura 4 que viene después
   09C0                     420 DefineEntity 2,   0,   0, 110,  0,     190,    6,   16,   0,    #_bloque_halloween,      0
   65A9 02                    1     .db 2
   65AA 00                    2     .db 0
   65AB 00                    3     .db 0
   65AC 6E                    4     .db 110
   65AD 00                    5     .db 0
   65AE BE                    6     .db 190
   65AF 06                    7     .db 6 
   65B0 10                    8     .db 16
   65B1 00 00                 9     .dw 0 
   65B3 EA 16                10     .dw #_bloque_halloween
   65B5 00                   11     .db 0
   09CD                     421 DefineEntity 8,   0,   0, 100,  0,     192,     5,   10,   #_add_10_score,    #_bonus,      0 
   65B6 08                    1     .db 8
   65B7 00                    2     .db 0
   65B8 00                    3     .db 0
   65B9 64                    4     .db 100
   65BA 00                    5     .db 0
   65BB C0                    6     .db 192
   65BC 05                    7     .db 5 
   65BD 0A                    8     .db 10
   65BE 33 46                 9     .dw #_add_10_score 
   65C0 D3 33                10     .dw #_bonus
   65C2 00                   11     .db 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 135.
Hexadecimal [16-Bits]



   09DA                     422 DefineEntity 2,   0,   0, 110,  0,     194,    6,   16,   0,    #_bloque_halloween,      0
   65C3 02                    1     .db 2
   65C4 00                    2     .db 0
   65C5 00                    3     .db 0
   65C6 6E                    4     .db 110
   65C7 00                    5     .db 0
   65C8 C2                    6     .db 194
   65C9 06                    7     .db 6 
   65CA 10                    8     .db 16
   65CB 00 00                 9     .dw 0 
   65CD EA 16                10     .dw #_bloque_halloween
   65CF 00                   11     .db 0
                            423 
   09E7                     424 DefineEntity 4,   0,   0, 138,  0,     235,     6,   16*2,   0,    #_hallArbol2,      0 
   65D0 04                    1     .db 4
   65D1 00                    2     .db 0
   65D2 00                    3     .db 0
   65D3 8A                    4     .db 138
   65D4 00                    5     .db 0
   65D5 EB                    6     .db 235
   65D6 06                    7     .db 6 
   65D7 20                    8     .db 16*2
   65D8 00 00                 9     .dw 0 
   65DA E2 15                10     .dw #_hallArbol2
   65DC 00                   11     .db 0
   09F4                     425 DefineEntity 4,   0,   0, 106,  1,     20,     6,   16*4,   0,    #_hallArbol4,      0 
   65DD 04                    1     .db 4
   65DE 00                    2     .db 0
   65DF 00                    3     .db 0
   65E0 6A                    4     .db 106
   65E1 01                    5     .db 1
   65E2 14                    6     .db 20
   65E3 06                    7     .db 6 
   65E4 40                    8     .db 16*4
   65E5 00 00                 9     .dw 0 
   65E7 42 13                10     .dw #_hallArbol4
   65E9 00                   11     .db 0
   0A01                     426 DefineEntity 4,   0,   0, 138,  1,     70,      6,   16*2,   0,    #_hallArbol2,      0 
   65EA 04                    1     .db 4
   65EB 00                    2     .db 0
   65EC 00                    3     .db 0
   65ED 8A                    4     .db 138
   65EE 01                    5     .db 1
   65EF 46                    6     .db 70
   65F0 06                    7     .db 6 
   65F1 20                    8     .db 16*2
   65F2 00 00                 9     .dw 0 
   65F4 E2 15                10     .dw #_hallArbol2
   65F6 00                   11     .db 0
                            427 
                            428 ;;*2: tiene que saltar a tiempo para no morir contra el árbol de altura 4 que viene después
   0A0E                     429 DefineEntity 2,   0,   0, 120,  1,     112,    6,   16,   0,    #_bloque_halloween,      0
   65F7 02                    1     .db 2
   65F8 00                    2     .db 0
   65F9 00                    3     .db 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 136.
Hexadecimal [16-Bits]



   65FA 78                    4     .db 120
   65FB 01                    5     .db 1
   65FC 70                    6     .db 112
   65FD 06                    7     .db 6 
   65FE 10                    8     .db 16
   65FF 00 00                 9     .dw 0 
   6601 EA 16                10     .dw #_bloque_halloween
   6603 00                   11     .db 0
   0A1B                     430 DefineEntity 4,   1,   1, 92,  1,     115,    4,     13, #_sys_ai_update_top_down,   #_halloweenIABird,      0 ;;si consigue esquivar al enemigo *2
   6604 04                    1     .db 4
   6605 01                    2     .db 1
   6606 01                    3     .db 1
   6607 5C                    4     .db 92
   6608 01                    5     .db 1
   6609 73                    6     .db 115
   660A 04                    7     .db 4 
   660B 0D                    8     .db 13
   660C 9D 3F                 9     .dw #_sys_ai_update_top_down 
   660E A2 16                10     .dw #_halloweenIABird
   6610 00                   11     .db 0
   0A28                     431 DefineEntity 2,   0,   0, 120,  1,     116,    6,   16,   0,    #_bloque_halloween,      0
   6611 02                    1     .db 2
   6612 00                    2     .db 0
   6613 00                    3     .db 0
   6614 78                    4     .db 120
   6615 01                    5     .db 1
   6616 74                    6     .db 116
   6617 06                    7     .db 6 
   6618 10                    8     .db 16
   6619 00 00                 9     .dw 0 
   661B EA 16                10     .dw #_bloque_halloween
   661D 00                   11     .db 0
   0A35                     432 DefineEntity 4,  0,    1, 154,   1,     117,  4,     5,        0,          #_halloweenBird,      0 ;;*1: no le mata el enemigo
   661E 04                    1     .db 4
   661F 00                    2     .db 0
   6620 01                    3     .db 1
   6621 9A                    4     .db 154
   6622 01                    5     .db 1
   6623 75                    6     .db 117
   6624 04                    7     .db 4 
   6625 05                    8     .db 5
   6626 00 00                 9     .dw 0 
   6628 D6 16                10     .dw #_halloweenBird
   662A 00                   11     .db 0
   0A42                     433 DefineEntity 2,   0,   0, 120,  1,     120,    6,   16,   0,    #_bloque_halloween,      0 
   662B 02                    1     .db 2
   662C 00                    2     .db 0
   662D 00                    3     .db 0
   662E 78                    4     .db 120
   662F 01                    5     .db 1
   6630 78                    6     .db 120
   6631 06                    7     .db 6 
   6632 10                    8     .db 16
   6633 00 00                 9     .dw 0 
   6635 EA 16                10     .dw #_bloque_halloween
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 137.
Hexadecimal [16-Bits]



   6637 00                   11     .db 0
                            434 
   0A4F                     435 DefineEntity 4,   0,   0, 122, 1,     170,    6,   16*3,   0,    #_hallArbol3,      0 
   6638 04                    1     .db 4
   6639 00                    2     .db 0
   663A 00                    3     .db 0
   663B 7A                    4     .db 122
   663C 01                    5     .db 1
   663D AA                    6     .db 170
   663E 06                    7     .db 6 
   663F 30                    8     .db 16*3
   6640 00 00                 9     .dw 0 
   6642 C2 14                10     .dw #_hallArbol3
   6644 00                   11     .db 0
   0A5C                     436 DefineEntity 4,   0,   0, 138, 1,     210,    6,   16*2,   0,    #_hallArbol2,      0 
   6645 04                    1     .db 4
   6646 00                    2     .db 0
   6647 00                    3     .db 0
   6648 8A                    4     .db 138
   6649 01                    5     .db 1
   664A D2                    6     .db 210
   664B 06                    7     .db 6 
   664C 20                    8     .db 16*2
   664D 00 00                 9     .dw 0 
   664F E2 15                10     .dw #_hallArbol2
   6651 00                   11     .db 0
   0A69                     437 DefineEntity 8,   0,   0, 154, 1,     220,     5,   10,     #_add_20_score,    #_bonus,     0  
   6652 08                    1     .db 8
   6653 00                    2     .db 0
   6654 00                    3     .db 0
   6655 9A                    4     .db 154
   6656 01                    5     .db 1
   6657 DC                    6     .db 220
   6658 05                    7     .db 5 
   6659 0A                    8     .db 10
   665A 1F 46                 9     .dw #_add_20_score 
   665C D3 33                10     .dw #_bonus
   665E 00                   11     .db 0
   0A76                     438 DefineEntity 4,   0,   0, 138, 1,     235,    6,   16*2,   0,    #_hallArbol2,      0
   665F 04                    1     .db 4
   6660 00                    2     .db 0
   6661 00                    3     .db 0
   6662 8A                    4     .db 138
   6663 01                    5     .db 1
   6664 EB                    6     .db 235
   6665 06                    7     .db 6 
   6666 20                    8     .db 16*2
   6667 00 00                 9     .dw 0 
   6669 E2 15                10     .dw #_hallArbol2
   666B 00                   11     .db 0
                            439 
   0A83                     440 DefineEntity 2,   0,   0, 120,  2,     10,    6,   16,   0,    #_bloque_halloween,     0
   666C 02                    1     .db 2
   666D 00                    2     .db 0
   666E 00                    3     .db 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 138.
Hexadecimal [16-Bits]



   666F 78                    4     .db 120
   6670 02                    5     .db 2
   6671 0A                    6     .db 10
   6672 06                    7     .db 6 
   6673 10                    8     .db 16
   6674 00 00                 9     .dw 0 
   6676 EA 16                10     .dw #_bloque_halloween
   6678 00                   11     .db 0
   0A90                     441 DefineEntity 8,   0,   0, 110,  2,     12,    5,   10,     #_add_20_score,    #_bonus,     0  ;;o pilla bonus en plataforma
   6679 08                    1     .db 8
   667A 00                    2     .db 0
   667B 00                    3     .db 0
   667C 6E                    4     .db 110
   667D 02                    5     .db 2
   667E 0C                    6     .db 12
   667F 05                    7     .db 5 
   6680 0A                    8     .db 10
   6681 1F 46                 9     .dw #_add_20_score 
   6683 D3 33                10     .dw #_bonus
   6685 00                   11     .db 0
   0A9D                     442 DefineEntity 8,   0,   0, 154,  2,     12,    5,   10,     #_slow_game,    #_ralenHallo,     0  ;;o ralentizador
   6686 08                    1     .db 8
   6687 00                    2     .db 0
   6688 00                    3     .db 0
   6689 9A                    4     .db 154
   668A 02                    5     .db 2
   668B 0C                    6     .db 12
   668C 05                    7     .db 5 
   668D 0A                    8     .db 10
   668E 67 49                 9     .dw #_slow_game 
   6690 10 13                10     .dw #_ralenHallo
   6692 00                   11     .db 0
   0AAA                     443 DefineEntity 2,   0,   0, 120,  2,     14,    6,   16,   0,    #_bloque_halloween,     0
   6693 02                    1     .db 2
   6694 00                    2     .db 0
   6695 00                    3     .db 0
   6696 78                    4     .db 120
   6697 02                    5     .db 2
   6698 0E                    6     .db 14
   6699 06                    7     .db 6 
   669A 10                    8     .db 16
   669B 00 00                 9     .dw 0 
   669D EA 16                10     .dw #_bloque_halloween
   669F 00                   11     .db 0
                            444 
   0AB7                     445 DefineEntity 4,   0,   0, 122,  2,     40,    6,   16*3,   0,    #_hallArbol3,      0 
   66A0 04                    1     .db 4
   66A1 00                    2     .db 0
   66A2 00                    3     .db 0
   66A3 7A                    4     .db 122
   66A4 02                    5     .db 2
   66A5 28                    6     .db 40
   66A6 06                    7     .db 6 
   66A7 30                    8     .db 16*3
   66A8 00 00                 9     .dw 0 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 139.
Hexadecimal [16-Bits]



   66AA C2 14                10     .dw #_hallArbol3
   66AC 00                   11     .db 0
                            446 
                            447 ;;hacemos que se tenga que agachar sí o sí
   0AC4                     448 DefineEntity 4,  0,    1, 154,   2,     70,  4,     5,        0,          #_halloweenBird,      0 ;;si no le mata el enemigo
   66AD 04                    1     .db 4
   66AE 00                    2     .db 0
   66AF 01                    3     .db 1
   66B0 9A                    4     .db 154
   66B1 02                    5     .db 2
   66B2 46                    6     .db 70
   66B3 04                    7     .db 4 
   66B4 05                    8     .db 5
   66B5 00 00                 9     .dw 0 
   66B7 D6 16                10     .dw #_halloweenBird
   66B9 00                   11     .db 0
   0AD1                     449 DefineEntity 8,   0,   1, 154,   2,     80,  5,      10,   #_add_20_score,          #_bonus,      0 ;;que coja bonus
   66BA 08                    1     .db 8
   66BB 00                    2     .db 0
   66BC 01                    3     .db 1
   66BD 9A                    4     .db 154
   66BE 02                    5     .db 2
   66BF 50                    6     .db 80
   66C0 05                    7     .db 5 
   66C1 0A                    8     .db 10
   66C2 1F 46                 9     .dw #_add_20_score 
   66C4 D3 33                10     .dw #_bonus
   66C6 00                   11     .db 0
                            450 
                            451 ;;que tenga que hacer un salto perfecto para poder coger los bonus
   0ADE                     452 DefineEntity 2,   0,   0, 120,  2,     150,    6,   16,   0,    #_bloque_halloween,     0
   66C7 02                    1     .db 2
   66C8 00                    2     .db 0
   66C9 00                    3     .db 0
   66CA 78                    4     .db 120
   66CB 02                    5     .db 2
   66CC 96                    6     .db 150
   66CD 06                    7     .db 6 
   66CE 10                    8     .db 16
   66CF 00 00                 9     .dw 0 
   66D1 EA 16                10     .dw #_bloque_halloween
   66D3 00                   11     .db 0
   0AEB                     453 DefineEntity 8,   0,   0, 110,  2,     150,    5,   10,     #_add_20_score,    #_bonus,     0  
   66D4 08                    1     .db 8
   66D5 00                    2     .db 0
   66D6 00                    3     .db 0
   66D7 6E                    4     .db 110
   66D8 02                    5     .db 2
   66D9 96                    6     .db 150
   66DA 05                    7     .db 5 
   66DB 0A                    8     .db 10
   66DC 1F 46                 9     .dw #_add_20_score 
   66DE D3 33                10     .dw #_bonus
   66E0 00                   11     .db 0
                            454 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 140.
Hexadecimal [16-Bits]



   0AF8                     455 DefineEntity 2,   0,   0, 90,  2,     170,    6,   16,   0,    #_bloque_halloween,     0
   66E1 02                    1     .db 2
   66E2 00                    2     .db 0
   66E3 00                    3     .db 0
   66E4 5A                    4     .db 90
   66E5 02                    5     .db 2
   66E6 AA                    6     .db 170
   66E7 06                    7     .db 6 
   66E8 10                    8     .db 16
   66E9 00 00                 9     .dw 0 
   66EB EA 16                10     .dw #_bloque_halloween
   66ED 00                   11     .db 0
   0B05                     456 DefineEntity 8,   0,   0, 80,  2,     170,    5,   10,     #_add_20_score,    #_bonus,     0  
   66EE 08                    1     .db 8
   66EF 00                    2     .db 0
   66F0 00                    3     .db 0
   66F1 50                    4     .db 80
   66F2 02                    5     .db 2
   66F3 AA                    6     .db 170
   66F4 05                    7     .db 5 
   66F5 0A                    8     .db 10
   66F6 1F 46                 9     .dw #_add_20_score 
   66F8 D3 33                10     .dw #_bonus
   66FA 00                   11     .db 0
                            457 
                            458 
   0B12                     459 DefineEntity 16, 0,    0, 114,   3,    0,  6,  56, 0, #_endMapa, 0  
   66FB 10                    1     .db 16
   66FC 00                    2     .db 0
   66FD 00                    3     .db 0
   66FE 72                    4     .db 114
   66FF 03                    5     .db 3
   6700 00                    6     .db 0
   6701 06                    7     .db 6 
   6702 38                    8     .db 56
   6703 00 00                 9     .dw 0 
   6705 83 32                10     .dw #_endMapa
   6707 00                   11     .db 0
   0B1F                     460 DefineEntity 16, 0,    0,   20,  3,    6,  1,  114,0, #_colisionFinal, 0
   6708 10                    1     .db 16
   6709 00                    2     .db 0
   670A 00                    3     .db 0
   670B 14                    4     .db 20
   670C 03                    5     .db 3
   670D 06                    6     .db 6
   670E 01                    7     .db 1 
   670F 72                    8     .db 114
   6710 00 00                 9     .dw 0 
   6712 11 32                10     .dw #_colisionFinal
   6714 00                   11     .db 0
                            461 
                            462 
                            463 
                            464 ;;////////////////
                            465 ;;/// MAPA 9 /// ;;mapa con todo tipo de entidades
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 141.
Hexadecimal [16-Bits]



                            466 ;;///////////////
   6715                     467 _mapa9::
                            468 ;;          TIPO COMP  X   Y  OFF_L  OFF_H  E_W  E_H   E_PREV        E_SPR           E_AI_COUNTER
   0B2C                     469 DefineEntity 4,  0,    1, 154, 0,     80,   4,  5,             0,              #_desiertoBird,      0  
   6715 04                    1     .db 4
   6716 00                    2     .db 0
   6717 01                    3     .db 1
   6718 9A                    4     .db 154
   6719 00                    5     .db 0
   671A 50                    6     .db 80
   671B 04                    7     .db 4 
   671C 05                    8     .db 5
   671D 00 00                 9     .dw 0 
   671F 10 1B                10     .dw #_desiertoBird
   6721 00                   11     .db 0
   0B39                     470 DefineEntity 4,  0,    1, 154, 0,     100,  4,  5,             0,              #_desiertoBird,      0  
   6722 04                    1     .db 4
   6723 00                    2     .db 0
   6724 01                    3     .db 1
   6725 9A                    4     .db 154
   6726 00                    5     .db 0
   6727 64                    6     .db 100
   6728 04                    7     .db 4 
   6729 05                    8     .db 5
   672A 00 00                 9     .dw 0 
   672C 10 1B                10     .dw #_desiertoBird
   672E 00                   11     .db 0
   0B46                     471 DefineEntity 4,  0,    1, 154, 0,     120,  4,  5,             0,              #_desiertoBird,      0  
   672F 04                    1     .db 4
   6730 00                    2     .db 0
   6731 01                    3     .db 1
   6732 9A                    4     .db 154
   6733 00                    5     .db 0
   6734 78                    6     .db 120
   6735 04                    7     .db 4 
   6736 05                    8     .db 5
   6737 00 00                 9     .dw 0 
   6739 10 1B                10     .dw #_desiertoBird
   673B 00                   11     .db 0
   0B53                     472 DefineEntity 4,  0,    1, 154, 0,     140,  4,  5,             0,              #_desiertoBird,      0  
   673C 04                    1     .db 4
   673D 00                    2     .db 0
   673E 01                    3     .db 1
   673F 9A                    4     .db 154
   6740 00                    5     .db 0
   6741 8C                    6     .db 140
   6742 04                    7     .db 4 
   6743 05                    8     .db 5
   6744 00 00                 9     .dw 0 
   6746 10 1B                10     .dw #_desiertoBird
   6748 00                   11     .db 0
                            473 
                            474 ;;*2: tiene que saltar a tiempo para no morir contra el árbol de altura 4 que viene después
   0B60                     475 DefineEntity 2,   0,   0, 120,  0,     172,    6,   16,   0,                        #_bloque_halloween,      0
   6749 02                    1     .db 2
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 142.
Hexadecimal [16-Bits]



   674A 00                    2     .db 0
   674B 00                    3     .db 0
   674C 78                    4     .db 120
   674D 00                    5     .db 0
   674E AC                    6     .db 172
   674F 06                    7     .db 6 
   6750 10                    8     .db 16
   6751 00 00                 9     .dw 0 
   6753 EA 16                10     .dw #_bloque_halloween
   6755 00                   11     .db 0
   0B6D                     476 DefineEntity 8,   0,   0, 154,  0,     174,    5,   10,     #_add_20_score,         #_bonus,     0  ;;pilla bonus SI *1
   6756 08                    1     .db 8
   6757 00                    2     .db 0
   6758 00                    3     .db 0
   6759 9A                    4     .db 154
   675A 00                    5     .db 0
   675B AE                    6     .db 174
   675C 05                    7     .db 5 
   675D 0A                    8     .db 10
   675E 1F 46                 9     .dw #_add_20_score 
   6760 D3 33                10     .dw #_bonus
   6762 00                   11     .db 0
   0B7A                     477 DefineEntity 4,   1,   1, 92,   0,     175,    4,   13, #_sys_ai_update_top_down,   #_halloweenIABird,      0 ;;si consigue esquivar al enemigo *2
   6763 04                    1     .db 4
   6764 01                    2     .db 1
   6765 01                    3     .db 1
   6766 5C                    4     .db 92
   6767 00                    5     .db 0
   6768 AF                    6     .db 175
   6769 04                    7     .db 4 
   676A 0D                    8     .db 13
   676B 9D 3F                 9     .dw #_sys_ai_update_top_down 
   676D A2 16                10     .dw #_halloweenIABird
   676F 00                   11     .db 0
   0B87                     478 DefineEntity 2,   0,   0, 120,  0,     176,    6,   16,   0,                        #_bloque_halloween,      0
   6770 02                    1     .db 2
   6771 00                    2     .db 0
   6772 00                    3     .db 0
   6773 78                    4     .db 120
   6774 00                    5     .db 0
   6775 B0                    6     .db 176
   6776 06                    7     .db 6 
   6777 10                    8     .db 16
   6778 00 00                 9     .dw 0 
   677A EA 16                10     .dw #_bloque_halloween
   677C 00                   11     .db 0
   0B94                     479 DefineEntity 4,  0,    1, 154,  0,     177,    4,    5,        0,                   #_halloweenBird,      0 ;;*1: no le mata el enemigo
   677D 04                    1     .db 4
   677E 00                    2     .db 0
   677F 01                    3     .db 1
   6780 9A                    4     .db 154
   6781 00                    5     .db 0
   6782 B1                    6     .db 177
   6783 04                    7     .db 4 
   6784 05                    8     .db 5
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 143.
Hexadecimal [16-Bits]



   6785 00 00                 9     .dw 0 
   6787 D6 16                10     .dw #_halloweenBird
   6789 00                   11     .db 0
                            480 ;DefineEntity 4,   0,   0, 138,  0,     240,   6,   16*2,   0,    #_hallArbol2,      0 
                            481 
   0BA1                     482 DefineEntity 8,   0,   0, 160,  1,     30,     5,   10,   #_slow_game,    #_ralenDes,      0 
   678A 08                    1     .db 8
   678B 00                    2     .db 0
   678C 00                    3     .db 0
   678D A0                    4     .db 160
   678E 01                    5     .db 1
   678F 1E                    6     .db 30
   6790 05                    7     .db 5 
   6791 0A                    8     .db 10
   6792 67 49                 9     .dw #_slow_game 
   6794 4A 17                10     .dw #_ralenDes
   6796 00                   11     .db 0
   0BAE                     483 DefineEntity 4,  1,    2, 150,  1,     64,  4,  13, #_sys_ai_update_top_down,   #_pradoRedBird,      0   
   6797 04                    1     .db 4
   6798 01                    2     .db 1
   6799 02                    3     .db 2
   679A 96                    4     .db 150
   679B 01                    5     .db 1
   679C 40                    6     .db 64
   679D 04                    7     .db 4 
   679E 0D                    8     .db 13
   679F 9D 3F                 9     .dw #_sys_ai_update_top_down 
   67A1 16 1F                10     .dw #_pradoRedBird
   67A3 00                   11     .db 0
   0BBB                     484 DefineEntity 4,  1,    2, 150,  1,     94,  4,  13, #_sys_ai_update_top_down,   #_pradoRedBird,      0   
   67A4 04                    1     .db 4
   67A5 01                    2     .db 1
   67A6 02                    3     .db 2
   67A7 96                    4     .db 150
   67A8 01                    5     .db 1
   67A9 5E                    6     .db 94
   67AA 04                    7     .db 4 
   67AB 0D                    8     .db 13
   67AC 9D 3F                 9     .dw #_sys_ai_update_top_down 
   67AE 16 1F                10     .dw #_pradoRedBird
   67B0 00                   11     .db 0
   0BC8                     485 DefineEntity 4,  1,    2, 150,  1,     124,  4,  13, #_sys_ai_update_top_down,   #_pradoRedBird,      0   
   67B1 04                    1     .db 4
   67B2 01                    2     .db 1
   67B3 02                    3     .db 2
   67B4 96                    4     .db 150
   67B5 01                    5     .db 1
   67B6 7C                    6     .db 124
   67B7 04                    7     .db 4 
   67B8 0D                    8     .db 13
   67B9 9D 3F                 9     .dw #_sys_ai_update_top_down 
   67BB 16 1F                10     .dw #_pradoRedBird
   67BD 00                   11     .db 0
                            486 
   0BD5                     487 DefineEntity 2,   0,   0, 120, 1,     244,      6,   16,   0,                 #_bloque_halloween,    0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 144.
Hexadecimal [16-Bits]



   67BE 02                    1     .db 2
   67BF 00                    2     .db 0
   67C0 00                    3     .db 0
   67C1 78                    4     .db 120
   67C2 01                    5     .db 1
   67C3 F4                    6     .db 244
   67C4 06                    7     .db 6 
   67C5 10                    8     .db 16
   67C6 00 00                 9     .dw 0 
   67C8 EA 16                10     .dw #_bloque_halloween
   67CA 00                   11     .db 0
   0BE2                     488 DefineEntity 8,   0,   0, 110, 1,     244,      5,   10,     #_add_20_score,    #_bonus,     0  
   67CB 08                    1     .db 8
   67CC 00                    2     .db 0
   67CD 00                    3     .db 0
   67CE 6E                    4     .db 110
   67CF 01                    5     .db 1
   67D0 F4                    6     .db 244
   67D1 05                    7     .db 5 
   67D2 0A                    8     .db 10
   67D3 1F 46                 9     .dw #_add_20_score 
   67D5 D3 33                10     .dw #_bonus
   67D7 00                   11     .db 0
   0BEF                     489 DefineEntity 2,   0,   0, 120, 1,     248,      6,   16,   0,                 #_bloque_halloween,    0
   67D8 02                    1     .db 2
   67D9 00                    2     .db 0
   67DA 00                    3     .db 0
   67DB 78                    4     .db 120
   67DC 01                    5     .db 1
   67DD F8                    6     .db 248
   67DE 06                    7     .db 6 
   67DF 10                    8     .db 16
   67E0 00 00                 9     .dw 0 
   67E2 EA 16                10     .dw #_bloque_halloween
   67E4 00                   11     .db 0
                            490 
   0BFC                     491 DefineEntity 2,   0,   0, 130, 2,     40,      6,   16,   0,                 #_bloque_halloween,    0 ;;si no cuadra salto se come al enemigo
   67E5 02                    1     .db 2
   67E6 00                    2     .db 0
   67E7 00                    3     .db 0
   67E8 82                    4     .db 130
   67E9 02                    5     .db 2
   67EA 28                    6     .db 40
   67EB 06                    7     .db 6 
   67EC 10                    8     .db 16
   67ED 00 00                 9     .dw 0 
   67EF EA 16                10     .dw #_bloque_halloween
   67F1 00                   11     .db 0
                            492 ;DefineEntity 8,   0,   0, 154, 2,     42,      5,   10,     #_add_20_score,    #_bonus,     0  ;;si pilla el bonus se muere contra el cactus
   0C09                     493 DefineEntity 2,   0,   0, 130, 2,     44,      6,   16,   0,                 #_bloque_halloween,    0
   67F2 02                    1     .db 2
   67F3 00                    2     .db 0
   67F4 00                    3     .db 0
   67F5 82                    4     .db 130
   67F6 02                    5     .db 2
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 145.
Hexadecimal [16-Bits]



   67F7 2C                    6     .db 44
   67F8 06                    7     .db 6 
   67F9 10                    8     .db 16
   67FA 00 00                 9     .dw 0 
   67FC EA 16                10     .dw #_bloque_halloween
   67FE 00                   11     .db 0
   0C16                     494 DefineEntity 4,   0,   0, 138, 2,     56,      6,   16*2,   0,                 #_hallArbol2,    0
   67FF 04                    1     .db 4
   6800 00                    2     .db 0
   6801 00                    3     .db 0
   6802 8A                    4     .db 138
   6803 02                    5     .db 2
   6804 38                    6     .db 56
   6805 06                    7     .db 6 
   6806 20                    8     .db 16*2
   6807 00 00                 9     .dw 0 
   6809 E2 15                10     .dw #_hallArbol2
   680B 00                   11     .db 0
                            495 
   0C23                     496 DefineEntity 4,   0,   0, 106,  2,     80,   6,   16*4,   0,    #_hallArbol4,      0 
   680C 04                    1     .db 4
   680D 00                    2     .db 0
   680E 00                    3     .db 0
   680F 6A                    4     .db 106
   6810 02                    5     .db 2
   6811 50                    6     .db 80
   6812 06                    7     .db 6 
   6813 40                    8     .db 16*4
   6814 00 00                 9     .dw 0 
   6816 42 13                10     .dw #_hallArbol4
   6818 00                   11     .db 0
   0C30                     497 DefineEntity 4,  0,    1, 154,  2,     107,  4,     5,        0,          #_halloweenBird,      0 
   6819 04                    1     .db 4
   681A 00                    2     .db 0
   681B 01                    3     .db 1
   681C 9A                    4     .db 154
   681D 02                    5     .db 2
   681E 6B                    6     .db 107
   681F 04                    7     .db 4 
   6820 05                    8     .db 5
   6821 00 00                 9     .dw 0 
   6823 D6 16                10     .dw #_halloweenBird
   6825 00                   11     .db 0
   0C3D                     498 DefineEntity 4,   0,   0, 138,  2,     125,   6,   16*2,   0,    #_hallArbol2,      0 
   6826 04                    1     .db 4
   6827 00                    2     .db 0
   6828 00                    3     .db 0
   6829 8A                    4     .db 138
   682A 02                    5     .db 2
   682B 7D                    6     .db 125
   682C 06                    7     .db 6 
   682D 20                    8     .db 16*2
   682E 00 00                 9     .dw 0 
   6830 E2 15                10     .dw #_hallArbol2
   6832 00                   11     .db 0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 146.
Hexadecimal [16-Bits]



                            499 
   0C4A                     500 DefineEntity 2,  0,    0, 120, 2,     170,    6,  16,       0,                    #_bloque_desierto,  0
   6833 02                    1     .db 2
   6834 00                    2     .db 0
   6835 00                    3     .db 0
   6836 78                    4     .db 120
   6837 02                    5     .db 2
   6838 AA                    6     .db 170
   6839 06                    7     .db 6 
   683A 10                    8     .db 16
   683B 00 00                 9     .dw 0 
   683D 24 1B                10     .dw #_bloque_desierto
   683F 00                   11     .db 0
   0C57                     501 DefineEntity 8,  0,    0, 138, 2,     170,    6,  16*2,     0,       #_hallArbol2,            0 
   6840 08                    1     .db 8
   6841 00                    2     .db 0
   6842 00                    3     .db 0
   6843 8A                    4     .db 138
   6844 02                    5     .db 2
   6845 AA                    6     .db 170
   6846 06                    7     .db 6 
   6847 20                    8     .db 16*2
   6848 00 00                 9     .dw 0 
   684A E2 15                10     .dw #_hallArbol2
   684C 00                   11     .db 0
                            502 
   0C64                     503 DefineEntity 2,  0,    0, 80,  2,     200,    6,  16,     0,                    #_bloque_desierto,  0
   684D 02                    1     .db 2
   684E 00                    2     .db 0
   684F 00                    3     .db 0
   6850 50                    4     .db 80
   6851 02                    5     .db 2
   6852 C8                    6     .db 200
   6853 06                    7     .db 6 
   6854 10                    8     .db 16
   6855 00 00                 9     .dw 0 
   6857 24 1B                10     .dw #_bloque_desierto
   6859 00                   11     .db 0
   0C71                     504 DefineEntity 8,  0,    0, 30,  2,     230,    5,  10,     #_add_20_score,       #_bonus,            0 
   685A 08                    1     .db 8
   685B 00                    2     .db 0
   685C 00                    3     .db 0
   685D 1E                    4     .db 30
   685E 02                    5     .db 2
   685F E6                    6     .db 230
   6860 05                    7     .db 5 
   6861 0A                    8     .db 10
   6862 1F 46                 9     .dw #_add_20_score 
   6864 D3 33                10     .dw #_bonus
   6866 00                   11     .db 0
   0C7E                     505 DefineEntity 2,  0,    0, 40,  2,     230,    6,  16,     0,                    #_bloque_desierto,  0
   6867 02                    1     .db 2
   6868 00                    2     .db 0
   6869 00                    3     .db 0
   686A 28                    4     .db 40
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 147.
Hexadecimal [16-Bits]



   686B 02                    5     .db 2
   686C E6                    6     .db 230
   686D 06                    7     .db 6 
   686E 10                    8     .db 16
   686F 00 00                 9     .dw 0 
   6871 24 1B                10     .dw #_bloque_desierto
   6873 00                   11     .db 0
                            506 
   0C8B                     507 DefineEntity 4,   0,   0, 138,  3,     50,    6,   16*2,   0,                 #_hallArbol2,    0
   6874 04                    1     .db 4
   6875 00                    2     .db 0
   6876 00                    3     .db 0
   6877 8A                    4     .db 138
   6878 03                    5     .db 3
   6879 32                    6     .db 50
   687A 06                    7     .db 6 
   687B 20                    8     .db 16*2
   687C 00 00                 9     .dw 0 
   687E E2 15                10     .dw #_hallArbol2
   6880 00                   11     .db 0
   0C98                     508 DefineEntity 8,  0,    0, 120,  3,     52,    5,  10,     #_add_20_score,       #_bonus,            0 
   6881 08                    1     .db 8
   6882 00                    2     .db 0
   6883 00                    3     .db 0
   6884 78                    4     .db 120
   6885 03                    5     .db 3
   6886 34                    6     .db 52
   6887 05                    7     .db 5 
   6888 0A                    8     .db 10
   6889 1F 46                 9     .dw #_add_20_score 
   688B D3 33                10     .dw #_bonus
   688D 00                   11     .db 0
   0CA5                     509 DefineEntity 4,  0,    1, 154,  3,     70,    4,     5,        0,          #_halloweenBird,      0 
   688E 04                    1     .db 4
   688F 00                    2     .db 0
   6890 01                    3     .db 1
   6891 9A                    4     .db 154
   6892 03                    5     .db 3
   6893 46                    6     .db 70
   6894 04                    7     .db 4 
   6895 05                    8     .db 5
   6896 00 00                 9     .dw 0 
   6898 D6 16                10     .dw #_halloweenBird
   689A 00                   11     .db 0
                            510 
   0CB2                     511 DefineEntity 4,   0,   0, 106,  3,     120,    6,   16*4,   0,                 #_hallArbol4,    0
   689B 04                    1     .db 4
   689C 00                    2     .db 0
   689D 00                    3     .db 0
   689E 6A                    4     .db 106
   689F 03                    5     .db 3
   68A0 78                    6     .db 120
   68A1 06                    7     .db 6 
   68A2 40                    8     .db 16*4
   68A3 00 00                 9     .dw 0 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 148.
Hexadecimal [16-Bits]



   68A5 42 13                10     .dw #_hallArbol4
   68A7 00                   11     .db 0
                            512 
   0CBF                     513 DefineEntity 4,  1,    2, 150,  3,     170,  4,  13, #_sys_ai_update_top_down,   #_pradoRedBird,      0   
   68A8 04                    1     .db 4
   68A9 01                    2     .db 1
   68AA 02                    3     .db 2
   68AB 96                    4     .db 150
   68AC 03                    5     .db 3
   68AD AA                    6     .db 170
   68AE 04                    7     .db 4 
   68AF 0D                    8     .db 13
   68B0 9D 3F                 9     .dw #_sys_ai_update_top_down 
   68B2 16 1F                10     .dw #_pradoRedBird
   68B4 00                   11     .db 0
   0CCC                     514 DefineEntity 4,  1,    2, 150,  3,     200,  4,  13, #_sys_ai_update_top_down,   #_pradoRedBird,      0   
   68B5 04                    1     .db 4
   68B6 01                    2     .db 1
   68B7 02                    3     .db 2
   68B8 96                    4     .db 150
   68B9 03                    5     .db 3
   68BA C8                    6     .db 200
   68BB 04                    7     .db 4 
   68BC 0D                    8     .db 13
   68BD 9D 3F                 9     .dw #_sys_ai_update_top_down 
   68BF 16 1F                10     .dw #_pradoRedBird
   68C1 00                   11     .db 0
   0CD9                     515 DefineEntity 4,  1,    2, 150,  3,     230,  4,  13, #_sys_ai_update_top_down,   #_pradoRedBird,      0   
   68C2 04                    1     .db 4
   68C3 01                    2     .db 1
   68C4 02                    3     .db 2
   68C5 96                    4     .db 150
   68C6 03                    5     .db 3
   68C7 E6                    6     .db 230
   68C8 04                    7     .db 4 
   68C9 0D                    8     .db 13
   68CA 9D 3F                 9     .dw #_sys_ai_update_top_down 
   68CC 16 1F                10     .dw #_pradoRedBird
   68CE 00                   11     .db 0
                            516 
                            517 
   0CE6                     518 DefineEntity 16, 0,    0, 114,   4,    10,  6,  56, 0, #_endMapa, 0  
   68CF 10                    1     .db 16
   68D0 00                    2     .db 0
   68D1 00                    3     .db 0
   68D2 72                    4     .db 114
   68D3 04                    5     .db 4
   68D4 0A                    6     .db 10
   68D5 06                    7     .db 6 
   68D6 38                    8     .db 56
   68D7 00 00                 9     .dw 0 
   68D9 83 32                10     .dw #_endMapa
   68DB 00                   11     .db 0
   0CF3                     519 DefineEntity 16, 0,    0,   20,  4,    16,  1,  114,0, #_colisionFinal, 0
   68DC 10                    1     .db 16
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 149.
Hexadecimal [16-Bits]



   68DD 00                    2     .db 0
   68DE 00                    3     .db 0
   68DF 14                    4     .db 20
   68E0 04                    5     .db 4
   68E1 10                    6     .db 16
   68E2 01                    7     .db 1 
   68E3 72                    8     .db 114
   68E4 00 00                 9     .dw 0 
   68E6 11 32                10     .dw #_colisionFinal
   68E8 00                   11     .db 0
