ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 1.
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                              1 ;;####################################################################
                              2 ;;# GNU Free Documentation License                                   #
                              3 ;;# Version 1.3, 3 November 2008                                     #
                              4 ;;#                                                                  #
                              5 ;;# Copyright (C) 2021 Lumina                                        #
                              6 ;;# (Paula Garcia Morales, Laura Gil Lopez, Jorge Perez Dominguez)   #
                              7 ;;#                                                                  #
                              8 ;;# Everyone is permitted to copy and distribute verbatim copies     #
                              9 ;;# of this license document, but changing it is not allowed.        #
                             10 ;;####################################################################
                             11 
                             12 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 2.
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                             13 .include "cpctelera.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;; All CPCtelera include files
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 3.
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                             20 .include "macros/allmacros.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 4.
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                             19 .include "macros/cpct_maths.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Math Macros
                             21 ;;
                             22 ;;    Useful assembler macros for doing common math operations
                             23 ;;
                             24 
                             25 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             26 ;; Macro: add_REGPAIR_a 
                             27 ;;
                             28 ;;    Performs the operation REGPAIR = REGPAIR + A. REGPAIR is any given pair of 8-bit registers.
                             29 ;;
                             30 ;; ASM Definition:
                             31 ;;    .macro <add_REGPAIR_a> RH, RL
                             32 ;;
                             33 ;; Parameters:
                             34 ;;    RH    - Register 1 of the REGPAIR. Holds higher-byte value
                             35 ;;    RL    - Register 2 of the REGPAIR. Holds lower-byte value
                             36 ;; 
                             37 ;; Input Registers: 
                             38 ;;    RH:RL - 16-value used as left-operand and final storage for the sum
                             39 ;;    A     - Second sum operand
                             40 ;;
                             41 ;; Return Value:
                             42 ;;    RH:RL - Holds the sum of RH:RL + A
                             43 ;;
                             44 ;; Details:
                             45 ;;    This macro performs the sum of RH:RL + A and stores it directly on RH:RL.
                             46 ;; It uses only RH:RL and A to perform the operation.
                             47 ;;
                             48 ;; Modified Registers: 
                             49 ;;    A, RH, RL
                             50 ;;
                             51 ;; Required memory:
                             52 ;;    5 bytes
                             53 ;;
                             54 ;; Time Measures:
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 5.
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                             55 ;; (start code)
                             56 ;;  Case | microSecs(us) | CPU Cycles
                             57 ;; ------------------------------------
                             58 ;;  Any  |       5       |     20
                             59 ;; ------------------------------------
                             60 ;; (end code)
                             61 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             62 .macro add_REGPAIR_a rh, rl
                             63    ;; First Perform RH = E + A
                             64    add rl    ;; [1] A' = RL + A 
                             65    ld  rl, a ;; [1] RL' = A' = RL + A. It might generate Carry that must be added to RH
                             66    
                             67    ;; Then Perform RH = RH + Carry 
                             68    adc rh    ;; [1] A'' = A' + RH + Carry = RL + A + RH + Carry
                             69    sub rl    ;; [1] Remove RL'. A''' = A'' - RL' = RL + A + RH + Carry - (RL + A) = RH + Carry
                             70    ld  rh, a ;; [1] Save into RH (RH' = A''' = RH + Carry)
                             71 .endm
                             72 
                             73 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             74 ;; Macro: add_de_a
                             75 ;;
                             76 ;;    Performs the operation DE = DE + A
                             77 ;;
                             78 ;; ASM Definition:
                             79 ;;    .macro <add_de_a>
                             80 ;;
                             81 ;; Parameters:
                             82 ;;    None
                             83 ;; 
                             84 ;; Input Registers: 
                             85 ;;    DE    - First sum operand and Destination Register
                             86 ;;    A     - Second sum operand
                             87 ;;
                             88 ;; Return Value:
                             89 ;;    DE - Holds the sum of DE + A
                             90 ;;
                             91 ;; Details:
                             92 ;;    This macro performs the sum of DE + A and stores it directly on DE.
                             93 ;; It uses only DE and A to perform the operation.
                             94 ;;    This macro is a direct instantiation of the macro <add_REGPAIR_a>.
                             95 ;;
                             96 ;; Modified Registers: 
                             97 ;;    A, DE
                             98 ;;
                             99 ;; Required memory:
                            100 ;;    5 bytes
                            101 ;;
                            102 ;; Time Measures:
                            103 ;; (start code)
                            104 ;;  Case | microSecs(us) | CPU Cycles
                            105 ;; ------------------------------------
                            106 ;;  Any  |       5       |     20
                            107 ;; ------------------------------------
                            108 ;; (end code)
                            109 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 6.
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                            110 .macro add_de_a
                            111    add_REGPAIR_a  d, e
                            112 .endm
                            113 
                            114 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            115 ;; Macro: add_hl_a
                            116 ;;
                            117 ;;    Performs the operation HL = HL + A
                            118 ;;
                            119 ;; ASM Definition:
                            120 ;;    .macro <add_hl_a>
                            121 ;;
                            122 ;; Parameters:
                            123 ;;    None
                            124 ;; 
                            125 ;; Input Registers: 
                            126 ;;    HL    - First sum operand and Destination Register
                            127 ;;    A     - Second sum operand
                            128 ;;
                            129 ;; Return Value:
                            130 ;;    HL - Holds the sum of HL + A
                            131 ;;
                            132 ;; Details:
                            133 ;;    This macro performs the sum of HL + A and stores it directly on HL.
                            134 ;; It uses only HL and A to perform the operation.
                            135 ;;    This macro is a direct instantiation of the macro <add_REGPAIR_a>.
                            136 ;;
                            137 ;; Modified Registers: 
                            138 ;;    A, HL
                            139 ;;
                            140 ;; Required memory:
                            141 ;;    5 bytes
                            142 ;;
                            143 ;; Time Measures:
                            144 ;; (start code)
                            145 ;;  Case | microSecs(us) | CPU Cycles
                            146 ;; ------------------------------------
                            147 ;;  Any  |       5       |     20
                            148 ;; ------------------------------------
                            149 ;; (end code)
                            150 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            151 .macro add_hl_a
                            152    add_REGPAIR_a  h, l
                            153 .endm
                            154 
                            155 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            156 ;; Macro: add_bc_a
                            157 ;;
                            158 ;;    Performs the operation BC = BC + A
                            159 ;;
                            160 ;; ASM Definition:
                            161 ;;    .macro <add_bc_a>
                            162 ;;
                            163 ;; Parameters:
                            164 ;;    None
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 7.
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                            165 ;; 
                            166 ;; Input Registers: 
                            167 ;;    BC    - First sum operand and Destination Register
                            168 ;;    A     - Second sum operand
                            169 ;;
                            170 ;; Return Value:
                            171 ;;    BC - Holds the sum of BC + A
                            172 ;;
                            173 ;; Details:
                            174 ;;    This macro performs the sum of BC + A and stores it directly on BC.
                            175 ;; It uses only BC and A to perform the operation.
                            176 ;;    This macro is a direct instantiation of the macro <add_REGPAIR_a>.
                            177 ;;
                            178 ;; Modified Registers: 
                            179 ;;    A, BC
                            180 ;;
                            181 ;; Required memory:
                            182 ;;    5 bytes
                            183 ;;
                            184 ;; Time Measures:
                            185 ;; (start code)
                            186 ;;  Case | microSecs(us) | CPU Cycles
                            187 ;; ------------------------------------
                            188 ;;  Any  |       5       |     20
                            189 ;; ------------------------------------
                            190 ;; (end code)
                            191 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            192 .macro add_bc_a
                            193    add_REGPAIR_a  b, c
                            194 .endm
                            195 
                            196 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            197 ;; Macro: sub_REGPAIR_a 
                            198 ;;
                            199 ;;    Performs the operation REGPAIR = REGPAIR - A. REGPAIR is any given pair of 8-bit registers.
                            200 ;;
                            201 ;; ASM Definition:
                            202 ;;    .macro <sub_REGPAIR_a> RH, RL
                            203 ;;
                            204 ;; Parameters:
                            205 ;;    RH    - Register 1 of the REGPAIR. Holds higher-byte value
                            206 ;;    RL    - Register 2 of the REGPAIR. Holds lower-byte value
                            207 ;;  ?JMPLBL - Optional Jump label. A temporal one will be produced if none is given.
                            208 ;; 
                            209 ;; Input Registers: 
                            210 ;;    RH:RL - 16-value used as left-operand and final storage for the subtraction
                            211 ;;    A     - Second subtraction operand (A > 0)
                            212 ;;
                            213 ;; Preconditions:
                            214 ;;    A > 0 - Value in register A is considered to be unsigned and must be greater
                            215 ;;            than 0 for this macro to work properly.
                            216 ;;
                            217 ;; Return Value:
                            218 ;;    RH:RL - Holds the result of RH:RL - A
                            219 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 8.
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                            220 ;; Details:
                            221 ;;    This macro performs the subtraction of RH:RL - A and stores it directly on RH:RL.
                            222 ;; It uses only RH:RL and A to perform the operation.
                            223 ;;    With respect to the optional label ?JMPLBL, it is often better not to provide 
                            224 ;; this parameter. A temporal local symbol will be automatically generated for that label.
                            225 ;; Only provide it when you have a specific reason to do that.
                            226 ;;
                            227 ;; Modified Registers: 
                            228 ;;    A, RH, RL
                            229 ;;
                            230 ;; Required memory:
                            231 ;;    7 bytes
                            232 ;;
                            233 ;; Time Measures:
                            234 ;; (start code)
                            235 ;;  Case | microSecs(us) | CPU Cycles
                            236 ;; ------------------------------------
                            237 ;;  Any  |       7       |     28
                            238 ;; ------------------------------------
                            239 ;; (end code)
                            240 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            241 .macro sub_REGPAIR_a rh, rl, ?jmplbl
                            242    ;; First Perform A' = A - 1 - RL 
                            243    ;; (Inverse subtraction minus 1, used  to test for Carry, needed to know when to subtract 1 from RH)
                            244    dec    a          ;; [1] --A (In case A == RL, inverse subtraction should produce carry not to decrement RH)
                            245    sub   rl          ;; [1] A' = A - 1 - RL
                            246    jr     c, jmplbl  ;; [2/3] If A <= RL, Carry will be produced, and no decrement of RH is required, so jump over it
                            247      dec   rh        ;; [1] --RH (A > RL, so RH must be decremented)
                            248 jmplbl:   
                            249    ;; Now invert A to get the subtraction we wanted 
                            250    ;; { RL' = -A' - 1 = -(A - 1 - RL) - 1 = RL - A }
                            251    cpl            ;; [1] A'' = RL - A (Original subtraction we wanted, calculated trough one's complement of A')
                            252    ld    rl, a    ;; [1] Save into RL (RL' = RL - A)
                            253 .endm
                            254 
                            255 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            256 ;; Macro: sub_de_a 
                            257 ;;
                            258 ;;    Performs the operation DE = DE - A. DE is any given pair of 8-bit registers.
                            259 ;;
                            260 ;; ASM Definition:
                            261 ;;    .macro <sub_de_a>
                            262 ;; 
                            263 ;; Input Registers: 
                            264 ;;    DE - 16-value used as left-operand and final storage for the subtraction
                            265 ;;    A  - Second subtraction operand
                            266 ;;
                            267 ;; Return Value:
                            268 ;;    DE - Holds the result of DE - A
                            269 ;;
                            270 ;; Details:
                            271 ;;    This macro performs the subtraction of DE - A and stores it directly on DE.
                            272 ;; It uses only DE and A to perform the operation.
                            273 ;;
                            274 ;; Modified Registers: 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 9.
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                            275 ;;    A, DE
                            276 ;;
                            277 ;; Required memory:
                            278 ;;    7 bytes
                            279 ;;
                            280 ;; Time Measures:
                            281 ;; (start code)
                            282 ;;  Case | microSecs(us) | CPU Cycles
                            283 ;; ------------------------------------
                            284 ;;  Any  |       7       |     28
                            285 ;; ------------------------------------
                            286 ;; (end code)
                            287 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            288 .macro sub_de_a
                            289    sub_REGPAIR_a  d, e
                            290 .endm
                            291 
                            292 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            293 ;; Macro: sub_hl_a 
                            294 ;;
                            295 ;;    Performs the operation HL = HL - A. HL is any given pair of 8-bit registers.
                            296 ;;
                            297 ;; ASM Definition:
                            298 ;;    .macro <sub_hl_a>
                            299 ;; 
                            300 ;; Input Registers: 
                            301 ;;    HL - 16-value used as left-operand and final storage for the subtraction
                            302 ;;    A  - Second subtraction operand
                            303 ;;
                            304 ;; Return Value:
                            305 ;;    HL - Holds the result of HL - A
                            306 ;;
                            307 ;; Details:
                            308 ;;    This macro performs the subtraction of HL - A and stores it directly on HL.
                            309 ;; It uses only HL and A to perform the operation.
                            310 ;;
                            311 ;; Modified Registers: 
                            312 ;;    A, HL
                            313 ;;
                            314 ;; Required memory:
                            315 ;;    7 bytes
                            316 ;;
                            317 ;; Time Measures:
                            318 ;; (start code)
                            319 ;;  Case | microSecs(us) | CPU Cycles
                            320 ;; ------------------------------------
                            321 ;;  Any  |       7       |     28
                            322 ;; ------------------------------------
                            323 ;; (end code)
                            324 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            325 .macro sub_hl_a
                            326    sub_REGPAIR_a  h, l
                            327 .endm
                            328 
                            329 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 10.
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                            330 ;; Macro: sub_bc_a 
                            331 ;;
                            332 ;;    Performs the operation BC = BC - A. BC is any given pair of 8-bit registers.
                            333 ;;
                            334 ;; ASM Definition:
                            335 ;;    .macro <sub_bc_a>
                            336 ;; 
                            337 ;; Input Registers: 
                            338 ;;    BC - 16-value used as left-operand and final storage for the subtraction
                            339 ;;    A  - Second subtraction operand
                            340 ;;
                            341 ;; Return Value:
                            342 ;;    BC - Holds the result of BC - A
                            343 ;;
                            344 ;; Details:
                            345 ;;    This macro performs the subtraction of BC - A and stores it directly on BC.
                            346 ;; It uses only BC and A to perform the operation.
                            347 ;;
                            348 ;; Modified Registers: 
                            349 ;;    A, BC
                            350 ;;
                            351 ;; Required memory:
                            352 ;;    7 bytes
                            353 ;;
                            354 ;; Time Measures:
                            355 ;; (start code)
                            356 ;;  Case | microSecs(us) | CPU Cycles
                            357 ;; ------------------------------------
                            358 ;;  Any  |       7       |     28
                            359 ;; ------------------------------------
                            360 ;; (end code)
                            361 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            362 .macro sub_bc_a
                            363    sub_REGPAIR_a  b, c
                            364 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 11.
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                             20 .include "macros/cpct_opcodeConstants.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2016 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Opcodes
                             21 ;;
                             22 ;;    Constant definitions of Z80 opcodes. This will be normally used as data
                             23 ;; for self-modifying code.
                             24 ;;
                             25 
                             26 ;; Constant: opc_JR
                             27 ;;    Opcode for "JR xx" instruction. Requires 1-byte parameter (xx)
                     0018    28 opc_JR   = 0x18
                             29 
                             30 ;; Constant: opc_LD_D
                             31 ;;    Opcode for "LD d, xx" instruction. Requires 1-byte parameter (xx)
                     0016    32 opc_LD_D = 0x16
                             33 
                             34 ;; Constant: opc_EI
                             35 ;;    Opcode for "EI" instruction. 
                     00FB    36 opc_EI = 0xFB
                             37 
                             38 ;; Constant: opc_DI
                             39 ;;    Opcode for "DI" instruction. 
                     00F3    40 opc_DI = 0xF3
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 12.
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                             21 .include "macros/cpct_reverseBits.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2016 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Reverse Bits
                             21 ;;
                             22 ;;    Useful macros for bit reversing and selecting in different ways. Only
                             23 ;; valid to be used from assembly language (not from C).
                             24 ;;
                             25 
                             26 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             27 ;; Macro: cpctm_reverse_and_select_bits_of_A
                             28 ;;
                             29 ;;    Reorders the bits of A and mixes them letting the user select the 
                             30 ;; new order for the bits by using a selection mask.
                             31 ;;
                             32 ;; Parameters:
                             33 ;;    TReg          - An 8-bits register that will be used for intermediate calculations.
                             34 ;; This register may be one of these: B, C, D, E, H, L
                             35 ;;    SelectionMask - An 8-bits mask that will be used to select the bits to get from 
                             36 ;; the reordered bits. It might be an 8-bit register or even (hl).
                             37 ;; 
                             38 ;; Input Registers: 
                             39 ;;    A     - Byte to be reversed
                             40 ;;    TReg  - Should have a copy of A (same exact value)
                             41 ;;
                             42 ;; Return Value:
                             43 ;;    A - Resulting value with bits reversed and selected 
                             44 ;;
                             45 ;; Details:
                             46 ;;    This macro reorders the bits in A and mixes them with the same bits in
                             47 ;; their original order by using a *SelectionMask*. The process is as follows:
                             48 ;;
                             49 ;;    1. Consider the 8 bits of A = TReg = [01234567]
                             50 ;;    2. Reorder the 8 bits of A, producing A2 = [32547610]
                             51 ;;    2. Reorder the bits of TReg, producing TReg2 = [76103254]
                             52 ;;    3. Combines both reorders into final result using a *SelectionMask*. Each 
                             53 ;; 0 bit from the selection mask means "select bit from A2", whereas each 1 bit
                             54 ;; means "select bit from TReg2".
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 13.
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                             55 ;;
                             56 ;;    For instance, a selection mask 0b11001100 will produce this result:
                             57 ;;
                             58 ;; (start code)
                             59 ;;       A2 = [ 32 54 76 10 ]
                             60 ;;    TReg2 = [ 76 10 32 54 ]
                             61 ;;  SelMask = [ 11 00 11 00 ] // 1 = TReg2-bits, 0 = A2-bits
                             62 ;;  ---------------------------
                             63 ;;   Result = [ 76 54 32 10 ]
                             64 ;; (end code)
                             65 ;;
                             66 ;;    Therefore, mask 0b11001100 produces the effect of reversing the bits of A
                             67 ;; completely. Other masks will produce different reorders of the bits in A, for
                             68 ;; different requirements or needs.
                             69 ;;
                             70 ;; Modified Registers: 
                             71 ;;    AF, TReg
                             72 ;;
                             73 ;; Required memory:
                             74 ;;    16 bytes
                             75 ;;
                             76 ;; Time Measures:
                             77 ;; (start code)
                             78 ;;  Case | microSecs(us) | CPU Cycles
                             79 ;; ------------------------------------
                             80 ;;  Any  |      16       |     64
                             81 ;; ------------------------------------
                             82 ;; (end code)
                             83 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             84 .macro cpctm_reverse_and_select_bits_of_A  TReg, SelectionMask
                             85    rlca            ;; [1] | Rotate left twice so that...
                             86    rlca            ;; [1] | ... A=[23456701]
                             87 
                             88    ;; Mix bits of TReg and A so that all bits are in correct relative order
                             89    ;; but displaced from their final desired location
                             90    xor TReg        ;; [1] TReg = [01234567] (original value)
                             91    and #0b01010101 ;; [2]    A = [23456701] (bits rotated twice left)
                             92    xor TReg        ;; [1]   A2 = [03254761] (TReg mixed with A to get bits in order)
                             93    
                             94    ;; Now get bits 54 and 10 in their right location and save them into TReg
                             95    rlca            ;; [1]    A = [ 32 54 76 10 ] (54 and 10 are in their desired place)
                             96    ld TReg, a      ;; [1] TReg = A (Save this bit location into TReg)
                             97    
                             98    ;; Now get bits 76 and 32 in their right location in A
                             99    rrca            ;; [1] | Rotate A right 4 times to...
                            100    rrca            ;; [1] | ... get bits 76 and 32 located at their ...
                            101    rrca            ;; [1] | ... desired location :
                            102    rrca            ;; [1] | ... A = [ 76 10 32 54 ] (76 and 32 are in their desired place)
                            103    
                            104    ;; Finally, mix bits from TReg and A to get all bits reversed and selected
                            105    xor TReg          ;; [1] TReg = [32547610] (Mixed bits with 54 & 10 in their right place)
                            106    and SelectionMask ;; [2]    A = [76103254] (Mixed bits with 76 & 32 in their right place)
                            107    xor TReg          ;; [1]   A2 = [xxxxxxxx] final value: bits of A reversed and selected using *SelectionMask*
                            108 .endm
                            109 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 14.
Hexadecimal [16-Bits]



                            110 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            111 ;; Macro: cpctm_reverse_bits_of_A 
                            112 ;; Macro: cpctm_reverse_mode_2_pixels_of_A
                            113 ;;
                            114 ;;    Reverses the 8-bits of A, from [01234567] to [76543210]. This also reverses
                            115 ;; all pixels contained in A when A is in screen pixel format, mode 2.
                            116 ;;
                            117 ;; Parameters:
                            118 ;;    TReg - An 8-bits register that will be used for intermediate calculations.
                            119 ;; This register may be one of these: B, C, D, E, H, L
                            120 ;; 
                            121 ;; Input Registers: 
                            122 ;;    A    - Byte to be reversed
                            123 ;;    TReg - Should have a copy of A (same exact value)
                            124 ;;
                            125 ;; Return Value:
                            126 ;;    A - Resulting value with bits reversed 
                            127 ;;
                            128 ;; Requires:
                            129 ;;   - Uses the macro <cpctm_reverse_and_select_bits_of_A>.
                            130 ;;
                            131 ;; Details:
                            132 ;;    This macro reverses the bits in A. If bits of A = [01234567], the final
                            133 ;; result after processing this macro will be A = [76543210]. Register TReg is
                            134 ;; used for intermediate calculations and its value is destroyed.
                            135 ;;
                            136 ;; Modified Registers: 
                            137 ;;    AF, TReg
                            138 ;;
                            139 ;; Required memory:
                            140 ;;    16 bytes
                            141 ;;
                            142 ;; Time Measures:
                            143 ;; (start code)
                            144 ;;  Case | microSecs(us) | CPU Cycles
                            145 ;; ------------------------------------
                            146 ;;  Any  |      16       |     64
                            147 ;; ------------------------------------
                            148 ;; (end code)
                            149 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            150 .macro cpctm_reverse_bits_of_A  TReg
                            151    cpctm_reverse_and_select_bits_of_A  TReg, #0b11001100
                            152 .endm
                            153 .macro cpctm_reverse_mode_2_pixels_of_A   TReg
                            154    cpctm_reverse_bits_of_A  TReg
                            155 .endm
                            156 
                            157 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            158 ;; Macro: cpctm_reverse_mode_1_pixels_of_A
                            159 ;;
                            160 ;;    Reverses the order of pixel values contained in register A, assuming A is 
                            161 ;; in screen pixel format, mode 1.
                            162 ;;
                            163 ;; Parameters:
                            164 ;;    TReg - An 8-bits register that will be used for intermediate calculations.
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 15.
Hexadecimal [16-Bits]



                            165 ;; This register may be one of these: B, C, D, E, H, L
                            166 ;; 
                            167 ;; Input Registers: 
                            168 ;;    A    - Byte with pixel values to be reversed
                            169 ;;    TReg - Should have a copy of A (same exact value)
                            170 ;;
                            171 ;; Return Value:
                            172 ;;    A - Resulting byte with the 4 pixels values reversed in order
                            173 ;;
                            174 ;; Requires:
                            175 ;;   - Uses the macro <cpctm_reverse_and_select_bits_of_A>.
                            176 ;;
                            177 ;; Details:
                            178 ;;    This macro considers that A contains a byte that codifies 4 pixels in 
                            179 ;; screen pixel format, mode 1. It modifies A to reverse the order of its 4 
                            180 ;; contained pixel values left-to-right (1234 -> 4321). With respect to the 
                            181 ;; order of the 8-bits of A, the concrete operations performed is:
                            182 ;; (start code)
                            183 ;;    A = [01234567] == reverse-pixels ==> [32107654] = A2
                            184 ;; (end code)
                            185 ;;    You may want to check <cpct_px2byteM1> to know how bits codify both pixels
                            186 ;; in one single byte for screen pixel format, mode 1.
                            187 ;;
                            188 ;;    *TReg* is an 8-bit register that will be used for intermediate calculations,
                            189 ;; destroying its original value (that should be same as A, at the start).
                            190 ;;
                            191 ;; Modified Registers: 
                            192 ;;    AF, TReg
                            193 ;;
                            194 ;; Required memory:
                            195 ;;    16 bytes
                            196 ;;
                            197 ;; Time Measures:
                            198 ;; (start code)
                            199 ;;  Case | microSecs(us) | CPU Cycles
                            200 ;; ------------------------------------
                            201 ;;  Any  |      16       |     64
                            202 ;; ------------------------------------
                            203 ;; (end code)
                            204 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            205 .macro cpctm_reverse_mode_1_pixels_of_A  TReg
                            206    cpctm_reverse_and_select_bits_of_A  TReg, #0b00110011
                            207 .endm
                            208 
                            209 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            210 ;; Macro: cpctm_reverse_mode_0_pixels_of_A
                            211 ;;
                            212 ;;    Reverses the order of pixel values contained in register A, assuming A is 
                            213 ;; in screen pixel format, mode 0.
                            214 ;;
                            215 ;; Parameters:
                            216 ;;    TReg - An 8-bits register that will be used for intermediate calculations.
                            217 ;; This register may be one of these: B, C, D, E, H, L
                            218 ;; 
                            219 ;; Input Registers: 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 16.
Hexadecimal [16-Bits]



                            220 ;;    A    - Byte with pixel values to be reversed
                            221 ;;    TReg - Should have a copy of A (same exact value)
                            222 ;;
                            223 ;; Return Value:
                            224 ;;    A - Resulting byte with the 2 pixels values reversed in order
                            225 ;;
                            226 ;; Details:
                            227 ;;    This macro considers that A contains a byte that codifies 2 pixels in 
                            228 ;; screen pixel format, mode 0. It modifies A to reverse the order of its 2 
                            229 ;; contained pixel values left-to-right (12 -> 21). With respect to the 
                            230 ;; order of the 8-bits of A, the concrete operation performed is:
                            231 ;; (start code)
                            232 ;;    A = [01234567] == reverse-pixels ==> [10325476] = A2
                            233 ;; (end code)
                            234 ;;    You may want to check <cpct_px2byteM0> to know how bits codify both pixels
                            235 ;; in one single byte for screen pixel format, mode 0.
                            236 ;;
                            237 ;;    *TReg* is an 8-bit register that will be used for intermediate calculations,
                            238 ;; destroying its original value (that should be same as A, at the start).
                            239 ;;
                            240 ;; Modified Registers: 
                            241 ;;    AF, TReg
                            242 ;;
                            243 ;; Required memory:
                            244 ;;    7 bytes
                            245 ;;
                            246 ;; Time Measures:
                            247 ;; (start code)
                            248 ;;  Case | microSecs(us) | CPU Cycles
                            249 ;; ------------------------------------
                            250 ;;  Any  |       7       |     28
                            251 ;; ------------------------------------
                            252 ;; (end code)
                            253 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            254 .macro cpctm_reverse_mode_0_pixels_of_A  TReg
                            255    rlca            ;; [1] | Rotate A twice to the left to get bits ordered...
                            256    rlca            ;; [1] | ... in the way we need for mixing, A = [23456701]
                            257   
                            258    ;; Mix TReg with A to get pixels reversed by reordering bits
                            259    xor TReg        ;; [1] | TReg = [01234567]
                            260    and #0b01010101 ;; [2] |    A = [23456701]
                            261    xor TReg        ;; [1] |   A2 = [03254761]
                            262    rrca            ;; [1] Rotate right to get pixels reversed A = [10325476]
                            263 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 17.
Hexadecimal [16-Bits]



                             22 .include "macros/cpct_undocumentedOpcodes.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Undocumented Opcodes
                             21 ;;
                             22 ;;    Macros to clarify source code when using undocumented opcodes. Only
                             23 ;; valid to be used from assembly language (not from C).
                             24 ;;
                             25 
                             26 ;; Macro: jr__0
                             27 ;;    Opcode for "JR #0" instruction
                             28 ;; 
                             29 .mdelete jr__0
                             30 .macro jr__0
                             31    .DW #0x0018  ;; JR #00 (Normally used as a modifiable jump, as jr 0 is an infinite loop)
                             32 .endm
                             33 
                             34 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             35 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             36 ;; SLL Instructions
                             37 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             38 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             39 
                             40 ;; Macro: sll__b
                             41 ;;    Opcode for "SLL b" instruction
                             42 ;; 
                             43 .mdelete sll__b
                             44 .macro sll__b
                             45    .db #0xCB, #0x30  ;; Opcode for sll b
                             46 .endm
                             47 
                             48 ;; Macro: sll__c
                             49 ;;    Opcode for "SLL c" instruction
                             50 ;; 
                             51 .mdelete sll__c
                             52 .macro sll__c
                             53    .db #0xCB, #0x31  ;; Opcode for sll c
                             54 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 18.
Hexadecimal [16-Bits]



                             55 
                             56 ;; Macro: sll__d
                             57 ;;    Opcode for "SLL d" instruction
                             58 ;; 
                             59 .mdelete sll__d
                             60 .macro sll__d
                             61    .db #0xCB, #0x32  ;; Opcode for sll d
                             62 .endm
                             63 
                             64 ;; Macro: sll__e
                             65 ;;    Opcode for "SLL e" instruction
                             66 ;; 
                             67 .mdelete sll__e
                             68 .macro sll__e
                             69    .db #0xCB, #0x33  ;; Opcode for sll e
                             70 .endm
                             71 
                             72 ;; Macro: sll__h
                             73 ;;    Opcode for "SLL h" instruction
                             74 ;; 
                             75 .mdelete sll__h
                             76 .macro sll__h
                             77    .db #0xCB, #0x34  ;; Opcode for sll h
                             78 .endm
                             79 
                             80 ;; Macro: sll__l
                             81 ;;    Opcode for "SLL l" instruction
                             82 ;; 
                             83 .mdelete sll__l
                             84 .macro sll__l
                             85    .db #0xCB, #0x35  ;; Opcode for sll l
                             86 .endm
                             87 
                             88 ;; Macro: sll___hl_
                             89 ;;    Opcode for "SLL (hl)" instruction
                             90 ;; 
                             91 .mdelete sll___hl_
                             92 .macro sll___hl_
                             93    .db #0xCB, #0x36  ;; Opcode for sll (hl)
                             94 .endm
                             95 
                             96 ;; Macro: sll__a
                             97 ;;    Opcode for "SLL a" instruction
                             98 ;; 
                             99 .mdelete sll__a
                            100 .macro sll__a
                            101    .db #0xCB, #0x37  ;; Opcode for sll a
                            102 .endm
                            103 
                            104 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            105 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            106 ;; IXL Related Macros
                            107 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            108 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            109 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 19.
Hexadecimal [16-Bits]



                            110 ;; Macro: ld__ixl    Value
                            111 ;;    Opcode for "LD ixl, Value" instruction
                            112 ;;  
                            113 ;; Parameters:
                            114 ;;    Value - An inmediate 8-bits value that will be loaded into ixl
                            115 ;; 
                            116 .mdelete ld__ixl
                            117 .macro ld__ixl    Value 
                            118    .db #0xDD, #0x2E, Value  ;; Opcode for ld ixl, Value
                            119 .endm
                            120 
                            121 ;; Macro: ld__ixl_a
                            122 ;;    Opcode for "LD ixl, a" instruction
                            123 ;; 
                            124 .mdelete ld__ixl_a
                            125 .macro ld__ixl_a
                            126    .dw #0x6FDD  ;; Opcode for ld ixl, a
                            127 .endm
                            128 
                            129 ;; Macro: ld__ixl_b
                            130 ;;    Opcode for "LD ixl, B" instruction
                            131 ;; 
                            132 .mdelete ld__ixl_b
                            133 .macro ld__ixl_b
                            134    .dw #0x68DD  ;; Opcode for ld ixl, b
                            135 .endm
                            136 
                            137 ;; Macro: ld__ixl_c
                            138 ;;    Opcode for "LD ixl, C" instruction
                            139 ;; 
                            140 .mdelete ld__ixl_c
                            141 .macro ld__ixl_c
                            142    .dw #0x69DD  ;; Opcode for ld ixl, c
                            143 .endm
                            144 
                            145 ;; Macro: ld__ixl_d
                            146 ;;    Opcode for "LD ixl, D" instruction
                            147 ;; 
                            148 .mdelete ld__ixl_d
                            149 .macro ld__ixl_d
                            150    .dw #0x6ADD  ;; Opcode for ld ixl, d
                            151 .endm
                            152 
                            153 ;; Macro: ld__ixl_e
                            154 ;;    Opcode for "LD ixl, E" instruction
                            155 ;; 
                            156 .mdelete ld__ixl_e
                            157 .macro ld__ixl_e
                            158    .dw #0x6BDD  ;; Opcode for ld ixl, e
                            159 .endm
                            160 
                            161 ;; Macro: ld__ixl_ixh
                            162 ;;    Opcode for "LD ixl, IXH" instruction
                            163 ;; 
                            164 .mdelete  ld__ixl_ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 20.
Hexadecimal [16-Bits]



                            165 .macro ld__ixl_ixh
                            166    .dw #0x6CDD  ;; Opcode for ld ixl, ixh
                            167 .endm
                            168 
                            169 ;; Macro: ld__a_ixl
                            170 ;;    Opcode for "LD A, ixl" instruction
                            171 ;; 
                            172 .mdelete ld__a_ixl
                            173 .macro ld__a_ixl
                            174    .dw #0x7DDD  ;; Opcode for ld a, ixl
                            175 .endm
                            176 
                            177 ;; Macro: ld__b_ixl
                            178 ;;    Opcode for "LD B, ixl" instruction
                            179 ;; 
                            180 .mdelete ld__b_ixl
                            181 .macro ld__b_ixl
                            182    .dw #0x45DD  ;; Opcode for ld b, ixl
                            183 .endm
                            184 
                            185 ;; Macro: ld__c_ixl
                            186 ;;    Opcode for "LD c, ixl" instruction
                            187 ;; 
                            188 .mdelete ld__c_ixl
                            189 .macro ld__c_ixl
                            190    .dw #0x4DDD  ;; Opcode for ld c, ixl
                            191 .endm
                            192 
                            193 ;; Macro: ld__d_ixl
                            194 ;;    Opcode for "LD D, ixl" instruction
                            195 ;; 
                            196 .mdelete ld__d_ixl
                            197 .macro ld__d_ixl
                            198    .dw #0x55DD  ;; Opcode for ld d, ixl
                            199 .endm
                            200 
                            201 ;; Macro: ld__e_ixl
                            202 ;;    Opcode for "LD e, ixl" instruction
                            203 ;; 
                            204 .mdelete ld__e_ixl
                            205 .macro ld__e_ixl
                            206    .dw #0x5DDD  ;; Opcode for ld e, ixl
                            207 .endm
                            208 
                            209 ;; Macro: add__ixl
                            210 ;;    Opcode for "Add ixl" instruction
                            211 ;; 
                            212 .mdelete add__ixl
                            213 .macro add__ixl
                            214    .dw #0x85DD  ;; Opcode for add ixl
                            215 .endm
                            216 
                            217 ;; Macro: sub__ixl
                            218 ;;    Opcode for "SUB ixl" instruction
                            219 ;; 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 21.
Hexadecimal [16-Bits]



                            220 .mdelete sub__ixl
                            221 .macro sub__ixl
                            222    .dw #0x95DD  ;; Opcode for sub ixl
                            223 .endm
                            224 
                            225 ;; Macro: adc__ixl
                            226 ;;    Opcode for "ADC ixl" instruction
                            227 ;; 
                            228 .mdelete adc__ixl
                            229 .macro adc__ixl
                            230    .dw #0x8DDD  ;; Opcode for adc ixl
                            231 .endm
                            232 
                            233 ;; Macro: sbc__ixl
                            234 ;;    Opcode for "SBC ixl" instruction
                            235 ;; 
                            236 .mdelete sbc__ixl
                            237 .macro sbc__ixl
                            238    .dw #0x9DDD  ;; Opcode for sbc ixl
                            239 .endm
                            240 
                            241 ;; Macro: and__ixl
                            242 ;;    Opcode for "AND ixl" instruction
                            243 ;; 
                            244 .mdelete and__ixl
                            245 .macro and__ixl
                            246    .dw #0xA5DD  ;; Opcode for and ixl
                            247 .endm
                            248 
                            249 ;; Macro: or__ixl
                            250 ;;    Opcode for "OR ixl" instruction
                            251 ;; 
                            252 .mdelete or__ixl
                            253 .macro or__ixl
                            254    .dw #0xB5DD  ;; Opcode for or ixl
                            255 .endm
                            256 
                            257 ;; Macro: xor__ixl
                            258 ;;    Opcode for "XOR ixl" instruction
                            259 ;; 
                            260 .mdelete xor__ixl
                            261 .macro xor__ixl
                            262    .dw #0xADDD  ;; Opcode for xor ixl
                            263 .endm
                            264 
                            265 ;; Macro: cp__ixl
                            266 ;;    Opcode for "CP ixl" instruction
                            267 ;; 
                            268 .mdelete cp__ixl
                            269 .macro cp__ixl
                            270    .dw #0xBDDD  ;; Opcode for cp ixl
                            271 .endm
                            272 
                            273 ;; Macro: dec__ixl
                            274 ;;    Opcode for "DEC ixl" instruction
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 22.
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                            275 ;; 
                            276 .mdelete dec__ixl
                            277 .macro dec__ixl
                            278    .dw #0x2DDD  ;; Opcode for dec ixl
                            279 .endm
                            280 
                            281 ;; Macro: inc__ixl
                            282 ;;    Opcode for "INC ixl" instruction
                            283 ;; 
                            284 .mdelete inc__ixl
                            285 .macro inc__ixl
                            286    .dw #0x2CDD  ;; Opcode for inc ixl
                            287 .endm
                            288 
                            289 
                            290 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            291 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            292 ;; IXH Related Macros
                            293 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            294 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            295 
                            296 ;; Macro: ld__ixh    Value
                            297 ;;    Opcode for "LD IXH, Value" instruction
                            298 ;;  
                            299 ;; Parameters:
                            300 ;;    Value - An inmediate 8-bits value that will be loaded into IXH
                            301 ;; 
                            302 .mdelete  ld__ixh
                            303 .macro ld__ixh    Value 
                            304    .db #0xDD, #0x26, Value  ;; Opcode for ld ixh, Value
                            305 .endm
                            306 
                            307 ;; Macro: ld__ixh_a
                            308 ;;    Opcode for "LD IXH, a" instruction
                            309 ;; 
                            310 .mdelete ld__ixh_a
                            311 .macro ld__ixh_a
                            312    .dw #0x67DD  ;; Opcode for ld ixh, a
                            313 .endm
                            314 
                            315 ;; Macro: ld__ixh_b
                            316 ;;    Opcode for "LD IXH, B" instruction
                            317 ;; 
                            318 .mdelete ld__ixh_b
                            319 .macro ld__ixh_b
                            320    .dw #0x60DD  ;; Opcode for ld ixh, b
                            321 .endm
                            322 
                            323 ;; Macro: ld__ixh_c
                            324 ;;    Opcode for "LD IXH, C" instruction
                            325 ;; 
                            326 .mdelete ld__ixh_c
                            327 .macro ld__ixh_c
                            328    .dw #0x61DD  ;; Opcode for ld ixh, c
                            329 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 23.
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                            330 
                            331 ;; Macro: ld__ixh_d
                            332 ;;    Opcode for "LD IXH, D" instruction
                            333 ;; 
                            334 .mdelete ld__ixh_d
                            335 .macro ld__ixh_d
                            336    .dw #0x62DD  ;; Opcode for ld ixh, d
                            337 .endm
                            338 
                            339 ;; Macro: ld__ixh_e
                            340 ;;    Opcode for "LD IXH, E" instruction
                            341 ;; 
                            342 .mdelete ld__ixh_e
                            343 .macro ld__ixh_e
                            344    .dw #0x63DD  ;; Opcode for ld ixh, e
                            345 .endm
                            346 
                            347 ;; Macro: ld__ixh_ixl
                            348 ;;    Opcode for "LD IXH, IXL" instruction
                            349 ;; 
                            350 .mdelete ld__ixh_ixl
                            351 .macro ld__ixh_ixl
                            352    .dw #0x65DD  ;; Opcode for ld ixh, ixl
                            353 .endm
                            354 
                            355 ;; Macro: ld__a_ixh
                            356 ;;    Opcode for "LD A, IXH" instruction
                            357 ;; 
                            358 .mdelete ld__a_ixh
                            359 .macro ld__a_ixh
                            360    .dw #0x7CDD  ;; Opcode for ld a, ixh
                            361 .endm
                            362 
                            363 ;; Macro: ld__b_ixh
                            364 ;;    Opcode for "LD B, IXH" instruction
                            365 ;; 
                            366 .mdelete ld__b_ixh
                            367 .macro ld__b_ixh
                            368    .dw #0x44DD  ;; Opcode for ld b, ixh
                            369 .endm
                            370 
                            371 ;; Macro: ld__c_ixh
                            372 ;;    Opcode for "LD c, IXH" instruction
                            373 ;; 
                            374 .mdelete ld__c_ixh
                            375 .macro ld__c_ixh
                            376    .dw #0x4CDD  ;; Opcode for ld c, ixh
                            377 .endm
                            378 
                            379 ;; Macro: ld__d_ixh
                            380 ;;    Opcode for "LD D, IXH" instruction
                            381 ;; 
                            382 .mdelete ld__d_ixh
                            383 .macro ld__d_ixh
                            384    .dw #0x54DD  ;; Opcode for ld d, ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 24.
Hexadecimal [16-Bits]



                            385 .endm
                            386 
                            387 ;; Macro: ld__e_ixh
                            388 ;;    Opcode for "LD e, IXH" instruction
                            389 ;; 
                            390 .mdelete ld__e_ixh
                            391 .macro ld__e_ixh
                            392    .dw #0x5CDD  ;; Opcode for ld e, ixh
                            393 .endm
                            394 
                            395 ;; Macro: add__ixh
                            396 ;;    Opcode for "ADD IXH" instruction
                            397 ;; 
                            398 .mdelete add__ixh
                            399 .macro add__ixh
                            400    .dw #0x84DD  ;; Opcode for add ixh
                            401 .endm
                            402 
                            403 ;; Macro: sub__ixh
                            404 ;;    Opcode for "SUB IXH" instruction
                            405 ;; 
                            406 .mdelete sub__ixh
                            407 .macro sub__ixh
                            408    .dw #0x94DD  ;; Opcode for sub ixh
                            409 .endm
                            410 
                            411 ;; Macro: adc__ixh
                            412 ;;    Opcode for "ADC IXH" instruction
                            413 ;; 
                            414 .mdelete adc__ixh
                            415 .macro adc__ixh
                            416    .dw #0x8CDD  ;; Opcode for adc ixh
                            417 .endm
                            418 
                            419 ;; Macro: sbc__ixh
                            420 ;;    Opcode for "SBC IXH" instruction
                            421 ;; 
                            422 .mdelete sbc__ixh
                            423 .macro sbc__ixh
                            424    .dw #0x9CDD  ;; Opcode for sbc ixh
                            425 .endm
                            426 
                            427 ;; Macro: and__ixh
                            428 ;;    Opcode for "AND IXH" instruction
                            429 ;; 
                            430 .mdelete and__ixh
                            431 .macro and__ixh
                            432    .dw #0xA4DD  ;; Opcode for and ixh
                            433 .endm
                            434 
                            435 ;; Macro: or__ixh
                            436 ;;    Opcode for "OR IXH" instruction
                            437 ;; 
                            438 .mdelete or__ixh
                            439 .macro or__ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 25.
Hexadecimal [16-Bits]



                            440    .dw #0xB4DD  ;; Opcode for or ixh
                            441 .endm
                            442 
                            443 ;; Macro: xor__ixh
                            444 ;;    Opcode for "XOR IXH" instruction
                            445 ;; 
                            446 .mdelete xor__ixh
                            447 .macro xor__ixh
                            448    .dw #0xACDD  ;; Opcode for xor ixh
                            449 .endm
                            450 
                            451 ;; Macro: cp__ixh
                            452 ;;    Opcode for "CP IXH" instruction
                            453 ;; 
                            454 .mdelete cp__ixh
                            455 .macro cp__ixh
                            456    .dw #0xBCDD  ;; Opcode for cp ixh
                            457 .endm
                            458 
                            459 ;; Macro: dec__ixh
                            460 ;;    Opcode for "DEC IXH" instruction
                            461 ;; 
                            462 .mdelete dec__ixh
                            463 .macro dec__ixh
                            464    .dw #0x25DD  ;; Opcode for dec ixh
                            465 .endm
                            466 
                            467 ;; Macro: inc__ixh
                            468 ;;    Opcode for "INC IXH" instruction
                            469 ;; 
                            470 .mdelete inc__ixh
                            471 .macro inc__ixh
                            472    .dw #0x24DD  ;; Opcode for inc ixh
                            473 .endm
                            474 
                            475 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            476 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            477 ;; IYL Related Macros
                            478 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            479 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            480 
                            481 ;; Macro: ld__iyl    Value
                            482 ;;    Opcode for "LD iyl, Value" instruction
                            483 ;;  
                            484 ;; Parameters:
                            485 ;;    Value - An inmediate 8-bits value that will be loaded into iyl
                            486 ;; 
                            487 .mdelete  ld__iyl
                            488 .macro ld__iyl    Value 
                            489    .db #0xFD, #0x2E, Value  ;; Opcode for ld iyl, Value
                            490 .endm
                            491 
                            492 ;; Macro: ld__iyl_a
                            493 ;;    Opcode for "LD iyl, a" instruction
                            494 ;; 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 26.
Hexadecimal [16-Bits]



                            495 .mdelete ld__iyl_a
                            496 .macro ld__iyl_a
                            497    .dw #0x6FFD  ;; Opcode for ld iyl, a
                            498 .endm
                            499 
                            500 ;; Macro: ld__iyl_b
                            501 ;;    Opcode for "LD iyl, B" instruction
                            502 ;; 
                            503 .mdelete ld__iyl_b
                            504 .macro ld__iyl_b
                            505    .dw #0x68FD  ;; Opcode for ld iyl, b
                            506 .endm
                            507 
                            508 ;; Macro: ld__iyl_c
                            509 ;;    Opcode for "LD iyl, C" instruction
                            510 ;; 
                            511 .mdelete ld__iyl_c
                            512 .macro ld__iyl_c
                            513    .dw #0x69FD  ;; Opcode for ld iyl, c
                            514 .endm
                            515 
                            516 ;; Macro: ld__iyl_d
                            517 ;;    Opcode for "LD iyl, D" instruction
                            518 ;; 
                            519 .mdelete ld__iyl_d
                            520 .macro ld__iyl_d
                            521    .dw #0x6AFD  ;; Opcode for ld iyl, d
                            522 .endm
                            523 
                            524 ;; Macro: ld__iyl_e
                            525 ;;    Opcode for "LD iyl, E" instruction
                            526 ;; 
                            527 .mdelete ld__iyl_e
                            528 .macro ld__iyl_e
                            529    .dw #0x6BFD  ;; Opcode for ld iyl, e
                            530 .endm
                            531 
                            532 ;; Macro: ld__iyl_iyh
                            533 ;;    Opcode for "LD iyl, IXL" instruction
                            534 ;; 
                            535 .mdelete  ld__iyl_iyh
                            536 .macro ld__iyl_iyh
                            537    .dw #0x6CFD  ;; Opcode for ld iyl, ixl
                            538 .endm
                            539 
                            540 ;; Macro: ld__a_iyl
                            541 ;;    Opcode for "LD A, iyl" instruction
                            542 ;; 
                            543 .mdelete ld__a_iyl
                            544 .macro ld__a_iyl
                            545    .dw #0x7DFD  ;; Opcode for ld a, iyl
                            546 .endm
                            547 
                            548 ;; Macro: ld__b_iyl
                            549 ;;    Opcode for "LD B, iyl" instruction
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 27.
Hexadecimal [16-Bits]



                            550 ;; 
                            551 .mdelete ld__b_iyl
                            552 .macro ld__b_iyl
                            553    .dw #0x45FD  ;; Opcode for ld b, iyl
                            554 .endm
                            555 
                            556 ;; Macro: ld__c_iyl
                            557 ;;    Opcode for "LD c, iyl" instruction
                            558 ;; 
                            559 .mdelete ld__c_iyl
                            560 .macro ld__c_iyl
                            561    .dw #0x4DFD  ;; Opcode for ld c, iyl
                            562 .endm
                            563 
                            564 ;; Macro: ld__d_iyl
                            565 ;;    Opcode for "LD D, iyl" instruction
                            566 ;; 
                            567 .mdelete ld__d_iyl
                            568 .macro ld__d_iyl
                            569    .dw #0x55FD  ;; Opcode for ld d, iyl
                            570 .endm
                            571 
                            572 ;; Macro: ld__e_iyl
                            573 ;;    Opcode for "LD e, iyl" instruction
                            574 ;; 
                            575 .mdelete ld__e_iyl
                            576 .macro ld__e_iyl
                            577    .dw #0x5DFD  ;; Opcode for ld e, iyl
                            578 .endm
                            579 
                            580 ;; Macro: add__iyl
                            581 ;;    Opcode for "Add iyl" instruction
                            582 ;; 
                            583 .mdelete add__iyl
                            584 .macro add__iyl
                            585    .dw #0x85FD  ;; Opcode for add iyl
                            586 .endm
                            587 
                            588 ;; Macro: sub__iyl
                            589 ;;    Opcode for "SUB iyl" instruction
                            590 ;; 
                            591 .mdelete sub__iyl
                            592 .macro sub__iyl
                            593    .dw #0x95FD  ;; Opcode for sub iyl
                            594 .endm
                            595 
                            596 ;; Macro: adc__iyl
                            597 ;;    Opcode for "ADC iyl" instruction
                            598 ;; 
                            599 .mdelete adc__iyl
                            600 .macro adc__iyl
                            601    .dw #0x8DFD  ;; Opcode for adc iyl
                            602 .endm
                            603 
                            604 ;; Macro: sbc__iyl
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 28.
Hexadecimal [16-Bits]



                            605 ;;    Opcode for "SBC iyl" instruction
                            606 ;; 
                            607 .mdelete sbc__iyl
                            608 .macro sbc__iyl
                            609    .dw #0x9DFD  ;; Opcode for sbc iyl
                            610 .endm
                            611 
                            612 ;; Macro: and__iyl
                            613 ;;    Opcode for "AND iyl" instruction
                            614 ;; 
                            615 .mdelete and__iyl
                            616 .macro and__iyl
                            617    .dw #0xA5FD  ;; Opcode for and iyl
                            618 .endm
                            619 
                            620 ;; Macro: or__iyl
                            621 ;;    Opcode for "OR iyl" instruction
                            622 ;; 
                            623 .mdelete or__iyl
                            624 .macro or__iyl
                            625    .dw #0xB5FD  ;; Opcode for or iyl
                            626 .endm
                            627 
                            628 ;; Macro: xor__iyl
                            629 ;;    Opcode for "XOR iyl" instruction
                            630 ;; 
                            631 .mdelete xor__iyl
                            632 .macro xor__iyl
                            633    .dw #0xADFD  ;; Opcode for xor iyl
                            634 .endm
                            635 
                            636 ;; Macro: cp__iyl
                            637 ;;    Opcode for "CP iyl" instruction
                            638 ;; 
                            639 .mdelete cp__iyl
                            640 .macro cp__iyl
                            641    .dw #0xBDFD  ;; Opcode for cp iyl
                            642 .endm
                            643 
                            644 ;; Macro: dec__iyl
                            645 ;;    Opcode for "DEC iyl" instruction
                            646 ;; 
                            647 .mdelete dec__iyl
                            648 .macro dec__iyl
                            649    .dw #0x2DFD  ;; Opcode for dec iyl
                            650 .endm
                            651 
                            652 ;; Macro: inc__iyl
                            653 ;;    Opcode for "INC iyl" instruction
                            654 ;; 
                            655 .mdelete inc__iyl
                            656 .macro inc__iyl
                            657    .dw #0x2CFD  ;; Opcode for inc iyl
                            658 .endm
                            659 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 29.
Hexadecimal [16-Bits]



                            660 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            661 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            662 ;; IYH Related Macros
                            663 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            664 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            665 
                            666 ;; Macro: ld__iyh    Value
                            667 ;;    Opcode for "LD iyh, Value" instruction
                            668 ;;  
                            669 ;; Parameters:
                            670 ;;    Value - An inmediate 8-bits value that will be loaded into iyh
                            671 ;; 
                            672 .mdelete  ld__iyh
                            673 .macro ld__iyh    Value 
                            674    .db #0xFD, #0x26, Value  ;; Opcode for ld iyh, Value
                            675 .endm
                            676 
                            677 ;; Macro: ld__iyh_a
                            678 ;;    Opcode for "LD iyh, a" instruction
                            679 ;; 
                            680 .mdelete ld__iyh_a
                            681 .macro ld__iyh_a
                            682    .dw #0x67FD  ;; Opcode for ld iyh, a
                            683 .endm
                            684 
                            685 ;; Macro: ld__iyh_b
                            686 ;;    Opcode for "LD iyh, B" instruction
                            687 ;; 
                            688 .mdelete ld__iyh_b
                            689 .macro ld__iyh_b
                            690    .dw #0x60FD  ;; Opcode for ld iyh, b
                            691 .endm
                            692 
                            693 ;; Macro: ld__iyh_c
                            694 ;;    Opcode for "LD iyh, C" instruction
                            695 ;; 
                            696 .mdelete ld__iyh_c
                            697 .macro ld__iyh_c
                            698    .dw #0x61FD  ;; Opcode for ld iyh, c
                            699 .endm
                            700 
                            701 ;; Macro: ld__iyh_d
                            702 ;;    Opcode for "LD iyh, D" instruction
                            703 ;; 
                            704 .mdelete ld__iyh_d
                            705 .macro ld__iyh_d
                            706    .dw #0x62FD  ;; Opcode for ld iyh, d
                            707 .endm
                            708 
                            709 ;; Macro: ld__iyh_e
                            710 ;;    Opcode for "LD iyh, E" instruction
                            711 ;; 
                            712 .mdelete ld__iyh_e
                            713 .macro ld__iyh_e
                            714    .dw #0x63FD  ;; Opcode for ld iyh, e
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 30.
Hexadecimal [16-Bits]



                            715 .endm
                            716 
                            717 ;; Macro: ld__iyh_iyl
                            718 ;;    Opcode for "LD iyh, IyL" instruction
                            719 ;; 
                            720 .mdelete  ld__iyh_iyl
                            721 .macro ld__iyh_iyl
                            722    .dw #0x65FD  ;; Opcode for ld iyh, iyl
                            723 .endm
                            724 
                            725 ;; Macro: ld__a_iyh
                            726 ;;    Opcode for "LD A, iyh" instruction
                            727 ;; 
                            728 .mdelete ld__a_iyh
                            729 .macro ld__a_iyh
                            730    .dw #0x7CFD  ;; Opcode for ld a, iyh
                            731 .endm
                            732 
                            733 ;; Macro: ld__b_iyh
                            734 ;;    Opcode for "LD B, iyh" instruction
                            735 ;; 
                            736 .mdelete ld__b_iyh
                            737 .macro ld__b_iyh
                            738    .dw #0x44FD  ;; Opcode for ld b, iyh
                            739 .endm
                            740 
                            741 ;; Macro: ld__c_iyh
                            742 ;;    Opcode for "LD c, iyh" instruction
                            743 ;; 
                            744 .mdelete ld__c_iyh
                            745 .macro ld__c_iyh
                            746    .dw #0x4CFD  ;; Opcode for ld c, iyh
                            747 .endm
                            748 
                            749 ;; Macro: ld__d_iyh
                            750 ;;    Opcode for "LD D, iyh" instruction
                            751 ;; 
                            752 .mdelete ld__d_iyh
                            753 .macro ld__d_iyh
                            754    .dw #0x54FD  ;; Opcode for ld d, iyh
                            755 .endm
                            756 
                            757 ;; Macro: ld__e_iyh
                            758 ;;    Opcode for "LD e, iyh" instruction
                            759 ;; 
                            760 .mdelete ld__e_iyh
                            761 .macro ld__e_iyh
                            762    .dw #0x5CFD  ;; Opcode for ld e, iyh
                            763 .endm
                            764 
                            765 ;; Macro: add__iyh
                            766 ;;    Opcode for "Add iyh" instruction
                            767 ;; 
                            768 .mdelete add__iyh
                            769 .macro add__iyh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 31.
Hexadecimal [16-Bits]



                            770    .dw #0x84FD  ;; Opcode for add iyh
                            771 .endm
                            772 
                            773 ;; Macro: sub__iyh
                            774 ;;    Opcode for "SUB iyh" instruction
                            775 ;; 
                            776 .mdelete sub__iyh
                            777 .macro sub__iyh
                            778    .dw #0x94FD  ;; Opcode for sub iyh
                            779 .endm
                            780 
                            781 ;; Macro: adc__iyh
                            782 ;;    Opcode for "ADC iyh" instruction
                            783 ;; 
                            784 .mdelete adc__iyh
                            785 .macro adc__iyh
                            786    .dw #0x8CFD  ;; Opcode for adc iyh
                            787 .endm
                            788 
                            789 ;; Macro: sbc__iyh
                            790 ;;    Opcode for "SBC iyh" instruction
                            791 ;; 
                            792 .mdelete sbc__iyh
                            793 .macro sbc__iyh
                            794    .dw #0x9CFD  ;; Opcode for sbc iyh
                            795 .endm
                            796 
                            797 ;; Macro: and__iyh
                            798 ;;    Opcode for "AND iyh" instruction
                            799 ;; 
                            800 .mdelete and__iyh
                            801 .macro and__iyh
                            802    .dw #0xA4FD  ;; Opcode for and iyh
                            803 .endm
                            804 
                            805 ;; Macro: or__iyh
                            806 ;;    Opcode for "OR iyh" instruction
                            807 ;; 
                            808 .mdelete or__iyh
                            809 .macro or__iyh
                            810    .dw #0xB4FD  ;; Opcode for or iyh
                            811 .endm
                            812 
                            813 ;; Macro: xor__iyh
                            814 ;;    Opcode for "XOR iyh" instruction
                            815 ;; 
                            816 .mdelete xor__iyh
                            817 .macro xor__iyh
                            818    .dw #0xACFD  ;; Opcode for xor iyh
                            819 .endm
                            820 
                            821 ;; Macro: cp__iyh
                            822 ;;    Opcode for "CP iyh" instruction
                            823 ;; 
                            824 .mdelete cp__iyh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 32.
Hexadecimal [16-Bits]



                            825 .macro cp__iyh
                            826    .dw #0xBCFD  ;; Opcode for cp iyh
                            827 .endm
                            828 
                            829 ;; Macro: dec__iyh
                            830 ;;    Opcode for "DEC iyh" instruction
                            831 ;; 
                            832 .mdelete dec__iyh
                            833 .macro dec__iyh
                            834    .dw #0x25FD  ;; Opcode for dec iyh
                            835 .endm
                            836 
                            837 ;; Macro: inc__iyh
                            838 ;;    Opcode for "INC iyh" instruction
                            839 ;; 
                            840 .mdelete inc__iyh
                            841 .macro inc__iyh
                            842    .dw #0x24FD  ;; Opcode for inc iyh
                            843 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 33.
Hexadecimal [16-Bits]



                             23 .include "macros/cpct_combinedOperations.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Combined operations
                             21 ;;
                             22 ;;    Macros to clarify source code that combine several operations in one macro.
                             23 ;; For instance, macros to copy HL to DE or IX to DE, that require 2 or more 
                             24 ;; instructions but are commonly used.
                             25 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 34.
Hexadecimal [16-Bits]



                             26 .include "macros/cpct_undocumentedOpcodes.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Undocumented Opcodes
                             21 ;;
                             22 ;;    Macros to clarify source code when using undocumented opcodes. Only
                             23 ;; valid to be used from assembly language (not from C).
                             24 ;;
                             25 
                             26 ;; Macro: jr__0
                             27 ;;    Opcode for "JR #0" instruction
                             28 ;; 
                             29 .mdelete jr__0
                             30 .macro jr__0
                             31    .DW #0x0018  ;; JR #00 (Normally used as a modifiable jump, as jr 0 is an infinite loop)
                             32 .endm
                             33 
                             34 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             35 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             36 ;; SLL Instructions
                             37 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             38 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             39 
                             40 ;; Macro: sll__b
                             41 ;;    Opcode for "SLL b" instruction
                             42 ;; 
                             43 .mdelete sll__b
                             44 .macro sll__b
                             45    .db #0xCB, #0x30  ;; Opcode for sll b
                             46 .endm
                             47 
                             48 ;; Macro: sll__c
                             49 ;;    Opcode for "SLL c" instruction
                             50 ;; 
                             51 .mdelete sll__c
                             52 .macro sll__c
                             53    .db #0xCB, #0x31  ;; Opcode for sll c
                             54 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 35.
Hexadecimal [16-Bits]



                             55 
                             56 ;; Macro: sll__d
                             57 ;;    Opcode for "SLL d" instruction
                             58 ;; 
                             59 .mdelete sll__d
                             60 .macro sll__d
                             61    .db #0xCB, #0x32  ;; Opcode for sll d
                             62 .endm
                             63 
                             64 ;; Macro: sll__e
                             65 ;;    Opcode for "SLL e" instruction
                             66 ;; 
                             67 .mdelete sll__e
                             68 .macro sll__e
                             69    .db #0xCB, #0x33  ;; Opcode for sll e
                             70 .endm
                             71 
                             72 ;; Macro: sll__h
                             73 ;;    Opcode for "SLL h" instruction
                             74 ;; 
                             75 .mdelete sll__h
                             76 .macro sll__h
                             77    .db #0xCB, #0x34  ;; Opcode for sll h
                             78 .endm
                             79 
                             80 ;; Macro: sll__l
                             81 ;;    Opcode for "SLL l" instruction
                             82 ;; 
                             83 .mdelete sll__l
                             84 .macro sll__l
                             85    .db #0xCB, #0x35  ;; Opcode for sll l
                             86 .endm
                             87 
                             88 ;; Macro: sll___hl_
                             89 ;;    Opcode for "SLL (hl)" instruction
                             90 ;; 
                             91 .mdelete sll___hl_
                             92 .macro sll___hl_
                             93    .db #0xCB, #0x36  ;; Opcode for sll (hl)
                             94 .endm
                             95 
                             96 ;; Macro: sll__a
                             97 ;;    Opcode for "SLL a" instruction
                             98 ;; 
                             99 .mdelete sll__a
                            100 .macro sll__a
                            101    .db #0xCB, #0x37  ;; Opcode for sll a
                            102 .endm
                            103 
                            104 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            105 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            106 ;; IXL Related Macros
                            107 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            108 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            109 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 36.
Hexadecimal [16-Bits]



                            110 ;; Macro: ld__ixl    Value
                            111 ;;    Opcode for "LD ixl, Value" instruction
                            112 ;;  
                            113 ;; Parameters:
                            114 ;;    Value - An inmediate 8-bits value that will be loaded into ixl
                            115 ;; 
                            116 .mdelete ld__ixl
                            117 .macro ld__ixl    Value 
                            118    .db #0xDD, #0x2E, Value  ;; Opcode for ld ixl, Value
                            119 .endm
                            120 
                            121 ;; Macro: ld__ixl_a
                            122 ;;    Opcode for "LD ixl, a" instruction
                            123 ;; 
                            124 .mdelete ld__ixl_a
                            125 .macro ld__ixl_a
                            126    .dw #0x6FDD  ;; Opcode for ld ixl, a
                            127 .endm
                            128 
                            129 ;; Macro: ld__ixl_b
                            130 ;;    Opcode for "LD ixl, B" instruction
                            131 ;; 
                            132 .mdelete ld__ixl_b
                            133 .macro ld__ixl_b
                            134    .dw #0x68DD  ;; Opcode for ld ixl, b
                            135 .endm
                            136 
                            137 ;; Macro: ld__ixl_c
                            138 ;;    Opcode for "LD ixl, C" instruction
                            139 ;; 
                            140 .mdelete ld__ixl_c
                            141 .macro ld__ixl_c
                            142    .dw #0x69DD  ;; Opcode for ld ixl, c
                            143 .endm
                            144 
                            145 ;; Macro: ld__ixl_d
                            146 ;;    Opcode for "LD ixl, D" instruction
                            147 ;; 
                            148 .mdelete ld__ixl_d
                            149 .macro ld__ixl_d
                            150    .dw #0x6ADD  ;; Opcode for ld ixl, d
                            151 .endm
                            152 
                            153 ;; Macro: ld__ixl_e
                            154 ;;    Opcode for "LD ixl, E" instruction
                            155 ;; 
                            156 .mdelete ld__ixl_e
                            157 .macro ld__ixl_e
                            158    .dw #0x6BDD  ;; Opcode for ld ixl, e
                            159 .endm
                            160 
                            161 ;; Macro: ld__ixl_ixh
                            162 ;;    Opcode for "LD ixl, IXH" instruction
                            163 ;; 
                            164 .mdelete  ld__ixl_ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 37.
Hexadecimal [16-Bits]



                            165 .macro ld__ixl_ixh
                            166    .dw #0x6CDD  ;; Opcode for ld ixl, ixh
                            167 .endm
                            168 
                            169 ;; Macro: ld__a_ixl
                            170 ;;    Opcode for "LD A, ixl" instruction
                            171 ;; 
                            172 .mdelete ld__a_ixl
                            173 .macro ld__a_ixl
                            174    .dw #0x7DDD  ;; Opcode for ld a, ixl
                            175 .endm
                            176 
                            177 ;; Macro: ld__b_ixl
                            178 ;;    Opcode for "LD B, ixl" instruction
                            179 ;; 
                            180 .mdelete ld__b_ixl
                            181 .macro ld__b_ixl
                            182    .dw #0x45DD  ;; Opcode for ld b, ixl
                            183 .endm
                            184 
                            185 ;; Macro: ld__c_ixl
                            186 ;;    Opcode for "LD c, ixl" instruction
                            187 ;; 
                            188 .mdelete ld__c_ixl
                            189 .macro ld__c_ixl
                            190    .dw #0x4DDD  ;; Opcode for ld c, ixl
                            191 .endm
                            192 
                            193 ;; Macro: ld__d_ixl
                            194 ;;    Opcode for "LD D, ixl" instruction
                            195 ;; 
                            196 .mdelete ld__d_ixl
                            197 .macro ld__d_ixl
                            198    .dw #0x55DD  ;; Opcode for ld d, ixl
                            199 .endm
                            200 
                            201 ;; Macro: ld__e_ixl
                            202 ;;    Opcode for "LD e, ixl" instruction
                            203 ;; 
                            204 .mdelete ld__e_ixl
                            205 .macro ld__e_ixl
                            206    .dw #0x5DDD  ;; Opcode for ld e, ixl
                            207 .endm
                            208 
                            209 ;; Macro: add__ixl
                            210 ;;    Opcode for "Add ixl" instruction
                            211 ;; 
                            212 .mdelete add__ixl
                            213 .macro add__ixl
                            214    .dw #0x85DD  ;; Opcode for add ixl
                            215 .endm
                            216 
                            217 ;; Macro: sub__ixl
                            218 ;;    Opcode for "SUB ixl" instruction
                            219 ;; 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 38.
Hexadecimal [16-Bits]



                            220 .mdelete sub__ixl
                            221 .macro sub__ixl
                            222    .dw #0x95DD  ;; Opcode for sub ixl
                            223 .endm
                            224 
                            225 ;; Macro: adc__ixl
                            226 ;;    Opcode for "ADC ixl" instruction
                            227 ;; 
                            228 .mdelete adc__ixl
                            229 .macro adc__ixl
                            230    .dw #0x8DDD  ;; Opcode for adc ixl
                            231 .endm
                            232 
                            233 ;; Macro: sbc__ixl
                            234 ;;    Opcode for "SBC ixl" instruction
                            235 ;; 
                            236 .mdelete sbc__ixl
                            237 .macro sbc__ixl
                            238    .dw #0x9DDD  ;; Opcode for sbc ixl
                            239 .endm
                            240 
                            241 ;; Macro: and__ixl
                            242 ;;    Opcode for "AND ixl" instruction
                            243 ;; 
                            244 .mdelete and__ixl
                            245 .macro and__ixl
                            246    .dw #0xA5DD  ;; Opcode for and ixl
                            247 .endm
                            248 
                            249 ;; Macro: or__ixl
                            250 ;;    Opcode for "OR ixl" instruction
                            251 ;; 
                            252 .mdelete or__ixl
                            253 .macro or__ixl
                            254    .dw #0xB5DD  ;; Opcode for or ixl
                            255 .endm
                            256 
                            257 ;; Macro: xor__ixl
                            258 ;;    Opcode for "XOR ixl" instruction
                            259 ;; 
                            260 .mdelete xor__ixl
                            261 .macro xor__ixl
                            262    .dw #0xADDD  ;; Opcode for xor ixl
                            263 .endm
                            264 
                            265 ;; Macro: cp__ixl
                            266 ;;    Opcode for "CP ixl" instruction
                            267 ;; 
                            268 .mdelete cp__ixl
                            269 .macro cp__ixl
                            270    .dw #0xBDDD  ;; Opcode for cp ixl
                            271 .endm
                            272 
                            273 ;; Macro: dec__ixl
                            274 ;;    Opcode for "DEC ixl" instruction
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 39.
Hexadecimal [16-Bits]



                            275 ;; 
                            276 .mdelete dec__ixl
                            277 .macro dec__ixl
                            278    .dw #0x2DDD  ;; Opcode for dec ixl
                            279 .endm
                            280 
                            281 ;; Macro: inc__ixl
                            282 ;;    Opcode for "INC ixl" instruction
                            283 ;; 
                            284 .mdelete inc__ixl
                            285 .macro inc__ixl
                            286    .dw #0x2CDD  ;; Opcode for inc ixl
                            287 .endm
                            288 
                            289 
                            290 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            291 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            292 ;; IXH Related Macros
                            293 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            294 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            295 
                            296 ;; Macro: ld__ixh    Value
                            297 ;;    Opcode for "LD IXH, Value" instruction
                            298 ;;  
                            299 ;; Parameters:
                            300 ;;    Value - An inmediate 8-bits value that will be loaded into IXH
                            301 ;; 
                            302 .mdelete  ld__ixh
                            303 .macro ld__ixh    Value 
                            304    .db #0xDD, #0x26, Value  ;; Opcode for ld ixh, Value
                            305 .endm
                            306 
                            307 ;; Macro: ld__ixh_a
                            308 ;;    Opcode for "LD IXH, a" instruction
                            309 ;; 
                            310 .mdelete ld__ixh_a
                            311 .macro ld__ixh_a
                            312    .dw #0x67DD  ;; Opcode for ld ixh, a
                            313 .endm
                            314 
                            315 ;; Macro: ld__ixh_b
                            316 ;;    Opcode for "LD IXH, B" instruction
                            317 ;; 
                            318 .mdelete ld__ixh_b
                            319 .macro ld__ixh_b
                            320    .dw #0x60DD  ;; Opcode for ld ixh, b
                            321 .endm
                            322 
                            323 ;; Macro: ld__ixh_c
                            324 ;;    Opcode for "LD IXH, C" instruction
                            325 ;; 
                            326 .mdelete ld__ixh_c
                            327 .macro ld__ixh_c
                            328    .dw #0x61DD  ;; Opcode for ld ixh, c
                            329 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 40.
Hexadecimal [16-Bits]



                            330 
                            331 ;; Macro: ld__ixh_d
                            332 ;;    Opcode for "LD IXH, D" instruction
                            333 ;; 
                            334 .mdelete ld__ixh_d
                            335 .macro ld__ixh_d
                            336    .dw #0x62DD  ;; Opcode for ld ixh, d
                            337 .endm
                            338 
                            339 ;; Macro: ld__ixh_e
                            340 ;;    Opcode for "LD IXH, E" instruction
                            341 ;; 
                            342 .mdelete ld__ixh_e
                            343 .macro ld__ixh_e
                            344    .dw #0x63DD  ;; Opcode for ld ixh, e
                            345 .endm
                            346 
                            347 ;; Macro: ld__ixh_ixl
                            348 ;;    Opcode for "LD IXH, IXL" instruction
                            349 ;; 
                            350 .mdelete ld__ixh_ixl
                            351 .macro ld__ixh_ixl
                            352    .dw #0x65DD  ;; Opcode for ld ixh, ixl
                            353 .endm
                            354 
                            355 ;; Macro: ld__a_ixh
                            356 ;;    Opcode for "LD A, IXH" instruction
                            357 ;; 
                            358 .mdelete ld__a_ixh
                            359 .macro ld__a_ixh
                            360    .dw #0x7CDD  ;; Opcode for ld a, ixh
                            361 .endm
                            362 
                            363 ;; Macro: ld__b_ixh
                            364 ;;    Opcode for "LD B, IXH" instruction
                            365 ;; 
                            366 .mdelete ld__b_ixh
                            367 .macro ld__b_ixh
                            368    .dw #0x44DD  ;; Opcode for ld b, ixh
                            369 .endm
                            370 
                            371 ;; Macro: ld__c_ixh
                            372 ;;    Opcode for "LD c, IXH" instruction
                            373 ;; 
                            374 .mdelete ld__c_ixh
                            375 .macro ld__c_ixh
                            376    .dw #0x4CDD  ;; Opcode for ld c, ixh
                            377 .endm
                            378 
                            379 ;; Macro: ld__d_ixh
                            380 ;;    Opcode for "LD D, IXH" instruction
                            381 ;; 
                            382 .mdelete ld__d_ixh
                            383 .macro ld__d_ixh
                            384    .dw #0x54DD  ;; Opcode for ld d, ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 41.
Hexadecimal [16-Bits]



                            385 .endm
                            386 
                            387 ;; Macro: ld__e_ixh
                            388 ;;    Opcode for "LD e, IXH" instruction
                            389 ;; 
                            390 .mdelete ld__e_ixh
                            391 .macro ld__e_ixh
                            392    .dw #0x5CDD  ;; Opcode for ld e, ixh
                            393 .endm
                            394 
                            395 ;; Macro: add__ixh
                            396 ;;    Opcode for "ADD IXH" instruction
                            397 ;; 
                            398 .mdelete add__ixh
                            399 .macro add__ixh
                            400    .dw #0x84DD  ;; Opcode for add ixh
                            401 .endm
                            402 
                            403 ;; Macro: sub__ixh
                            404 ;;    Opcode for "SUB IXH" instruction
                            405 ;; 
                            406 .mdelete sub__ixh
                            407 .macro sub__ixh
                            408    .dw #0x94DD  ;; Opcode for sub ixh
                            409 .endm
                            410 
                            411 ;; Macro: adc__ixh
                            412 ;;    Opcode for "ADC IXH" instruction
                            413 ;; 
                            414 .mdelete adc__ixh
                            415 .macro adc__ixh
                            416    .dw #0x8CDD  ;; Opcode for adc ixh
                            417 .endm
                            418 
                            419 ;; Macro: sbc__ixh
                            420 ;;    Opcode for "SBC IXH" instruction
                            421 ;; 
                            422 .mdelete sbc__ixh
                            423 .macro sbc__ixh
                            424    .dw #0x9CDD  ;; Opcode for sbc ixh
                            425 .endm
                            426 
                            427 ;; Macro: and__ixh
                            428 ;;    Opcode for "AND IXH" instruction
                            429 ;; 
                            430 .mdelete and__ixh
                            431 .macro and__ixh
                            432    .dw #0xA4DD  ;; Opcode for and ixh
                            433 .endm
                            434 
                            435 ;; Macro: or__ixh
                            436 ;;    Opcode for "OR IXH" instruction
                            437 ;; 
                            438 .mdelete or__ixh
                            439 .macro or__ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 42.
Hexadecimal [16-Bits]



                            440    .dw #0xB4DD  ;; Opcode for or ixh
                            441 .endm
                            442 
                            443 ;; Macro: xor__ixh
                            444 ;;    Opcode for "XOR IXH" instruction
                            445 ;; 
                            446 .mdelete xor__ixh
                            447 .macro xor__ixh
                            448    .dw #0xACDD  ;; Opcode for xor ixh
                            449 .endm
                            450 
                            451 ;; Macro: cp__ixh
                            452 ;;    Opcode for "CP IXH" instruction
                            453 ;; 
                            454 .mdelete cp__ixh
                            455 .macro cp__ixh
                            456    .dw #0xBCDD  ;; Opcode for cp ixh
                            457 .endm
                            458 
                            459 ;; Macro: dec__ixh
                            460 ;;    Opcode for "DEC IXH" instruction
                            461 ;; 
                            462 .mdelete dec__ixh
                            463 .macro dec__ixh
                            464    .dw #0x25DD  ;; Opcode for dec ixh
                            465 .endm
                            466 
                            467 ;; Macro: inc__ixh
                            468 ;;    Opcode for "INC IXH" instruction
                            469 ;; 
                            470 .mdelete inc__ixh
                            471 .macro inc__ixh
                            472    .dw #0x24DD  ;; Opcode for inc ixh
                            473 .endm
                            474 
                            475 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            476 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            477 ;; IYL Related Macros
                            478 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            479 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            480 
                            481 ;; Macro: ld__iyl    Value
                            482 ;;    Opcode for "LD iyl, Value" instruction
                            483 ;;  
                            484 ;; Parameters:
                            485 ;;    Value - An inmediate 8-bits value that will be loaded into iyl
                            486 ;; 
                            487 .mdelete  ld__iyl
                            488 .macro ld__iyl    Value 
                            489    .db #0xFD, #0x2E, Value  ;; Opcode for ld iyl, Value
                            490 .endm
                            491 
                            492 ;; Macro: ld__iyl_a
                            493 ;;    Opcode for "LD iyl, a" instruction
                            494 ;; 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 43.
Hexadecimal [16-Bits]



                            495 .mdelete ld__iyl_a
                            496 .macro ld__iyl_a
                            497    .dw #0x6FFD  ;; Opcode for ld iyl, a
                            498 .endm
                            499 
                            500 ;; Macro: ld__iyl_b
                            501 ;;    Opcode for "LD iyl, B" instruction
                            502 ;; 
                            503 .mdelete ld__iyl_b
                            504 .macro ld__iyl_b
                            505    .dw #0x68FD  ;; Opcode for ld iyl, b
                            506 .endm
                            507 
                            508 ;; Macro: ld__iyl_c
                            509 ;;    Opcode for "LD iyl, C" instruction
                            510 ;; 
                            511 .mdelete ld__iyl_c
                            512 .macro ld__iyl_c
                            513    .dw #0x69FD  ;; Opcode for ld iyl, c
                            514 .endm
                            515 
                            516 ;; Macro: ld__iyl_d
                            517 ;;    Opcode for "LD iyl, D" instruction
                            518 ;; 
                            519 .mdelete ld__iyl_d
                            520 .macro ld__iyl_d
                            521    .dw #0x6AFD  ;; Opcode for ld iyl, d
                            522 .endm
                            523 
                            524 ;; Macro: ld__iyl_e
                            525 ;;    Opcode for "LD iyl, E" instruction
                            526 ;; 
                            527 .mdelete ld__iyl_e
                            528 .macro ld__iyl_e
                            529    .dw #0x6BFD  ;; Opcode for ld iyl, e
                            530 .endm
                            531 
                            532 ;; Macro: ld__iyl_iyh
                            533 ;;    Opcode for "LD iyl, IXL" instruction
                            534 ;; 
                            535 .mdelete  ld__iyl_iyh
                            536 .macro ld__iyl_iyh
                            537    .dw #0x6CFD  ;; Opcode for ld iyl, ixl
                            538 .endm
                            539 
                            540 ;; Macro: ld__a_iyl
                            541 ;;    Opcode for "LD A, iyl" instruction
                            542 ;; 
                            543 .mdelete ld__a_iyl
                            544 .macro ld__a_iyl
                            545    .dw #0x7DFD  ;; Opcode for ld a, iyl
                            546 .endm
                            547 
                            548 ;; Macro: ld__b_iyl
                            549 ;;    Opcode for "LD B, iyl" instruction
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 44.
Hexadecimal [16-Bits]



                            550 ;; 
                            551 .mdelete ld__b_iyl
                            552 .macro ld__b_iyl
                            553    .dw #0x45FD  ;; Opcode for ld b, iyl
                            554 .endm
                            555 
                            556 ;; Macro: ld__c_iyl
                            557 ;;    Opcode for "LD c, iyl" instruction
                            558 ;; 
                            559 .mdelete ld__c_iyl
                            560 .macro ld__c_iyl
                            561    .dw #0x4DFD  ;; Opcode for ld c, iyl
                            562 .endm
                            563 
                            564 ;; Macro: ld__d_iyl
                            565 ;;    Opcode for "LD D, iyl" instruction
                            566 ;; 
                            567 .mdelete ld__d_iyl
                            568 .macro ld__d_iyl
                            569    .dw #0x55FD  ;; Opcode for ld d, iyl
                            570 .endm
                            571 
                            572 ;; Macro: ld__e_iyl
                            573 ;;    Opcode for "LD e, iyl" instruction
                            574 ;; 
                            575 .mdelete ld__e_iyl
                            576 .macro ld__e_iyl
                            577    .dw #0x5DFD  ;; Opcode for ld e, iyl
                            578 .endm
                            579 
                            580 ;; Macro: add__iyl
                            581 ;;    Opcode for "Add iyl" instruction
                            582 ;; 
                            583 .mdelete add__iyl
                            584 .macro add__iyl
                            585    .dw #0x85FD  ;; Opcode for add iyl
                            586 .endm
                            587 
                            588 ;; Macro: sub__iyl
                            589 ;;    Opcode for "SUB iyl" instruction
                            590 ;; 
                            591 .mdelete sub__iyl
                            592 .macro sub__iyl
                            593    .dw #0x95FD  ;; Opcode for sub iyl
                            594 .endm
                            595 
                            596 ;; Macro: adc__iyl
                            597 ;;    Opcode for "ADC iyl" instruction
                            598 ;; 
                            599 .mdelete adc__iyl
                            600 .macro adc__iyl
                            601    .dw #0x8DFD  ;; Opcode for adc iyl
                            602 .endm
                            603 
                            604 ;; Macro: sbc__iyl
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 45.
Hexadecimal [16-Bits]



                            605 ;;    Opcode for "SBC iyl" instruction
                            606 ;; 
                            607 .mdelete sbc__iyl
                            608 .macro sbc__iyl
                            609    .dw #0x9DFD  ;; Opcode for sbc iyl
                            610 .endm
                            611 
                            612 ;; Macro: and__iyl
                            613 ;;    Opcode for "AND iyl" instruction
                            614 ;; 
                            615 .mdelete and__iyl
                            616 .macro and__iyl
                            617    .dw #0xA5FD  ;; Opcode for and iyl
                            618 .endm
                            619 
                            620 ;; Macro: or__iyl
                            621 ;;    Opcode for "OR iyl" instruction
                            622 ;; 
                            623 .mdelete or__iyl
                            624 .macro or__iyl
                            625    .dw #0xB5FD  ;; Opcode for or iyl
                            626 .endm
                            627 
                            628 ;; Macro: xor__iyl
                            629 ;;    Opcode for "XOR iyl" instruction
                            630 ;; 
                            631 .mdelete xor__iyl
                            632 .macro xor__iyl
                            633    .dw #0xADFD  ;; Opcode for xor iyl
                            634 .endm
                            635 
                            636 ;; Macro: cp__iyl
                            637 ;;    Opcode for "CP iyl" instruction
                            638 ;; 
                            639 .mdelete cp__iyl
                            640 .macro cp__iyl
                            641    .dw #0xBDFD  ;; Opcode for cp iyl
                            642 .endm
                            643 
                            644 ;; Macro: dec__iyl
                            645 ;;    Opcode for "DEC iyl" instruction
                            646 ;; 
                            647 .mdelete dec__iyl
                            648 .macro dec__iyl
                            649    .dw #0x2DFD  ;; Opcode for dec iyl
                            650 .endm
                            651 
                            652 ;; Macro: inc__iyl
                            653 ;;    Opcode for "INC iyl" instruction
                            654 ;; 
                            655 .mdelete inc__iyl
                            656 .macro inc__iyl
                            657    .dw #0x2CFD  ;; Opcode for inc iyl
                            658 .endm
                            659 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 46.
Hexadecimal [16-Bits]



                            660 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            661 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            662 ;; IYH Related Macros
                            663 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            664 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            665 
                            666 ;; Macro: ld__iyh    Value
                            667 ;;    Opcode for "LD iyh, Value" instruction
                            668 ;;  
                            669 ;; Parameters:
                            670 ;;    Value - An inmediate 8-bits value that will be loaded into iyh
                            671 ;; 
                            672 .mdelete  ld__iyh
                            673 .macro ld__iyh    Value 
                            674    .db #0xFD, #0x26, Value  ;; Opcode for ld iyh, Value
                            675 .endm
                            676 
                            677 ;; Macro: ld__iyh_a
                            678 ;;    Opcode for "LD iyh, a" instruction
                            679 ;; 
                            680 .mdelete ld__iyh_a
                            681 .macro ld__iyh_a
                            682    .dw #0x67FD  ;; Opcode for ld iyh, a
                            683 .endm
                            684 
                            685 ;; Macro: ld__iyh_b
                            686 ;;    Opcode for "LD iyh, B" instruction
                            687 ;; 
                            688 .mdelete ld__iyh_b
                            689 .macro ld__iyh_b
                            690    .dw #0x60FD  ;; Opcode for ld iyh, b
                            691 .endm
                            692 
                            693 ;; Macro: ld__iyh_c
                            694 ;;    Opcode for "LD iyh, C" instruction
                            695 ;; 
                            696 .mdelete ld__iyh_c
                            697 .macro ld__iyh_c
                            698    .dw #0x61FD  ;; Opcode for ld iyh, c
                            699 .endm
                            700 
                            701 ;; Macro: ld__iyh_d
                            702 ;;    Opcode for "LD iyh, D" instruction
                            703 ;; 
                            704 .mdelete ld__iyh_d
                            705 .macro ld__iyh_d
                            706    .dw #0x62FD  ;; Opcode for ld iyh, d
                            707 .endm
                            708 
                            709 ;; Macro: ld__iyh_e
                            710 ;;    Opcode for "LD iyh, E" instruction
                            711 ;; 
                            712 .mdelete ld__iyh_e
                            713 .macro ld__iyh_e
                            714    .dw #0x63FD  ;; Opcode for ld iyh, e
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 47.
Hexadecimal [16-Bits]



                            715 .endm
                            716 
                            717 ;; Macro: ld__iyh_iyl
                            718 ;;    Opcode for "LD iyh, IyL" instruction
                            719 ;; 
                            720 .mdelete  ld__iyh_iyl
                            721 .macro ld__iyh_iyl
                            722    .dw #0x65FD  ;; Opcode for ld iyh, iyl
                            723 .endm
                            724 
                            725 ;; Macro: ld__a_iyh
                            726 ;;    Opcode for "LD A, iyh" instruction
                            727 ;; 
                            728 .mdelete ld__a_iyh
                            729 .macro ld__a_iyh
                            730    .dw #0x7CFD  ;; Opcode for ld a, iyh
                            731 .endm
                            732 
                            733 ;; Macro: ld__b_iyh
                            734 ;;    Opcode for "LD B, iyh" instruction
                            735 ;; 
                            736 .mdelete ld__b_iyh
                            737 .macro ld__b_iyh
                            738    .dw #0x44FD  ;; Opcode for ld b, iyh
                            739 .endm
                            740 
                            741 ;; Macro: ld__c_iyh
                            742 ;;    Opcode for "LD c, iyh" instruction
                            743 ;; 
                            744 .mdelete ld__c_iyh
                            745 .macro ld__c_iyh
                            746    .dw #0x4CFD  ;; Opcode for ld c, iyh
                            747 .endm
                            748 
                            749 ;; Macro: ld__d_iyh
                            750 ;;    Opcode for "LD D, iyh" instruction
                            751 ;; 
                            752 .mdelete ld__d_iyh
                            753 .macro ld__d_iyh
                            754    .dw #0x54FD  ;; Opcode for ld d, iyh
                            755 .endm
                            756 
                            757 ;; Macro: ld__e_iyh
                            758 ;;    Opcode for "LD e, iyh" instruction
                            759 ;; 
                            760 .mdelete ld__e_iyh
                            761 .macro ld__e_iyh
                            762    .dw #0x5CFD  ;; Opcode for ld e, iyh
                            763 .endm
                            764 
                            765 ;; Macro: add__iyh
                            766 ;;    Opcode for "Add iyh" instruction
                            767 ;; 
                            768 .mdelete add__iyh
                            769 .macro add__iyh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 48.
Hexadecimal [16-Bits]



                            770    .dw #0x84FD  ;; Opcode for add iyh
                            771 .endm
                            772 
                            773 ;; Macro: sub__iyh
                            774 ;;    Opcode for "SUB iyh" instruction
                            775 ;; 
                            776 .mdelete sub__iyh
                            777 .macro sub__iyh
                            778    .dw #0x94FD  ;; Opcode for sub iyh
                            779 .endm
                            780 
                            781 ;; Macro: adc__iyh
                            782 ;;    Opcode for "ADC iyh" instruction
                            783 ;; 
                            784 .mdelete adc__iyh
                            785 .macro adc__iyh
                            786    .dw #0x8CFD  ;; Opcode for adc iyh
                            787 .endm
                            788 
                            789 ;; Macro: sbc__iyh
                            790 ;;    Opcode for "SBC iyh" instruction
                            791 ;; 
                            792 .mdelete sbc__iyh
                            793 .macro sbc__iyh
                            794    .dw #0x9CFD  ;; Opcode for sbc iyh
                            795 .endm
                            796 
                            797 ;; Macro: and__iyh
                            798 ;;    Opcode for "AND iyh" instruction
                            799 ;; 
                            800 .mdelete and__iyh
                            801 .macro and__iyh
                            802    .dw #0xA4FD  ;; Opcode for and iyh
                            803 .endm
                            804 
                            805 ;; Macro: or__iyh
                            806 ;;    Opcode for "OR iyh" instruction
                            807 ;; 
                            808 .mdelete or__iyh
                            809 .macro or__iyh
                            810    .dw #0xB4FD  ;; Opcode for or iyh
                            811 .endm
                            812 
                            813 ;; Macro: xor__iyh
                            814 ;;    Opcode for "XOR iyh" instruction
                            815 ;; 
                            816 .mdelete xor__iyh
                            817 .macro xor__iyh
                            818    .dw #0xACFD  ;; Opcode for xor iyh
                            819 .endm
                            820 
                            821 ;; Macro: cp__iyh
                            822 ;;    Opcode for "CP iyh" instruction
                            823 ;; 
                            824 .mdelete cp__iyh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 49.
Hexadecimal [16-Bits]



                            825 .macro cp__iyh
                            826    .dw #0xBCFD  ;; Opcode for cp iyh
                            827 .endm
                            828 
                            829 ;; Macro: dec__iyh
                            830 ;;    Opcode for "DEC iyh" instruction
                            831 ;; 
                            832 .mdelete dec__iyh
                            833 .macro dec__iyh
                            834    .dw #0x25FD  ;; Opcode for dec iyh
                            835 .endm
                            836 
                            837 ;; Macro: inc__iyh
                            838 ;;    Opcode for "INC iyh" instruction
                            839 ;; 
                            840 .mdelete inc__iyh
                            841 .macro inc__iyh
                            842    .dw #0x24FD  ;; Opcode for inc iyh
                            843 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 50.
Hexadecimal [16-Bits]



                             27 
                             28 ;; Macro: ld__hl_de
                             29 ;;    Copy DE to HL, using 2 instructions
                             30 ;; COST: 2 us (8 CPU Cycles)
                             31 ;; 
                             32 .macro ld__hl_de
                             33    ;; LD HL, DE
                             34    ;;------------
                             35    ld h, d
                             36    ld l, e
                             37    ;;------------
                             38 .endm
                             39 
                             40 ;; Macro: ld__de_hl
                             41 ;;    Copy HL to DE, using 2 instructions (ld d, h : ld e, l)
                             42 ;; COST: 2 us (8 CPU Cycles)
                             43 ;; 
                             44 .macro ld__de_hl
                             45    ;; LD DE, HL
                             46    ;;------------
                             47    ld d, h
                             48    ld e, l
                             49    ;;------------
                             50 .endm
                             51 
                             52 ;; Macro: ld__de_ix
                             53 ;;    Copy IX to DE, using 2 instructions (ld e, ixl : ld d, ixh)
                             54 ;; COST: 4 us (16 CPU Cycles)
                             55 ;; 
                             56 .macro ld__de_ix
                             57    ;; LD DE, IX
                             58    ;;------------
                             59    ld__e_ixl
                             60    ld__d_ixh
                             61    ;;------------
                             62 .endm
                             63 
                             64 ;; Macro: ld__bc_ix
                             65 ;;    Copy IX to BC, using 2 instructions (ld c, ixl : ld b, ixh)
                             66 ;; COST: 4 us (16 CPU Cycles)
                             67 ;; 
                             68 .macro ld__bc_ix
                             69    ;; LD BC, IX
                             70    ;;------------
                             71    ld__c_ixl
                             72    ld__b_ixh
                             73    ;;------------
                             74 .endm
                             75 
                             76 ;; Macro: ld__hl_ix
                             77 ;;    Copy IX to HL, using 4 instructions. 
                             78 ;;    Modifies A Register
                             79 ;; COST: 6 us (24 CPU Cycles)
                             80 ;; 
                             81 .macro ld__hl_ix
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 51.
Hexadecimal [16-Bits]



                             82    ;; LD HL, IX
                             83    ;;------------
                             84    ld__a_ixl
                             85    ld  l, a
                             86    ld__a_ixh
                             87    ld  h, a
                             88    ;;------------
                             89 .endm
                             90 
                             91 ;; Macro: ld__ix_de
                             92 ;;    Copy DE to IX, using 2 instructions (ld ixl, e : ld ixh, d)
                             93 ;; COST: 4 us (16 CPU Cycles)
                             94 ;; 
                             95 .macro ld__ix_de
                             96    ;; LD IX, DE
                             97    ;;------------
                             98    ld__ixl_e
                             99    ld__ixh_d
                            100    ;;------------
                            101 .endm
                            102 
                            103 ;; Macro: ld__ix_bc
                            104 ;;    Copy BX to IX, using 2 instructions (ld ixl, c : ld ixh, b)
                            105 ;; COST: 4 us (16 CPU Cycles)
                            106 ;; 
                            107 .macro ld__ix_bc
                            108    ;; LD IX, BC
                            109    ;;------------
                            110    ld__ixl_c
                            111    ld__ixh_b
                            112    ;;------------
                            113 .endm
                            114 
                            115 ;; Macro: ld__ix_hl
                            116 ;;    Copy HL to IX, using 4 instructions. 
                            117 ;;    Modifies A Register
                            118 ;; COST: 6 us (24 CPU Cycles)
                            119 ;; 
                            120 .macro ld__ix_hl
                            121    ;; LD IX, HL
                            122    ;;------------
                            123    ld  a, l
                            124    ld__ixl_a
                            125    ld  a, h
                            126    ld__ixh_a
                            127    ;;------------
                            128 .endm
                            129 
                            130 ;; Macro: ld__de_iy
                            131 ;;    Copy IY to DE, using 2 instructions (ld e, iyl : ld d, iyh)
                            132 ;; COST: 4 us (16 CPU Cycles)
                            133 ;; 
                            134 .macro ld__de_iy
                            135    ;; LD DE, IY
                            136    ;;------------
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 52.
Hexadecimal [16-Bits]



                            137    ld__e_iyl
                            138    ld__d_iyh
                            139    ;;------------
                            140 .endm
                            141 
                            142 ;; Macro: ld__bc_iy
                            143 ;;    Copy IY to BC, using 2 instructions (ld c, iyl : ld b, iyh)
                            144 ;; COST: 4 us (16 CPU Cycles)
                            145 ;; 
                            146 .macro ld__bc_iy
                            147    ;; LD BC, IY
                            148    ;;------------
                            149    ld__c_iyl
                            150    ld__b_iyh
                            151    ;;------------
                            152 .endm
                            153 
                            154 ;; Macro: ld__hl_iy
                            155 ;;    Copy IY to HL, using 4 instructions. 
                            156 ;;    Modifies A Register
                            157 ;; COST: 6 us (24 CPU Cycles)
                            158 ;; 
                            159 .macro ld__hl_iy
                            160    ;; LD HL, IY
                            161    ;;------------
                            162    ld__a_iyl
                            163    ld  l, a
                            164    ld__a_iyh
                            165    ld  h, a
                            166    ;;------------
                            167 .endm
                            168 
                            169 ;; Macro: ld__iy_de
                            170 ;;    Copy DE to IY, using 2 instructions (ld iyl, e : ld iyh, d)
                            171 ;; COST: 4 us (16 CPU Cycles)
                            172 ;; 
                            173 .macro ld__iy_de
                            174    ;; LD IY, DE
                            175    ;;------------
                            176    ld__iyl_e
                            177    ld__iyh_d
                            178    ;;------------
                            179 .endm
                            180 
                            181 ;; Macro: ld__iy_bc
                            182 ;;    Copy BX to IY, using 2 instructions (ld iyl, c : ld iyh, b)
                            183 ;; COST: 4 us (16 CPU Cycles)
                            184 ;; 
                            185 .macro ld__iy_bc
                            186    ;; LD IY, BC
                            187    ;;------------
                            188    ld__iyl_c
                            189    ld__iyh_b
                            190    ;;------------
                            191 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 53.
Hexadecimal [16-Bits]



                            192 
                            193 ;; Macro: ld__iy_hl
                            194 ;;    Copy HL to IY, using 4 instructions. 
                            195 ;;    Modifies A Register
                            196 ;; COST: 6 us (24 CPU Cycles)
                            197 ;; 
                            198 .macro ld__iy_hl
                            199    ;; LD IY, HL
                            200    ;;------------
                            201    ld  a, l
                            202    ld__iyl_a
                            203    ld  a, h
                            204    ld__iyh_a
                            205    ;;------------
                            206 .endm
                            207 
                            208 ;; Macro: ld__ix_iy
                            209 ;;    Copy IY to IX, using 4 instructions. 
                            210 ;;    Modifies A Register
                            211 ;; Cost: 8 us (32 CPU Cycles)
                            212 ;; 
                            213 .macro ld__ix_iy
                            214    ;; LD IX, IY
                            215    ;;------------
                            216    ld__a_iyl
                            217    ld__ixl_a
                            218    ld__a_iyh
                            219    ld__ixh_a
                            220    ;;------------
                            221 .endm
                            222 
                            223 ;; Macro: ld__iy_ix
                            224 ;;    Copy IX to IY, using 4 instructions. 
                            225 ;;    Modifies A Register
                            226 ;; Cost: 8 us (32 CPU Cycles)
                            227 ;; 
                            228 .macro ld__iy_ix
                            229    ;; LD IY, IX
                            230    ;;------------
                            231    ld__a_ixl
                            232    ld__iyl_a
                            233    ld__a_ixh
                            234    ld__iyh_a
                            235    ;;------------
                            236 .endm
                            237 
                            238 ;; Macro: ex__de_ix
                            239 ;;    Swap DE with IX
                            240 ;;    Modifies A Register
                            241 ;; Cost: 10 us (40 CPU Cycles)
                            242 ;; 
                            243 .macro ex__de_ix
                            244    ;; EX DE, IX
                            245    ;;------------
                            246    ld a, e
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 54.
Hexadecimal [16-Bits]



                            247    ld__e_ixl
                            248    ld__ixl_a
                            249    ld a, d
                            250    ld__d_ixh
                            251    ld__ixh_a
                            252    ;;------------
                            253 .endm
                            254 
                            255 ;; Macro: ex__bc_ix
                            256 ;;    Swap BC with IX
                            257 ;;    Modifies A Register
                            258 ;; Cost: 10 us (40 CPU Cycles)
                            259 ;; 
                            260 .macro ex__bc_ix
                            261    ;; EX BC, IX
                            262    ;;------------
                            263    ld a, c
                            264    ld__c_ixl
                            265    ld__ixl_a
                            266    ld a, b
                            267    ld__b_ixh
                            268    ld__ixh_a
                            269    ;;------------
                            270 .endm
                            271 
                            272 ;; Macro: ex__hl_ix
                            273 ;;    Swap HL with IX
                            274 ;;    Uses 2 bytes on the stack for the swap
                            275 ;;    Modifies A register
                            276 ;; Cost: 15 us (60 CPU Cycles)
                            277 ;; 
                            278 .macro ex__hl_ix
                            279    ;; EX HL, IX
                            280    ;;------------
                            281    push  hl
                            282    ld__a_ixl
                            283    ld l, a
                            284    ld__a_ixh
                            285    ld h, a
                            286    pop   ix
                            287    ;;------------
                            288 .endm
                            289 
                            290 ;; Macro: ex__de_iy
                            291 ;;    Swap DE with IY
                            292 ;;    Modifies A Register
                            293 ;; Cost: 10 us (40 CPU Cycles)
                            294 ;; 
                            295 .macro ex__de_iy
                            296    ;; EX DE, IY
                            297    ;;------------
                            298    ld a, e
                            299    ld__e_iyl
                            300    ld__iyl_a
                            301    ld a, d
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 55.
Hexadecimal [16-Bits]



                            302    ld__d_iyh
                            303    ld__iyh_a
                            304    ;;------------
                            305 .endm
                            306 
                            307 ;; Macro: ex__bc_iy
                            308 ;;    Swap BC with IY
                            309 ;;    Modifies A Register
                            310 ;; Cost: 10 us (40 CPU Cycles)
                            311 ;; 
                            312 .macro ex__bc_iy
                            313    ;; EX BC, IY
                            314    ;;------------
                            315    ld a, c
                            316    ld__c_iyl
                            317    ld__iyl_a
                            318    ld a, b
                            319    ld__b_iyh
                            320    ld__iyh_a
                            321    ;;------------
                            322 .endm
                            323 
                            324 ;; Macro: ex__hl_iy
                            325 ;;    Swap HL with IY
                            326 ;;    Uses 2 bytes on the stack for the swap
                            327 ;;    Modifies A register
                            328 ;; Cost: 15 us (60 CPU Cycles)
                            329 ;; 
                            330 .macro ex__hl_iy
                            331    ;; EX HL, IY
                            332    ;;------------
                            333    push  hl
                            334    ld__a_iyl
                            335    ld l, a
                            336    ld__a_iyh
                            337    ld h, a
                            338    pop   iy
                            339    ;;------------
                            340 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 56.
Hexadecimal [16-Bits]



                             24 .include "macros/cpct_pushpop.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2020 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Push - Pop Macros
                             21 ;;
                             22 ;;    Useful macros to simplify push-pop save/restore operations
                             23 ;;
                             24 
                             25 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             26 ;; Macro: cpctm_push RO, R1, R2, R3, R4, R5
                             27 ;;
                             28 ;;    Pushes any given registers (up to 6) into the stack
                             29 ;;
                             30 ;; ASM Definition:
                             31 ;;    .macro <cpctm_push> R0, R1, R2, R3, R4, R5
                             32 ;;
                             33 ;; Parameters:
                             34 ;;    R0-R5 - Any number of 16-bit pushable registers, up to 6
                             35 ;;
                             36 ;; Details:
                             37 ;;    This macro converts the list of 16-bit registers given as parameters into a list
                             38 ;; of 'push' operations to push all of them into the stack. The registers are pushed
                             39 ;; into the stack in the same order as they are given in the parameter list.
                             40 ;;    The macro accepts any number of registers up to the maximum of 6 that are 
                             41 ;; predefined as parameters. However, you may use it with 1, 2, 3, 4 or 5 registers
                             42 ;; as parameters. There is no need to give the 6 parameters: only those given will 
                             43 ;; be considered.
                             44 ;;
                             45 ;; Modified Registers: 
                             46 ;;    none
                             47 ;;
                             48 ;; Required memory:
                             49 ;;    1 byte per register given (2 if they are IX or IY)
                             50 ;;
                             51 ;; Time Measures:
                             52 ;; (start code)
                             53 ;;  Case     | microSecs(us) | CPU Cycles
                             54 ;; ------------------------------------
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 57.
Hexadecimal [16-Bits]



                             55 ;;  Per Reg  |       4       |     16
                             56 ;; ------------------------------------
                             57 ;;  Per IX/IY|       5       |     20
                             58 ;; ------------------------------------
                             59 ;; (end code)
                             60 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             61 .macro cpctm_push r0, r1, r2, r3, r4, r5
                             62    .narg v
                             63    .if v
                             64    push r0
                             65    .if v-1
                             66    push r1
                             67    .if v-2
                             68    push r2
                             69    .if v-3
                             70    push r3
                             71    .if v-4
                             72    push r4
                             73    .if v-5
                             74    push r5
                             75    .else
                             76    .mexit
                             77    .endif
                             78    .else
                             79    .mexit
                             80    .endif
                             81    .else
                             82    .mexit
                             83    .endif
                             84    .else
                             85    .mexit
                             86    .endif
                             87    .else
                             88    .mexit
                             89    .endif
                             90    .else
                             91    .mexit
                             92    .endif
                             93 .endm
                             94 
                             95 
                             96 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             97 ;; Macro: cpctm_pop RO, R1, R2, R3, R4, R5
                             98 ;;
                             99 ;;    Pops any given registers (up to 6) from the stack
                            100 ;;
                            101 ;; ASM Definition:
                            102 ;;    .macro <cpctm_pop> R0, R1, R2, R3, R4, R5
                            103 ;;
                            104 ;; Parameters:
                            105 ;;    R0-R5 - Any number of 16-bit pushable/popable registers, up to 6
                            106 ;;
                            107 ;; Details:
                            108 ;;    This macro converts the list of 16-bit registers given as parameters into a list
                            109 ;; of 'pop' operations to pop all of them from the stack. The registers are poped
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 58.
Hexadecimal [16-Bits]



                            110 ;; in the same order as they are given in the parameter list.
                            111 ;;    The macro accepts any number of registers up to the maximum of 6 that are 
                            112 ;; predefined as parameters. However, you may use it with 1, 2, 3, 4 or 5 registers
                            113 ;; as parameters. There is no need to give the 6 parameters: only those given will 
                            114 ;; be considered.
                            115 ;;
                            116 ;; Modified Registers: 
                            117 ;;    R0, R1, R2, R3, R4, R5 (Those given as parameters are loaded from the stack)
                            118 ;;
                            119 ;; Required memory:
                            120 ;;    1 byte per register given (2 if they are IX or IY)
                            121 ;;
                            122 ;; Time Measures:
                            123 ;; (start code)
                            124 ;;  Case     | microSecs(us) | CPU Cycles
                            125 ;; ------------------------------------
                            126 ;;  Per Reg  |       3       |     12
                            127 ;; ------------------------------------
                            128 ;;  Per IX/IY|       5       |     20
                            129 ;; ------------------------------------
                            130 ;; (end code)
                            131 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            132 .macro cpctm_pop r0, r1, r2, r3, r4, r5
                            133    .narg v
                            134    .if v
                            135    pop r0
                            136    .if v-1
                            137    pop r1
                            138    .if v-2
                            139    pop r2
                            140    .if v-3
                            141    pop r3
                            142    .if v-4
                            143    pop r4
                            144    .if v-5
                            145    pop r5
                            146    .else
                            147    .mexit
                            148    .endif
                            149    .else
                            150    .mexit
                            151    .endif
                            152    .else
                            153    .mexit
                            154    .endif
                            155    .else
                            156    .mexit
                            157    .endif
                            158    .else
                            159    .mexit
                            160    .endif
                            161    .else
                            162    .mexit
                            163    .endif
                            164 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 59.
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                             25 .include "macros/cpct_luts.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2018 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: LUTs (Look-Up-Tables)
                             21 ;;
                             22 ;;    Useful macros for accessing and managing Look-Up-Tables
                             23 ;;
                             24 
                             25 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             26 ;; Macro: cpctm_lutget8
                             27 ;;
                             28 ;;    Gets a value from a 256-byte-max 8-bit table into A register
                             29 ;;
                             30 ;; Parameters:
                             31 ;;    Table         - Memory address where the 256-byte-max table starts. It can be 
                             32 ;;  either an hexadecimal, decimal or octal address, or a symbol (the table name).
                             33 ;;    TR1           - An 8-bits register from the set {B, D, H}
                             34 ;;    TR2           - An 8-bits register from the set {C, E, L}. This register must
                             35 ;;  match TR1 to form a valid 16-bits register (BC, DE or HL), as the register TR1'TR2
                             36 ;;  will be loaded with the address of the table, to be the base pointer.
                             37 ;; 
                             38 ;; Input Registers: 
                             39 ;;    A     - Index in the LUT to be accessed.
                             40 ;;
                             41 ;; Return Value:
                             42 ;;    A     - Value got from the LUT ( table[TR1'TR2 + A] )
                             43 ;;
                             44 ;; Details:
                             45 ;;    This macro gets a value from a table into the A register. The process is simple:
                             46 ;;
                             47 ;;    1. It loads the address of the table in the 16-bits register TR1'TR2
                             48 ;;    2. It adds the index (A) to TR1'TR2  (TR1'TR2 += A)
                             49 ;;    3. It loads into A register the byte pointed by TR1'TR2
                             50 ;;
                             51 ;; Modified Registers: 
                             52 ;;    AF, TR1, TR2
                             53 ;;
                             54 ;; Required memory:
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 60.
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                             55 ;;    9 bytes
                             56 ;;
                             57 ;; Time Measures:
                             58 ;; (start code)
                             59 ;;  Case | microSecs(us) | CPU Cycles
                             60 ;; ------------------------------------
                             61 ;;  Any  |      10       |     40
                             62 ;; ------------------------------------
                             63 ;; (end code)
                             64 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             65 
                             66 .macro cpctm_lutget8 Table, TR1, TR2
                             67     ld   TR1'TR2, #Table   ;; [3] TR1_TR2 points to the LUT
                             68     
                             69     ;; Compute TR1'TR2 += A
                             70     add  TR2               ;; [1] | TR2 += A
                             71     ld   TR2, a            ;; [1] |
                             72     sub  a                 ;; [1] A = 0 (preserving Carry Flag)
                             73     adc  TR1               ;; [1] | TR1 += Carry
                             74     ld   TR1, a            ;; [1] |
                             75 
                             76     ;; A = *(TR1_TR2 + A)
                             77     ld   a, (TR1'TR2)      ;; [2] A = Value stored at given index from the LUT 
                             78 .endm
                             79 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 61.
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                             26 
                             27 ;;//////////////////////////////////////////////////////////////////////
                             28 ;; Group: General Useful Macros
                             29 ;;//////////////////////////////////////////////////////////////////////
                             30 
                             31 ;;
                             32 ;; Macro: cpctm_produceHalts_asm
                             33 ;;
                             34 ;;   Produce a set of consecutive halt instructions in order to wait for 
                             35 ;; a given number of interrupts.
                             36 ;;
                             37 ;; C Definition:
                             38 ;;   .macro <cpctm_produceHalts_asm> *N*
                             39 ;;
                             40 ;; Input Parameters:
                             41 ;;   (_) N - Number of consecutive halts to be produced
                             42 ;;
                             43 ;; Known issues:
                             44 ;;    * *N* must be a constant expression that can evaluate to a number
                             45 ;; at compile time.
                             46 ;;    * If the code generated by this macro is executed with interrupts
                             47 ;; being disabled, your CPU will effectively hang forever.
                             48 ;;    * This macro can only be used from assembler code. For C callings
                             49 ;; use <cpctm_produceHalts> instead.
                             50 ;;
                             51 ;; Size of generated code:
                             52 ;;    * *N* bytes (1 byte each halt instruction produced)
                             53 ;;
                             54 ;; Time Measures:
                             55 ;;    * Time depends on the exact moment of execution and the status of
                             56 ;; interrupts. *N* interrupts will pass.
                             57 ;;
                             58 ;; Details:
                             59 ;;    This macro produces a set of *N* consecutive *halt* assembly 
                             60 ;; instructions. Each *halt* instruction stops de Z80 CPU until 
                             61 ;; an interrupt is received. Therefore, this waits for *N* interrupts
                             62 ;; to be produced. This can be used for waiting or synchronization 
                             63 ;; purposes.
                             64 ;;
                             65 ;;    Please, take into account that this is a macro, and not a function.
                             66 ;; Each time this macro is used in your code it will produce the requested
                             67 ;; amount of halts. That can produce more code than you effectively need.
                             68 ;; For a unique function that controls a loop of *halt* waiting use
                             69 ;; <cpct_waitHalts> instead.
                             70 ;;
                             71 ;;
                             72 .mdelete cpctm_produceHalts
                             73 .macro cpctm_produceHalts N
                             74    .rept N
                             75       halt
                             76    .endm
                             77 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 62.
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                             21 .include "keyboard/keyboard.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 .module cpct_keyboard
                             19 
                             20 ;;
                             21 ;; Constant: Key Definitions (asm)
                             22 ;;
                             23 ;;    Definitions of the KeyCodes required by <cpct_isKeyPressed> 
                             24 ;; function for assembler programs. These are 16-bit values that define 
                             25 ;; matrix line in the keyboard layout (Most Significant Byte) and bit to
                             26 ;; be tested in that matrix line status for the given key (Least Significant
                             27 ;; byte). Each matrix line in the keyboard returns a byte containing the
                             28 ;; status of 8 keys, 1 bit each.
                             29 ;;
                             30 ;; CPCtelera include file:
                             31 ;;    _keyboard/keyboard.h.s_
                             32 ;;
                             33 ;; Keycode constant names:
                             34 ;; (start code)
                             35 ;;  KeyCode | Constant        || KeyCode | Constant      || KeyCode |  Constant
                             36 ;; -------------------------------------------------------------------------------
                             37 ;;   0x0100 | Key_CursorUp    ||  0x0803 | Key_P         ||  0x4006 |  Key_B
                             38 ;;          |                 ||         |               ||     ''  |  Joy1_Fire3
                             39 ;;   0x0200 | Key_CursorRight ||  0x1003 | Key_SemiColon ||  0x8006 |  Key_V
                             40 ;;   0x0400 | Key_CursorDown  ||  0x2003 | Key_Colon     ||  0x0107 |  Key_4
                             41 ;;   0x0800 | Key_F9          ||  0x4003 | Key_Slash     ||  0x0207 |  Key_3
                             42 ;;   0x1000 | Key_F6          ||  0x8003 | Key_Dot       ||  0x0407 |  Key_E
                             43 ;;   0x2000 | Key_F3          ||  0x0104 | Key_0         ||  0x0807 |  Key_W
                             44 ;;   0x4000 | Key_Enter       ||  0x0204 | Key_9         ||  0x1007 |  Key_S
                             45 ;;   0x8000 | Key_FDot        ||  0x0404 | Key_O         ||  0x2007 |  Key_D
                             46 ;;   0x0101 | Key_CursorLeft  ||  0x0804 | Key_I         ||  0x4007 |  Key_C
                             47 ;;   0x0201 | Key_Copy        ||  0x1004 | Key_L         ||  0x8007 |  Key_X
                             48 ;;   0x0401 | Key_F7          ||  0x2004 | Key_K         ||  0x0108 |  Key_1
                             49 ;;   0x0801 | Key_F8          ||  0x4004 | Key_M         ||  0x0208 |  Key_2
                             50 ;;   0x1001 | Key_F5          ||  0x8004 | Key_Comma     ||  0x0408 |  Key_Esc
                             51 ;;   0x2001 | Key_F1          ||  0x0105 | Key_8         ||  0x0808 |  Key_Q
                             52 ;;   0x4001 | Key_F2          ||  0x0205 | Key_7         ||  0x1008 |  Key_Tab
                             53 ;;   0x8001 | Key_F0          ||  0x0405 | Key_U         ||  0x2008 |  Key_A
                             54 ;;   0x0102 | Key_Clr         ||  0x0805 | Key_Y         ||  0x4008 |  Key_CapsLock
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 63.
Hexadecimal [16-Bits]



                             55 ;;   0x0202 | Key_OpenBracket ||  0x1005 | Key_H         ||  0x8008 |  Key_Z
                             56 ;;   0x0402 | Key_Return      ||  0x2005 | Key_J         ||  0x0109 |  Joy0_Up
                             57 ;;   0x0802 | Key_CloseBracket||  0x4005 | Key_N         ||  0x0209 |  Joy0_Down
                             58 ;;   0x1002 | Key_F4          ||  0x8005 | Key_Space     ||  0x0409 |  Joy0_Left
                             59 ;;   0x2002 | Key_Shift       ||  0x0106 | Key_6         ||  0x0809 |  Joy0_Right
                             60 ;;          |                 ||     ''  | Joy1_Up       ||         |
                             61 ;;   0x4002 | Key_BackSlash   ||  0x0206 | Key_5         ||  0x1009 |  Joy0_Fire1
                             62 ;;          |                 ||     ''  | Joy1_Down     ||         |
                             63 ;;   0x8002 | Key_Control     ||  0x0406 | Key_R         ||  0x2009 |  Joy0_Fire2
                             64 ;;          |                 ||     ''  | Joy1_Left     ||         |
                             65 ;;   0x0103 | Key_Caret       ||  0x0806 | Key_T         ||  0x4009 |  Joy0_Fire3
                             66 ;;          |                 ||     ''  | Joy1 Right    ||
                             67 ;;   0x0203 | Key_Hyphen      ||  0x1006 | Key_G         ||  0x8009 |  Key_Del
                             68 ;;          |                 ||     ''  | Joy1_Fire1    ||
                             69 ;;   0x0403 | Key_At          ||  0x2006 | Key_F         ||
                             70 ;;          |                 ||     ''  | Joy1_Fire2    ||
                             71 ;; -------------------------------------------------------------------------------
                             72 ;;  Table 1. KeyCodes defined for each possible key, ordered by KeyCode
                             73 ;; (end)
                             74 ;;
                             75 
                             76 ;; Matrix Line 0x00
                     0100    77 Key_CursorUp     = #0x0100  ;; Bit 0 (01h) => | 0000 0001 |
                     0200    78 Key_CursorRight  = #0x0200  ;; Bit 1 (02h) => | 0000 0010 |
                     0400    79 Key_CursorDown   = #0x0400  ;; Bit 2 (04h) => | 0000 0100 |
                     0800    80 Key_F9           = #0x0800  ;; Bit 3 (08h) => | 0000 1000 |
                     1000    81 Key_F6           = #0x1000  ;; Bit 4 (10h) => | 0001 0000 |
                     2000    82 Key_F3           = #0x2000  ;; Bit 5 (20h) => | 0010 0000 |
                     4000    83 Key_Enter        = #0x4000  ;; Bit 6 (40h) => | 0100 0000 |
                     8000    84 Key_FDot         = #0x8000  ;; Bit 7 (80h) => | 1000 0000 |
                             85 ;; Matrix Line 0x01
                     0101    86 Key_CursorLeft   = #0x0101
                     0201    87 Key_Copy         = #0x0201
                     0401    88 Key_F7           = #0x0401
                     0801    89 Key_F8           = #0x0801
                     1001    90 Key_F5           = #0x1001
                     2001    91 Key_F1           = #0x2001
                     4001    92 Key_F2           = #0x4001
                     8001    93 Key_F0           = #0x8001
                             94 ;; Matrix Line 0x02
                     0102    95 Key_Clr          = #0x0102
                     0202    96 Key_OpenBracket  = #0x0202
                     0402    97 Key_Return       = #0x0402
                     0802    98 Key_CloseBracket = #0x0802
                     1002    99 Key_F4           = #0x1002
                     2002   100 Key_Shift        = #0x2002
                     4002   101 Key_BackSlash    = #0x4002
                     8002   102 Key_Control      = #0x8002
                            103 ;; Matrix Line 0x03
                     0103   104 Key_Caret        = #0x0103
                     0203   105 Key_Hyphen       = #0x0203
                     0403   106 Key_At           = #0x0403
                     0803   107 Key_P            = #0x0803
                     1003   108 Key_SemiColon    = #0x1003
                     2003   109 Key_Colon        = #0x2003
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 64.
Hexadecimal [16-Bits]



                     4003   110 Key_Slash        = #0x4003
                     8003   111 Key_Dot          = #0x8003
                            112 ;; Matrix Line 0x04
                     0104   113 Key_0            = #0x0104
                     0204   114 Key_9            = #0x0204
                     0404   115 Key_O            = #0x0404
                     0804   116 Key_I            = #0x0804
                     1004   117 Key_L            = #0x1004
                     2004   118 Key_K            = #0x2004
                     4004   119 Key_M            = #0x4004
                     8004   120 Key_Comma        = #0x8004
                            121 ;; Matrix Line 0x05
                     0105   122 Key_8            = #0x0105
                     0205   123 Key_7            = #0x0205
                     0405   124 Key_U            = #0x0405
                     0805   125 Key_Y            = #0x0805
                     1005   126 Key_H            = #0x1005
                     2005   127 Key_J            = #0x2005
                     4005   128 Key_N            = #0x4005
                     8005   129 Key_Space        = #0x8005
                            130 ;; Matrix Line 0x06
                     0106   131 Key_6            = #0x0106
                     0106   132 Joy1_Up          = #0x0106
                     0206   133 Key_5            = #0x0206
                     0206   134 Joy1_Down        = #0x0206
                     0406   135 Key_R            = #0x0406
                     0406   136 Joy1_Left        = #0x0406
                     0806   137 Key_T            = #0x0806
                     0806   138 Joy1_Right       = #0x0806
                     1006   139 Key_G            = #0x1006
                     1006   140 Joy1_Fire1       = #0x1006
                     2006   141 Key_F            = #0x2006
                     2006   142 Joy1_Fire2       = #0x2006
                     4006   143 Key_B            = #0x4006
                     4006   144 Joy1_Fire3       = #0x4006
                     8006   145 Key_V            = #0x8006
                            146 ;; Matrix Line 0x07
                     0107   147 Key_4            = #0x0107
                     0207   148 Key_3            = #0x0207
                     0407   149 Key_E            = #0x0407
                     0807   150 Key_W            = #0x0807
                     1007   151 Key_S            = #0x1007
                     2007   152 Key_D            = #0x2007
                     4007   153 Key_C            = #0x4007
                     8007   154 Key_X            = #0x8007
                            155 ;; Matrix Line 0x08
                     0108   156 Key_1            = #0x0108
                     0208   157 Key_2            = #0x0208
                     0408   158 Key_Esc          = #0x0408
                     0808   159 Key_Q            = #0x0808
                     1008   160 Key_Tab          = #0x1008
                     2008   161 Key_A            = #0x2008
                     4008   162 Key_CapsLock     = #0x4008
                     8008   163 Key_Z            = #0x8008
                            164 ;; Matrix Line 0x09
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 65.
Hexadecimal [16-Bits]



                     0109   165 Joy0_Up          = #0x0109
                     0209   166 Joy0_Down        = #0x0209
                     0409   167 Joy0_Left        = #0x0409
                     0809   168 Joy0_Right       = #0x0809
                     1009   169 Joy0_Fire1       = #0x1009
                     2009   170 Joy0_Fire2       = #0x2009
                     4009   171 Joy0_Fire3       = #0x4009
                     8009   172 Key_Del          = #0x8009
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 66.
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                             22 .include "video/videomode.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 .module cpct_video
                             19    
                             20 ;;
                             21 ;; Includes
                             22 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 67.
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                             23 .include "video/video_macros.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;//////////////////////////////////////////////////////////////////////
                             20 ;;//////////////////////////////////////////////////////////////////////
                             21 ;; File: Macros (asm)
                             22 ;;//////////////////////////////////////////////////////////////////////
                             23 ;;//////////////////////////////////////////////////////////////////////
                             24 
                             25 ;;//////////////////////////////////////////////////////////////////////
                             26 ;; Group: Video memory manipulation
                             27 ;;//////////////////////////////////////////////////////////////////////
                             28 
                             29 ;;
                             30 ;; Constant: CPCT_VMEM_START_ASM
                             31 ;;
                             32 ;;    The address where screen video memory starts by default in the Amstrad CPC.
                             33 ;;
                             34 ;;    This address is exactly 0xC000, and this macro represents this number but
                             35 ;; automatically converted to <u8>* (Pointer to unsigned byte). You can use this
                             36 ;; macro for any function requiring the start of video memory, like 
                             37 ;; <cpct_getScreenPtr>.
                             38 ;;
                     C000    39 CPCT_VMEM_START_ASM = 0xC000
                             40 
                             41 ;;
                             42 ;; Constants: Video Memory Pages
                             43 ;;
                             44 ;; Useful constants defining some typical Video Memory Pages to be used as 
                             45 ;; parameters for <cpct_setVideoMemoryPage>
                             46 ;;
                             47 ;; cpct_pageCO - Video Memory Page 0xC0 (0xC0··)
                             48 ;; cpct_page8O - Video Memory Page 0x80 (0x80··)
                             49 ;; cpct_page4O - Video Memory Page 0x40 (0x40··)
                             50 ;; cpct_page0O - Video Memory Page 0x00 (0x00··)
                             51 ;;
                     0030    52 cpct_pageC0_asm = 0x30
                     0020    53 cpct_page80_asm = 0x20
                     0010    54 cpct_page40_asm = 0x10
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 68.
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                     0000    55 cpct_page00_asm = 0x00
                             56 
                             57 ;;
                             58 ;; Macro: cpctm_memPage6_asm
                             59 ;;
                             60 ;;    Macro that encodes a video memory page in the 6 Least Significant bits (LSb)
                             61 ;; of a byte, required as parameter for <cpct_setVideoMemoryPage>. It loads resulting
                             62 ;; value into a given 8-bits register.
                             63 ;;
                             64 ;; ASM Definition:
                             65 ;; .macro <cpct_memPage6_asm> *REG8*, *PAGE*
                             66 ;;
                             67 ;; Parameters (1 byte):
                             68 ;; (__) REG8 - 8bits register where result will be loaded
                             69 ;; (1B) PAGE - Video memory page wanted 
                             70 ;;
                             71 ;; Known issues:
                             72 ;;   * This macro can only be used from assembler code. It is not accessible from 
                             73 ;; C scope. For C programs, please refer to <cpct_memPage6>
                             74 ;;   * This macro will work *only* with constant values, as its value needs to
                             75 ;; be calculated in compilation time. If fed with variable values, it will give 
                             76 ;; an assembler error.
                             77 ;;
                             78 ;; Destroyed Registers:
                             79 ;;    REG8
                             80 ;;
                             81 ;; Size of generated code:
                             82 ;;    2 bytes 
                             83 ;;
                             84 ;; Time Measures:
                             85 ;;    * 2 microseconds
                             86 ;;    * 8 CPU Cycles
                             87 ;;
                             88 ;; Details:
                             89 ;;  This is just a macro that shifts *PAGE* 2 bits to the right, to leave it
                             90 ;; with just 6 significant bits. For more information, check functions
                             91 ;; <cpct_setVideoMemoryPage> and <cpct_setVideoMemoryOffset>.
                             92 ;;
                             93 .macro cpctm_memPage6_asm REG8, PAGE 
                             94    ld REG8, #PAGE / 4      ;; [2] REG8 = PAGE/4
                             95 .endm
                             96 
                             97 ;;
                             98 ;; Macro: cpctm_screenPtr_asm
                             99 ;;
                            100 ;;    Macro that calculates the video memory location (byte pointer) of a 
                            101 ;; given pair of coordinates (*X*, *Y*). Value resulting from calculation 
                            102 ;; will be loaded into a 16-bits register.
                            103 ;;
                            104 ;; ASM Definition:
                            105 ;;    .macro <cpctm_screenPtr_asm> *REG16*, *VMEM*, *X*, *Y*
                            106 ;;
                            107 ;; Parameters:
                            108 ;;    (__) REG16 - 16-bits register where the resulting value will be loaded
                            109 ;;    (2B) VMEM  - Start of video memory buffer where (*X*, *Y*) coordinates will be calculated
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 69.
Hexadecimal [16-Bits]



                            110 ;;    (1B) X     - X Coordinate of the video memory location *in bytes* (*BEWARE! NOT in pixels!*)
                            111 ;;    (1B) Y     - Y Coordinate of the video memory location in pixels / bytes (they are same amount)
                            112 ;;
                            113 ;; Parameter Restrictions:
                            114 ;;    * *REG16* has to be a 16-bits register that can perform ld REG16, #value.
                            115 ;;    * *VMEM* will normally be the start of the video memory buffer where you want to 
                            116 ;; draw something. It could theoretically be any 16-bits value. 
                            117 ;;    * *X* must be in the range [0-79] for normal screen sizes (modes 0,1,2). Screen is
                            118 ;; always 80 bytes wide in these modes and this function is byte-aligned, so you have to 
                            119 ;; give it a byte coordinate (*NOT a pixel one!*).
                            120 ;;    * *Y* must be in the range [0-199] for normal screen sizes (modes 0,1,2). Screen is 
                            121 ;; always 200 pixels high in these modes. Pixels and bytes always coincide in vertical
                            122 ;; resolution, so this coordinate is the same in bytes that in pixels.
                            123 ;;    * If you give incorrect values to this function, the returned pointer could
                            124 ;; point anywhere in memory. This function will not cause any damage by itself, 
                            125 ;; but you may destroy important parts of your memory if you use its result to 
                            126 ;; write to memory, and you gave incorrect parameters by mistake. Take always
                            127 ;; care.
                            128 ;;
                            129 ;; Known issues:
                            130 ;;   * This macro can only be used from assembler code. It is not accessible from 
                            131 ;; C scope. For C programs, please refer to <cpct_getScreenPtr>
                            132 ;;   * This macro will work *only* with constant values, as calculations need to be 
                            133 ;; performed at assembler time.
                            134 ;;
                            135 ;; Destroyed Registers:
                            136 ;;    REG16
                            137 ;;
                            138 ;; Size of generated code:
                            139 ;;    3 bytes 
                            140 ;;
                            141 ;; Time Measures:
                            142 ;;    * 3 microseconds
                            143 ;;    * 12 CPU Cycles
                            144 ;;
                            145 ;; Details:
                            146 ;;    This macro does the same calculation than the function <cpct_getScreenPtr>. However,
                            147 ;; as it is a macro, if all 3 parameters (*VMEM*, *X*, *Y*) are constants, the calculation
                            148 ;; will be done at compile-time. This will free the binary from code or data, just putting in
                            149 ;; the result of this calculation (2 bytes with the resulting address). It is highly 
                            150 ;; recommended to use this macro instead of the function <cpct_getScreenPtr> when values
                            151 ;; involved are all constant. 
                            152 ;;
                            153 ;; Recommendations:
                            154 ;;    All constant values - Use this macro <cpctm_screenPtr_asm>
                            155 ;;    Any variable value  - Use the function <cpct_getScreenPtr>
                            156 ;;
                            157 .macro cpctm_screenPtr_asm REG16, VMEM, X, Y 
                            158    ld REG16, #VMEM + 80 * (Y / 8) + 2048 * (Y & 7) + X   ;; [3] REG16 = screenPtr
                            159 .endm
                            160 
                            161 ;;
                            162 ;; Macro: cpctm_screenPtrSym_asm
                            163 ;;
                            164 ;;    Macro that calculates the video memory location (byte pointer) of a 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 70.
Hexadecimal [16-Bits]



                            165 ;; given pair of coordinates (*X*, *Y*). Value resulting from calculation 
                            166 ;; will be assigned to the given ASZ80 local symbol.
                            167 ;;
                            168 ;; ASM Definition:
                            169 ;;    .macro <cpctm_screenPtr_asm> *SYM*, *VMEM*, *X*, *Y*
                            170 ;;
                            171 ;; Parameters:
                            172 ;;    (__) SYM   - ASZ80 local symbol to assign the result from the calculation to
                            173 ;;    (2B) VMEM  - Start of video memory buffer where (*X*, *Y*) coordinates will be calculated
                            174 ;;    (1B) X     - X Coordinate of the video memory location *in bytes* (*BEWARE! NOT in pixels!*)
                            175 ;;    (1B) Y     - Y Coordinate of the video memory location in pixels / bytes (they are same amount)
                            176 ;;
                            177 ;; Parameter Restrictions:
                            178 ;;    * *SYM* need to be a valid symbol according to ASZ80 rules for symbols
                            179 ;;    * *VMEM* will normally be the start of the video memory buffer where you want to 
                            180 ;; draw something. It could theoretically be any 16-bits value. 
                            181 ;;    * *X* must be in the range [0-79] for normal screen sizes (modes 0,1,2). Screen is
                            182 ;; always 80 bytes wide in these modes and this function is byte-aligned, so you have to 
                            183 ;; give it a byte coordinate (*NOT a pixel one!*).
                            184 ;;    * *Y* must be in the range [0-199] for normal screen sizes (modes 0,1,2). Screen is 
                            185 ;; always 200 pixels high in these modes. Pixels and bytes always coincide in vertical
                            186 ;; resolution, so this coordinate is the same in bytes that in pixels.
                            187 ;;    * If you give incorrect values to this function, the returned pointer could
                            188 ;; point anywhere in memory. This function will not cause any damage by itself, 
                            189 ;; but you may destroy important parts of your memory if you use its result to 
                            190 ;; write to memory, and you gave incorrect parameters by mistake. Take always
                            191 ;; care.
                            192 ;;
                            193 ;; Known issues:
                            194 ;;   * This macro can only be used from assembler code. It is not accessible from 
                            195 ;; C scope. For C programs, please refer to <cpct_getScreenPtr>
                            196 ;;   * This macro will work *only* with constant values, as calculations need to be 
                            197 ;; performed at assembler time.
                            198 ;;
                            199 ;; Destroyed Registers:
                            200 ;;    none
                            201 ;;
                            202 ;; Size of generated code:
                            203 ;;    none (symbols are compile-time, do not generate code)
                            204 ;;
                            205 ;; Time Measures:
                            206 ;;    - not applicable -
                            207 ;;
                            208 ;; Details:
                            209 ;;    This macro does the same calculation than the function <cpct_getScreenPtr>. However,
                            210 ;; as it is a macro, and as its parameters (*VMEM*, *X*, *Y*) must be constants, the calculation
                            211 ;; will be performed at compile-time. This will free the binary from code or data, just putting in
                            212 ;; the result of this calculation (2 bytes with the resulting address). It is highly 
                            213 ;; recommended to use this macro instead of the function <cpct_getScreenPtr> when values
                            214 ;; involved are all constant. 
                            215 ;;
                            216 ;; Recommendations:
                            217 ;;    All constant values - Use this macro <cpctm_screenPtrSym_asm> or <cpctm_screenPtr_asm> 
                            218 ;;    Any variable value  - Use the function <cpct_getScreenPtr>
                            219 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 71.
Hexadecimal [16-Bits]



                            220 .macro cpctm_screenPtrSym_asm SYM, VMEM, X, Y 
                            221    SYM = #VMEM + 80 * (Y / 8) + 2048 * (Y & 7) + X 
                            222 .endm
                            223 
                            224 ;;
                            225 ;; Macro: cpctm_setCRTCReg
                            226 ;;
                            227 ;;    Macro that sets a new value for a given CRTC register.
                            228 ;;
                            229 ;; ASM Definition:
                            230 ;;    .macro <cpctm_setCRTCReg> *HEXREG*, *HEXVAL*
                            231 ;;
                            232 ;; Parameters:
                            233 ;;    (1B) HEXREG - New value to be set for the register (in hexadecimal)
                            234 ;;    (1B) HEXVAL - Number of the register to be set (in hexadecimal)
                            235 ;;
                            236 ;; Parameter Restrictions:
                            237 ;;    * *HEXREG* has to be an hexadecimal value from 00 to 1F
                            238 ;;    * *HEXVAL* has to be an hexadecimal value. Its valid range will depend
                            239 ;;          upon the selected register that will be modified. 
                            240 ;;
                            241 ;; Known issues:
                            242 ;;   * This macro can *only* be used from assembler code. It is not accessible from 
                            243 ;; C scope. 
                            244 ;;   * This macro can only be used with *constant values*. As given values are 
                            245 ;; concatenated with a number, they must also be hexadecimal numbers. If a 
                            246 ;; register or other value is given, this macro will not work.
                            247 ;;   * Using values out of range have unpredicted behaviour and can even 
                            248 ;; potentially cause damage to real Amstrad CPC monitors. Please, use with care.
                            249 ;;
                            250 ;; Destroyed Registers:
                            251 ;;    BC
                            252 ;;
                            253 ;; Size of generated code:
                            254 ;;    10 bytes 
                            255 ;;
                            256 ;; Time Measures:
                            257 ;;    * 14 microseconds
                            258 ;;    * 56 CPU Cycles
                            259 ;;
                            260 ;; Details:
                            261 ;;    This macro expands to two CRTC commands: Register selection and Register setting.
                            262 ;; It selects the register given as first parameter, then sets its new value to 
                            263 ;; that given as second parameter. Both given parameters must be of exactly 1 byte
                            264 ;; in size and the have to be provided in hexadecimal. This is due to the way
                            265 ;; that macro expansion and concatenation works. Given values will be concatenated
                            266 ;; with another 8-bit hexadecimal value to form a unique 16-bits hexadecimal value.
                            267 ;; Therefore, any parameter given will always be considered hexadecimal.
                            268 ;;
                            269 .macro cpctm_setCRTCReg_asm HEXREG, HEXVAL
                            270    ld    bc, #0xBC'HEXREG  ;; [3] B=0xBC CRTC Select Register, C=register number to be selected
                            271    out  (c), c             ;; [4] Select register
                            272    ld    bc, #0xBD'HEXVAL  ;; [3] B=0xBD CRTC Set Register, C=Value to be set
                            273    out  (c), c             ;; [4] Set the value
                            274 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 72.
Hexadecimal [16-Bits]



                            275 
                            276 ;;//////////////////////////////////////////////////////////////////////
                            277 ;; Group: Setting the border
                            278 ;;//////////////////////////////////////////////////////////////////////
                            279 
                            280 ;;
                            281 ;; Macro: cpctm_setBorder_asm
                            282 ;;
                            283 ;;   Changes the colour of the screen border.
                            284 ;;
                            285 ;; ASM Definition:
                            286 ;;   .macro <cpctm_setBorder_asm> HWC 
                            287 ;;
                            288 ;; Input Parameters (1 Byte):
                            289 ;;   (1B) HWC - Hardware colour value for the screen border in *hexadecimal [00-1B]*.
                            290 ;;
                            291 ;; Known issues:
                            292 ;;   * *Beware!* *HWC* colour value must be given in *hexadecimal*, as it is
                            293 ;; substituted in place, and must be in the range [00-1B].
                            294 ;;   * This macro can only be used from assembler code. It is not accessible from 
                            295 ;; C scope. For C programs, please refer to <cpct_setBorder>
                            296 ;;   * This macro will work *only* with constant values, as calculations need to be 
                            297 ;; performed at assembler time.
                            298 ;;
                            299 ;; Destroyed Registers:
                            300 ;;    AF, B, HL
                            301 ;;
                            302 ;; Size of generated code:
                            303 ;;    * 16 bytes 
                            304 ;;     6b - generated code
                            305 ;;    10b - cpct_setPALColour_asm code
                            306 ;;
                            307 ;; Time Measures:
                            308 ;;    * 28 microseconds
                            309 ;;    * 112 CPU Cycles
                            310 ;;
                            311 ;; Details:
                            312 ;;   This is not a real function, but an assembler macro. Beware of using it along
                            313 ;; with complex expressions or calculations, as it may expand in non-desired
                            314 ;; ways.
                            315 ;;
                            316 ;;   For more information, check the real function <cpct_setPALColour>, which
                            317 ;; is called when using <cpctm_setBorder_asm> (It is called using 16 as *pen*
                            318 ;; argument, which identifies the border).
                            319 ;;
                            320 .macro cpctm_setBorder_asm HWC
                            321    .radix h
                            322    cpctm_setBorder_raw_asm \HWC ;; [28] Macro that does the job, but requires a number value to be passed
                            323    .radix d
                            324 .endm
                            325 .macro cpctm_setBorder_raw_asm HWC
                            326    .globl cpct_setPALColour_asm
                            327    ld   hl, #0x'HWC'10         ;; [3]  H=Hardware value of desired colour, L=Border INK (16)
                            328    call cpct_setPALColour_asm  ;; [25] Set Palette colour of the border
                            329 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 73.
Hexadecimal [16-Bits]



                            330 
                            331 ;;//////////////////////////////////////////////////////////////////////
                            332 ;; Group: Screen clearing
                            333 ;;//////////////////////////////////////////////////////////////////////
                            334 
                            335 ;;
                            336 ;; Macro: cpctm_clearScreen_asm
                            337 ;;
                            338 ;;    Macro to simplify clearing the screen.
                            339 ;;
                            340 ;; ASM Definition:
                            341 ;;   .macro <cpctm_clearScreen_asm> COL
                            342 ;;
                            343 ;; Input Parameters (1 byte):
                            344 ;;   (1B) COL - Colour pattern to be used for screen clearing. 
                            345 ;;
                            346 ;; Parameters:
                            347 ;;    *COL* - Any 8-bits value or the A register are valid. Typically, a 0x00 is used 
                            348 ;; to fill up all the screen with 0's (firmware colour 0). However, you may use it in 
                            349 ;; combination with <cpct_px2byteM0>, <cpct_px2byteM1> or a manually created colour pattern.
                            350 ;;
                            351 ;; Known issues:
                            352 ;;   * This macro can only be used from assembler code. It is not accessible from 
                            353 ;; C scope. For C programs, please refer to <cpct_clearScreen>
                            354 ;;
                            355 ;; Details:
                            356 ;;   Fills up all the standard screen (range [0xC000-0xFFFF]) with *COL* byte, the colour 
                            357 ;; pattern given.
                            358 ;;
                            359 ;; Destroyed Registers:
                            360 ;;    BC, DE, HL
                            361 ;;
                            362 ;; Size of generated code:
                            363 ;;    13 bytes 
                            364 ;;
                            365 ;; Time Measures:
                            366 ;;    98309 microseconds (*4.924 VSYNCs* on a 50Hz display).
                            367 ;;    393236 CPU Cycles 
                            368 ;;
                            369 .macro cpctm_clearScreen_asm COL
                            370    ld    hl, #0xC000    ;; [3] HL Points to Start of Video Memory
                            371    ld    de, #0xC001    ;; [3] DE Points to the next byte
                            372    ld    bc, #0x4000    ;; [3] BC = 16384 bytes to be copied
                            373    ld   (hl), #COL      ;; [3] First Byte = given Colour
                            374    ldir                 ;; [98297] Perform the copy
                            375 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 74.
Hexadecimal [16-Bits]



                             24 .include "video/colours.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;//////////////////////////////////////////////////////////////////////
                             20 ;;//////////////////////////////////////////////////////////////////////
                             21 ;; File: Colours (asm)
                             22 ;;//////////////////////////////////////////////////////////////////////
                             23 ;;//////////////////////////////////////////////////////////////////////
                             24 ;;
                             25 ;;    Constants and utilities to manage the 27 colours from
                             26 ;; the CPC Palette comfortably in assembler.
                             27 ;;
                             28 ;;
                             29 
                             30 ;; Constant: Firmware colour values
                             31 ;;
                             32 ;;    Enumerates all 27 firmware colours for assembler programs
                             33 ;;
                             34 ;; Values:
                             35 ;; (start code)
                             36 ;;   [=================================================]
                             37 ;;   | Identifier        | Val| Identifier        | Val|
                             38 ;;   |-------------------------------------------------|
                             39 ;;   | FW_BLACK          |  0 | FW_BLUE           |  1 |
                             40 ;;   | FW_BRIGHT_BLUE    |  2 | FW_RED            |  3 |
                             41 ;;   | FW_MAGENTA        |  4 | FW_MAUVE          |  5 |
                             42 ;;   | FW_BRIGHT_RED     |  6 | FW_PURPLE         |  7 |
                             43 ;;   | FW_BRIGHT_MAGENTA |  8 | FW_GREEN          |  9 |
                             44 ;;   | FW_CYAN           | 10 | FW_SKY_BLUE       | 11 |
                             45 ;;   | FW_YELLOW         | 12 | FW_WHITE          | 13 |
                             46 ;;   | FW_PASTEL_BLUE    | 14 | FW_ORANGE         | 15 |
                             47 ;;   | FW_PINK           | 16 | FW_PASTEL_MAGENTA | 17 |
                             48 ;;   | FW_BRIGHT_GREEN   | 18 | FW_SEA_GREEN      | 19 |
                             49 ;;   | FW_BRIGHT_CYAN    | 20 | FW_LIME           | 21 |
                             50 ;;   | FW_PASTEL_GREEN   | 22 | FW_PASTEL_CYAN    | 23 |
                             51 ;;   | FW_BRIGHT_YELLOW  | 24 | FW_PASTEL_YELLOW  | 25 |
                             52 ;;   | FW_BRIGHT_WHITE   | 26 |                   |    |
                             53 ;;   [=================================================]
                             54 ;; (end code)
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 75.
Hexadecimal [16-Bits]



                             55 
                     0000    56 FW_BLACK          =  0
                     0001    57 FW_BLUE           =  1
                     0002    58 FW_BRIGHT_BLUE    =  2
                     0003    59 FW_RED            =  3
                     0004    60 FW_MAGENTA        =  4
                     0005    61 FW_MAUVE          =  5
                     0006    62 FW_BRIGHT_RED     =  6
                     0007    63 FW_PURPLE         =  7
                     0008    64 FW_BRIGHT_MAGENTA =  8
                     0009    65 FW_GREEN          =  9
                     000A    66 FW_CYAN           = 10
                     000B    67 FW_SKY_BLUE       = 11
                     000C    68 FW_YELLOW         = 12
                     000D    69 FW_WHITE          = 13
                     000E    70 FW_PASTEL_BLUE    = 14
                     000F    71 FW_ORANGE         = 15
                     0010    72 FW_PINK           = 16
                     0011    73 FW_PASTEL_MAGENTA = 17
                     0012    74 FW_BRIGHT_GREEN   = 18
                     0013    75 FW_SEA_GREEN      = 19
                     0014    76 FW_BRIGHT_CYAN    = 20
                     0015    77 FW_LIME           = 21
                     0016    78 FW_PASTEL_GREEN   = 22
                     0017    79 FW_PASTEL_CYAN    = 23
                     0018    80 FW_BRIGHT_YELLOW  = 24
                     0019    81 FW_PASTEL_YELLOW  = 25
                     001A    82 FW_BRIGHT_WHITE   = 26
                             83 
                             84 ;; Constant: Hardware colour values
                             85 ;;
                             86 ;;    Enumerates all 27 hardware colours for assembler programs
                             87 ;;
                             88 ;; Values:
                             89 ;; (start code)
                             90 ;;   [=====================================================]
                             91 ;;   | Identifier        | Value| Identifier        | Value|
                             92 ;;   |-----------------------------------------------------|
                             93 ;;   | HW_BLACK          | 0x14 | HW_BLUE           | 0x04 |
                             94 ;;   | HW_BRIGHT_BLUE    | 0x15 | HW_RED            | 0x1C |
                             95 ;;   | HW_MAGENTA        | 0x18 | HW_MAUVE          | 0x1D |
                             96 ;;   | HW_BRIGHT_RED     | 0x0C | HW_PURPLE         | 0x05 |
                             97 ;;   | HW_BRIGHT_MAGENTA | 0x0D | HW_GREEN          | 0x16 |
                             98 ;;   | HW_CYAN           | 0x06 | HW_SKY_BLUE       | 0x17 |
                             99 ;;   | HW_YELLOW         | 0x1E | HW_WHITE          | 0x00 |
                            100 ;;   | HW_PASTEL_BLUE    | 0x1F | HW_ORANGE         | 0x0E |
                            101 ;;   | HW_PINK           | 0x07 | HW_PASTEL_MAGENTA | 0x0F |
                            102 ;;   | HW_BRIGHT_GREEN   | 0x12 | HW_SEA_GREEN      | 0x02 |
                            103 ;;   | HW_BRIGHT_CYAN    | 0x13 | HW_LIME           | 0x1A |
                            104 ;;   | HW_PASTEL_GREEN   | 0x19 | HW_PASTEL_CYAN    | 0x1B |
                            105 ;;   | HW_BRIGHT_YELLOW  | 0x0A | HW_PASTEL_YELLOW  | 0x03 |
                            106 ;;   | HW_BRIGHT_WHITE   | 0x0B |                   |      |
                            107 ;;   [=====================================================]
                            108 ;; (end code)
                            109 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 76.
Hexadecimal [16-Bits]



                     0014   110 HW_BLACK          = 0x14
                     0004   111 HW_BLUE           = 0x04
                     0015   112 HW_BRIGHT_BLUE    = 0x15
                     001C   113 HW_RED            = 0x1C
                     0018   114 HW_MAGENTA        = 0x18
                     001D   115 HW_MAUVE          = 0x1D
                     000C   116 HW_BRIGHT_RED     = 0x0C
                     0005   117 HW_PURPLE         = 0x05
                     000D   118 HW_BRIGHT_MAGENTA = 0x0D
                     0016   119 HW_GREEN          = 0x16
                     0006   120 HW_CYAN           = 0x06
                     0017   121 HW_SKY_BLUE       = 0x17
                     001E   122 HW_YELLOW         = 0x1E
                     0000   123 HW_WHITE          = 0x00
                     001F   124 HW_PASTEL_BLUE    = 0x1F
                     000E   125 HW_ORANGE         = 0x0E
                     0007   126 HW_PINK           = 0x07
                     000F   127 HW_PASTEL_MAGENTA = 0x0F
                     0012   128 HW_BRIGHT_GREEN   = 0x12
                     0002   129 HW_SEA_GREEN      = 0x02
                     0013   130 HW_BRIGHT_CYAN    = 0x13
                     001A   131 HW_LIME           = 0x1A
                     0019   132 HW_PASTEL_GREEN   = 0x19
                     001B   133 HW_PASTEL_CYAN    = 0x1B
                     000A   134 HW_BRIGHT_YELLOW  = 0x0A
                     0003   135 HW_PASTEL_YELLOW  = 0x03
                     000B   136 HW_BRIGHT_WHITE   = 0x0B
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 77.
Hexadecimal [16-Bits]



                             25 
                             26 ;;
                             27 ;; Constant values
                             28 ;;
                     7F00    29 GA_port        = 0x7F00  ;; 16-bit Port of the Gate Array (for the use with BC register)
                     007F    30 GA_port_byte   = 0x7F    ;; 8-bit Port of the Gate Array
                     0000    31 PAL_PENR       = 0x00    ;; Command to select a PEN register in the PAL chip
                     0040    32 PAL_INKR       = 0x40    ;; Command to set the INK of a previously selected PEN register in the PAL chip
                     00F5    33 PPI_PORT_B     = 0xF5    ;; Port B of the PPI, used to read Vsync/Jumpers/PrinterBusy/CasIn/Exp information
                     00BC    34 CRTC_SELECTREG = 0xBC    ;; CRTC Port and command "Select Register"
                     00BD    35 CRTC_SETVAL    = 0xBD    ;; CRTC Port and command "Set Value"
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 78.
Hexadecimal [16-Bits]



                             23 .include "sprites/sprites.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;#####################################################################
                             20 ;;### MODULE: Sprites
                             21 ;;#####################################################################
                             22 ;;### Functions, macros and definitions used for managing sprites
                             23 ;;### in assembler code
                             24 ;;#####################################################################
                             25 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 79.
Hexadecimal [16-Bits]



                             26 .include "sprites/flipping/flipping_macros.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2018 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;#####################################################################
                             20 ;;### MODULE: Sprites
                             21 ;;### SUBMODULE: flipping.macros
                             22 ;;#####################################################################
                             23 ;;### Macros used to speed up calculations required for to assist
                             24 ;;### flipping functions. Assembler version.
                             25 ;;#####################################################################
                             26 
                             27 ;;
                             28 ;; Macro: cpctm_ld_spbloff
                             29 ;;
                             30 ;;    Macro that calculates the offset to add to a sprite pointer to point 
                             31 ;; to it sbottom left pixel.
                             32 ;;
                             33 ;; ASM Definition:
                             34 ;;    .macro <cpctm_ld_spbloff> *REG*, *W*, *H*
                             35 ;;
                             36 ;; Acronym stands for:
                             37 ;;    ld_sbloff = Load Sprite Bottom Left Offset
                             38 ;;
                             39 ;; Parameters:
                             40 ;;    (1-2B) REG - Register that will load the resulting offset (8 or 16 bits)
                             41 ;;    (1B) W     - Width of the sprite in *bytes*
                             42 ;;    (1B) H     - Height of the sprite in pixels
                             43 ;;
                             44 ;; Parameter Restrictions:
                             45 ;;    *REG* - Must be a valid 8/16 bits register that can be immediately loaded
                             46 ;; using ld REG, #immediate.
                             47 ;;    *W*   - Must be an immediate value representing the width of the sprite 
                             48 ;; in *bytes* (Beware! Not in pixels). For sprites having interlaced mask, you 
                             49 ;; may input 2 times the width of the sprite for appropriate results.
                             50 ;;    *H*   - Must be an immediate value representing the height of the sprite 
                             51 ;; in pixels.
                             52 ;;
                             53 ;; Returns:
                             54 ;; (start code)
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 80.
Hexadecimal [16-Bits]



                             55 ;;    REG = W * (H - 1) ;; Register loaded with the offset
                             56 ;; (end code)
                             57 ;;
                             58 ;; Details:
                             59 ;;    This macro calculates the offset of the initial byte of the last row 
                             60 ;; of a given sprite (i.e. its bottom-left byte), with respect to its first
                             61 ;; byte (top-left corner). This value can easily be added to any sprite 
                             62 ;; pointer to get a pointer to the bottom-left byte. This pointer is required
                             63 ;; byte many flipping functions (like <cpct_vflipSpriteM0>). Values for width
                             64 ;; and height of the sprite must be constant immediate values. Otherwise, this
                             65 ;; macro will generate incorrect code that will fail to compile. 
                             66 ;;    The macro calculates *W* * (*H*-1) at compile-time and loads it into
                             67 ;; the given register. Please, take into account that the macro does no check
                             68 ;; about the size of the resulting values. If multiplication results in a value
                             69 ;; greater than 255, you will need to load it into a 16-bit register. You must
                             70 ;; take care of the expected size of the offset value.
                             71 ;;
                             72 ;; Known issues:
                             73 ;;    * This is a assembler macro. It cannot be called or used from C code.
                             74 ;;
                             75 .macro cpctm_ld_spbloff REG, W, H
                             76    ld    REG, #W * (H-1)
                             77 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 81.
Hexadecimal [16-Bits]



                             27 .include "sprites/pixel_macros.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;-------------------------------------------------------------------------------
                             20 ;; Title: Pixel Macros (ASM)
                             21 ;;-------------------------------------------------------------------------------
                             22 
                             23 ;; Macro: CPCTM_PEN2PIXELPATTERN_M1_ASM
                             24 ;;
                             25 ;;    Similarly to the function <cpct_pen2pixelPatternM1>, creates 1 byte in Mode 1 
                             26 ;; screen pixel format containing a pattern with all 4 pixels in the same pen colour 
                             27 ;; as given by the argument *PEN*.
                             28 ;;
                             29 ;; ASM Definition:
                             30 ;;    .macro <CPCTM_PEN2PIXELPATTERN_M1_ASM> *SYM*, *PEN*
                             31 ;;
                             32 ;; Parameters:
                             33 ;;    SYM - Name of a symbol to assign the resulting value of the calculation
                             34 ;;    PEN - ([0-3], unsigned) Pen Colour from which create the pixel pattern
                             35 ;; 
                             36 ;; Known limitations:
                             37 ;;    * It does not perform any kind of checking. Values other than unsigned integers [0-3]
                             38 ;; will produce undefined behaviour.
                             39 ;;    * As this is an assembly macro, it will only work with constant values or symbols. It
                             40 ;; will produce assembly errors when used with other kind of values.
                             41 ;;
                             42 ;; Details:
                             43 ;;    This macro does the same operations the function <cpct_pen2pixelPatternM1> does, but
                             44 ;; with an explicit operation that can be calculated at compile-time, producing a single 
                             45 ;; precalculated byte in your final binary (if you use it with constant values).
                             46 ;;
                             47 ;;    For more details on this operations, consult <cpct_pen2pixelPatternM1> help.
                             48 ;;
                             49 ;; Use example:
                             50 ;; (start code)
                             51 ;;    ;// Simple function that changes the Skin Colour 
                             52 ;;    ;// of a given Alien Sprite into Cyan (Alien Skin is yellow normally)  
                             53 ;;    ;// HL = Pointer to Alien Sprite
                             54 ;;    ;// BC = Size of Alien Sprite
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 82.
Hexadecimal [16-Bits]



                             55 ;;    changeAlienSkinColourToCyan:
                             56 ;;       CPCTM_PEN2PIXELPATTERN_M1_ASM OldPen, 1 ;// Produces 'OldPen = 0xF0'
                             57 ;;       CPCTM_PEN2PIXELPATTERN_M1_ASM NewPen, 2 ;// Produces 'NewPen = 0x0F'
                             58 ;;       ld    de, #(OldPen << 8) | NewPen
                             59 ;;       call  cpct_spriteColourizeM1_asm
                             60 ;;       ret
                             61 ;;    
                             62 ;;    ;// Simple function that restores the Skin Colour 
                             63 ;;    ;// of a given Alien Sprite to yellow (after being changed to Cyan)  
                             64 ;;    ;// HL = Pointer to Alien Sprite
                             65 ;;    ;// BC = Size of Alien Sprite
                             66 ;;    restoreAlienSkinColourToYellow:
                             67 ;;       CPCTM_PEN2PIXELPATTERN_M1_ASM OldPen, 2 ;// Produces 'OldPen = 0x0F'
                             68 ;;       CPCTM_PEN2PIXELPATTERN_M1_ASM NewPen, 1 ;// Produces 'NewPen = 0xF0'
                             69 ;;       ld    de, #(OldPen << 8) | NewPen
                             70 ;;       call  cpct_spriteColourizeM1_asm
                             71 ;;       ret
                             72 ;; (end code)
                             73 ;;
                             74 .mdelete CPCTM_PEN2PIXELPATTERN_M1_ASM
                             75 .macro CPCTM_PEN2PIXELPATTERN_M1_ASM _Sym, _Pen
                             76    _Sym = ((((_Pen) & 1) << 7) | (((_Pen) & 1) << 6) | (((_Pen) & 1) << 5) | (((_Pen) & 1) << 4) | (((_Pen) & 2) << 2) | (((_Pen) & 2) << 1) | (((_Pen) & 2)     ) | (((_Pen) & 2) >> 1))
                             77 .endm  
                             78 
                             79 ;;
                             80 ;; Macro: CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM
                             81 ;;
                             82 ;;    Similarly to the function <cpct_pens2pixelPatternPairM1>, creates a 16 bits 
                             83 ;; value in Mode 1 screen pixel format, containing two pattern with all 4 pixels in 
                             84 ;; the same pen colour as given by the arguments *OldPen* and *NewPen*. 
                             85 ;;
                             86 ;; C Definition:
                             87 ;;    .macro <CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM> *SYM*, *OldPen*, *NewPen*
                             88 ;;
                             89 ;; Parameters:
                             90 ;;    SYM    - Name of a symbol to assign the resulting value of the calculation
                             91 ;;    OldPen - ([0-3], unsigned) Pen Colour to be found and replaced in <cpct_spriteColourizeM1>
                             92 ;;    NewPen - ([0-3], unsigned) New Pen Colour to be inserted in <cpct_spriteColourizeM1>
                             93 ;; 
                             94 ;; Known limitations:
                             95 ;;    * It does not perform any kind of checking. Values other than unsigned integers [0-3]
                             96 ;; will produce undefined behaviour.
                             97 ;;    * As this is a macro, this is designed only for CONSTANT values, to perform compile-time
                             98 ;; calculations. If you use it with variables, it will generate poor & slow code. Moreover, 
                             99 ;; generated code will be repeated if the macro is used multiple times, bloating your binary.
                            100 ;; Use <cpct_pen2pixelPatternM1> function for variables instead.
                            101 ;;
                            102 ;; Details:
                            103 ;;    This macro does the same operations the function <cpct_pens2pixelPatternPairM1> does, 
                            104 ;; but with an explicit operation that can be calculated at compile-time, producing a single 
                            105 ;; precalculated 16-bits value in your final binary (if you use it with constant values).
                            106 ;;
                            107 ;;    For more details on this operations, consult <cpct_pens2pixelPatternPairM1> help.
                            108 ;;
                            109 ;; Use example:
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 83.
Hexadecimal [16-Bits]



                            110 ;; (start code)
                            111 ;; ;// Simple function that changes the Skin Colour 
                            112 ;; ;// of a given Alien Sprite into Cyan (2) (Alien Skin is yellow (1) normally)  
                            113 ;; ;// HL = Pointer to Alien Sprite
                            114 ;; ;// BC = Size of Alien Sprite
                            115 ;; changeAlienSkinColourToCyan:
                            116 ;;    CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM rplcPat, 1, 2   ;// Change Pen 1 into Pen 2
                            117 ;;    ld    de, #rplcPat                                 ;// rplcPat = 0xF00F
                            118 ;;    call  cpct_spriteColourizeM1_asm
                            119 ;;    ret
                            120 ;;
                            121 ;; ;// Simple function that restores the Skin Colour 
                            122 ;; ;// of a given Alien Sprite to yellow (1) (after being changed to Cyan (2) )
                            123 ;; ;// HL = Pointer to Alien Sprite
                            124 ;; ;// BC = Size of Alien Sprite
                            125 ;; restoreAlienSkinColourToYellow:
                            126 ;;    CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM rplcPat, 2, 1   ;// Change Pen 2 into Pen 1
                            127 ;;    ld    de, #rplcPat                                 ;// rplcPat = 0x0FF0
                            128 ;;    call  cpct_spriteColourizeM1_asm
                            129 ;;    ret
                            130 ;; (end code)
                            131 ;;
                            132 .mdelete CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM
                            133 .macro CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM _Sym, _OldPen, _NewPen
                            134    CPCTM_PEN2PIXELPATTERN_M1_ASM _Sym'__h, _OldPen
                            135    CPCTM_PEN2PIXELPATTERN_M1_ASM _Sym'__l, _NewPen
                            136    _Sym = (_Sym'__h << 8) | _Sym'__l
                            137 .endm  
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 84.
Hexadecimal [16-Bits]



                             14 .include "renderfunctions.h.s"
                              1 ;;####################################################################
                              2 ;;# GNU Free Documentation License                                   #
                              3 ;;# Version 1.3, 3 November 2008                                     #
                              4 ;;#                                                                  #
                              5 ;;# Copyright (C) 2021 Lumina                                        #
                              6 ;;# (Paula Garcia Morales, Laura Gil Lopez, Jorge Perez Dominguez)   #
                              7 ;;#                                                                  #
                              8 ;;# Everyone is permitted to copy and distribute verbatim copies     #
                              9 ;;# of this license document, but changing it is not allowed.        #
                             10 ;;####################################################################
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 85.
Hexadecimal [16-Bits]



                             15 
   6BF7                      16 mydrawsolidbox20x32::
                             17  ;; COPY2HL_n_INC Macro 
                             18     ;;  Copy Register To (HL) and Increment HL
                             19     ;; INPUT:
                             20     ;;    reg8 - any 8-bits register
                             21     ;;
                             22     .macro COPY2HL_n_INC reg8
                             23         ld   (hl), reg8         ;; [2] (HL) = reg8
                             24         inc   hl                ;; [2] HL++  
                             25     .endm
                             26 
                             27     ;; DrawSolidBox code starts here (immediately after getting parameters from stack)
   6BF7 62            [ 4]   28     ld     h, d             ;; [1] / HL = DE  
   6BF8 6B            [ 4]   29     ld     l, e             ;; [1] \ HL Points to Video Memory, and DE holds a copy which won't be modified
   6BF9 5F            [ 4]   30     ld     e, a             ;; [1] E=A (Colour pattern)
                             31     
                             32     ;; Modify code using width to jump to ensure
                             33     ;; that only width bytes are copied each line 
   6BFA 3E 80         [ 7]   34     ld     a, #128          ;; [2] We need to jump 128 bytes (64 COPY2HL_n_INC*2 bytes) minus the width of the sprite * 2 (2B)
   6BFC 91            [ 4]   35     sub    c                ;; [1]  to do as much COPY2HL_n_INC as bytes the Sprite is wide
   6BFD 91            [ 4]   36     sub    c                ;; [1]
   6BFE 32 04 6C      [13]   37     ld (_jr_offset), a      ;; [4] Modify JR data to create the jump we need
                             38     
   6C01 4B            [ 4]   39     ld     c, e             ;; [1] C=E (Colour pattern)
   6C02 5D            [ 4]   40     ld     e, l             ;; [1] Restore DE = HL
                             41 
   6C03                      42     _next_line:
                     000D    43     _jr_offset = .+1
   000C                      44    jr__0                   ;; [3] Self modifying instruction: the '00' will be substituted by the required jump forward. 
   6C03 18 00                 1    .DW #0x0018  ;; JR #00 (Normally used as a modifiable jump, as jr 0 is an infinite loop)
                             45                            ;; ... (Note: Writting JR 0 compiles but later it gives odd linking errors)  
                             46 
                             47     ;; 64 COPY2HL_n_INC c, which are able to copy up to 64 bytes each time.
                             48     ;; That means that each Sprite line should be 64 bytes width at most.
                             49     ;; The JR instruction at the start makes us ignore the COPY2HL_n_INC we don't need 
                             50     ;; (jumping over them) That ensures we will be doing only as much COPY2HL_n_INC 
                             51     ;; as bytes our sprite is wide.
                             52     .rept 64
                             53         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
                             54     .endm
   000E                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C05 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C06 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0010                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C07 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C08 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0012                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C09 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C0A 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0014                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C0B 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C0C 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0016                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C0D 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 86.
Hexadecimal [16-Bits]



   6C0E 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0018                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C0F 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C10 23            [ 6]    2         inc   hl                ;; [2] HL++  
   001A                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C11 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C12 23            [ 6]    2         inc   hl                ;; [2] HL++  
   001C                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C13 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C14 23            [ 6]    2         inc   hl                ;; [2] HL++  
   001E                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C15 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C16 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0020                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C17 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C18 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0022                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C19 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C1A 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0024                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C1B 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C1C 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0026                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C1D 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C1E 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0028                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C1F 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C20 23            [ 6]    2         inc   hl                ;; [2] HL++  
   002A                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C21 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C22 23            [ 6]    2         inc   hl                ;; [2] HL++  
   002C                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C23 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C24 23            [ 6]    2         inc   hl                ;; [2] HL++  
   002E                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C25 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C26 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0030                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C27 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C28 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0032                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C29 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C2A 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0034                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C2B 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C2C 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0036                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C2D 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C2E 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0038                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C2F 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C30 23            [ 6]    2         inc   hl                ;; [2] HL++  
   003A                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C31 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C32 23            [ 6]    2         inc   hl                ;; [2] HL++  
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 87.
Hexadecimal [16-Bits]



   003C                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C33 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C34 23            [ 6]    2         inc   hl                ;; [2] HL++  
   003E                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C35 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C36 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0040                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C37 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C38 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0042                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C39 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C3A 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0044                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C3B 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C3C 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0046                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C3D 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C3E 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0048                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C3F 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C40 23            [ 6]    2         inc   hl                ;; [2] HL++  
   004A                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C41 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C42 23            [ 6]    2         inc   hl                ;; [2] HL++  
   004C                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C43 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C44 23            [ 6]    2         inc   hl                ;; [2] HL++  
   004E                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C45 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C46 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0050                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C47 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C48 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0052                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C49 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C4A 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0054                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C4B 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C4C 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0056                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C4D 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C4E 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0058                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C4F 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C50 23            [ 6]    2         inc   hl                ;; [2] HL++  
   005A                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C51 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C52 23            [ 6]    2         inc   hl                ;; [2] HL++  
   005C                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C53 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C54 23            [ 6]    2         inc   hl                ;; [2] HL++  
   005E                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C55 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C56 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0060                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 88.
Hexadecimal [16-Bits]



   6C57 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C58 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0062                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C59 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C5A 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0064                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C5B 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C5C 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0066                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C5D 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C5E 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0068                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C5F 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C60 23            [ 6]    2         inc   hl                ;; [2] HL++  
   006A                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C61 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C62 23            [ 6]    2         inc   hl                ;; [2] HL++  
   006C                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C63 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C64 23            [ 6]    2         inc   hl                ;; [2] HL++  
   006E                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C65 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C66 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0070                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C67 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C68 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0072                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C69 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C6A 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0074                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C6B 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C6C 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0076                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C6D 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C6E 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0078                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C6F 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C70 23            [ 6]    2         inc   hl                ;; [2] HL++  
   007A                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C71 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C72 23            [ 6]    2         inc   hl                ;; [2] HL++  
   007C                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C73 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C74 23            [ 6]    2         inc   hl                ;; [2] HL++  
   007E                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C75 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C76 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0080                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C77 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C78 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0082                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C79 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C7A 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0084                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C7B 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 89.
Hexadecimal [16-Bits]



   6C7C 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0086                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C7D 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C7E 23            [ 6]    2         inc   hl                ;; [2] HL++  
   0088                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C7F 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C80 23            [ 6]    2         inc   hl                ;; [2] HL++  
   008A                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C81 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C82 23            [ 6]    2         inc   hl                ;; [2] HL++  
   008C                       1         COPY2HL_n_INC c         ;; [4] (HL) = c, ++HL { Repeated 64 times }
   6C83 71            [ 7]    1         ld   (hl), c         ;; [2] (HL) = reg8
   6C84 23            [ 6]    2         inc   hl                ;; [2] HL++  
                             55     
   6C85 05            [ 4]   56     dec    b                ;; [1] Another line finished: we discount it from D
   6C86 C8            [11]   57     ret    z                ;; [2/4] If that was the last line, we safely return
                             58 
                             59     ;; Jump destination pointer to the start of the next line in video memory
   6C87 3E 08         [ 7]   60     ld     a, #0x8          ;; [2] / HL = DE = DE + 0x800
   6C89 82            [ 4]   61     add    d                ;; [1] | DE holds the pointer to the start of this line
   6C8A 67            [ 4]   62     ld     h, a             ;; [1] | Adding 0x800 makes HL point to the start of
   6C8B 57            [ 4]   63     ld     d, a             ;; [1] | the next line to be filled in with values
   6C8C 6B            [ 4]   64     ld     l, e             ;; [1] \ DE holds a copy which won't be modified
                             65     ;; We check if we have crossed video memory boundaries (which will happen every 8 lines). 
                             66     ;; ... If that happens, bits 13,12 and 11 of destination pointer will be 0
   6C8D E6 38         [ 7]   67     and   #0x38             ;; [2] leave out only bits 13,12 and 11 from new memory address (00xxx000 00000000)
   6C8F C2 03 6C      [10]   68     jp    nz, _next_line    ;; [3] If any bit from {13,12,11} is not 0, we are still inside 
                             69                             ;; ... video memory boundaries, so proceed with next line
                             70 
                             71     ;; Every 8 lines, we cross the 16K video memory boundaries and have to
                             72     ;; reposition destination pointer. That means our next line is 16K-0x50 bytes back
                             73     ;; which is the same as advancing 48K+0x50 = 0xC050 bytes, as memory is 64K 
                             74     ;; and our 16bit pointers cycle over it
   6C92 21 28 C0      [10]   75     ld    hl, #0xC028       ;; [3] We advance destination pointer to next line
   6C95 19            [11]   76     add   hl, de            ;; [3] HL = DE + 0xC050
   6C96 54            [ 4]   77     ld     d, h             ;; [1] / DE = HL
   6C97 5D            [ 4]   78     ld     e, l             ;; [1] \
   6C98 C3 03 6C      [10]   79     jp   _next_line         ;; [3] Continue copying   
   6C9B C9            [10]   80 ret
                             81 
                             82 
                             83 
                             84 
   6C9C                      85 mydrawSprite_20x32::
                             86    ;; Modify code using width to jump in drawSpriteWidth
   6C9C 3E 7E         [ 7]   87       ld    a, #126   ;; [2] We need to jump 126 bytes (63 LDIs*2 bytes) minus the width of the sprite * 2 (2B)
   6C9E 91            [ 4]   88       sub   c                 ;; [1]    to do as much LDIs as bytes the Sprite is wide
   6C9F 91            [ 4]   89       sub   c                 ;; [1]
   6CA0 32 AA 6C      [13]   90       ld (ds_drawSpriteWidth+#4), a ;; [4] Modify JR data to create the jump we need
                             91 
   6CA3 78            [ 4]   92       ld    a, b              ;; [1] A = Height (used as counter for the number of lines we have to copy)
   6CA4 EB            [ 4]   93       ex   de, hl             ;; [1] Instead of jumping over the next line, we do the inverse operation because 
                             94                               ;; .... it is only 4 cycles and not 10, as a JP would be)
                             95 
   6CA5                      96    ds_drawSpriteWidth_next:
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 90.
Hexadecimal [16-Bits]



                             97       ;; NEXT LINE
   6CA5 EB            [ 4]   98       ex   de, hl             ;; [1] HL and DE are exchanged every line to do 16bit maths with DE. 
                             99                               ;; .... This line reverses it before proceeding to copy the next line.
   6CA6                     100    ds_drawSpriteWidth:
                            101       ;; Draw a sprite-line of n bytes
   6CA6 01 00 08      [10]  102       ld   bc, #0x800  ;; [3] 0x800 bytes is the distance in memory from one pixel line to the next within every 8 pixel lines
                            103                        ;; ... Each LDI performed will decrease this by 1, as we progress through memory copying the present line
   00B2                     104       jr__0            ;; [3] Self modifying instruction: the '00' will be substituted by the required jump forward. 
   6CA9 18 00                 1    .DW #0x0018  ;; JR #00 (Normally used as a modifiable jump, as jr 0 is an infinite loop)
                            105                        ;; ... (Note: Writting JR 0 compiles but later it gives odd linking errors)
   6CAB ED A0         [16]  106       ldi              ;; [5] <| 63 LDIs, which are able to copy up to 63 bytes each time.
   6CAD ED A0         [16]  107       ldi              ;; [5]  | That means that each Sprite line should be 63 bytes width at most.
   6CAF ED A0         [16]  108       ldi              ;; [5]  | The JR instruction at the start makes us ignore the LDIs we don't need 
   6CB1 ED A0         [16]  109       ldi              ;; [5] <| (jumping over them) That ensures we will be doing only as much LDIs 
   6CB3 ED A0         [16]  110       ldi              ;; [5] <| as bytes our sprite is wide.
   6CB5 ED A0         [16]  111       ldi              ;; [5]  |
   6CB7 ED A0         [16]  112       ldi              ;; [5]  |
   6CB9 ED A0         [16]  113       ldi              ;; [5] <|
   6CBB ED A0         [16]  114       ldi              ;; [5] <|
   6CBD ED A0         [16]  115       ldi              ;; [5]  |
   6CBF ED A0         [16]  116       ldi              ;; [5]  |
   6CC1 ED A0         [16]  117       ldi              ;; [5] <|
   6CC3 ED A0         [16]  118       ldi              ;; [5] <|
   6CC5 ED A0         [16]  119       ldi              ;; [5]  |
   6CC7 ED A0         [16]  120       ldi              ;; [5]  |
   6CC9 ED A0         [16]  121       ldi              ;; [5] <|
   6CCB ED A0         [16]  122       ldi              ;; [5] <|
   6CCD ED A0         [16]  123       ldi              ;; [5]  |
   6CCF ED A0         [16]  124       ldi              ;; [5]  |
   6CD1 ED A0         [16]  125       ldi              ;; [5] <|
   6CD3 ED A0         [16]  126       ldi              ;; [5]  |
   6CD5 ED A0         [16]  127       ldi              ;; [5] <|
   6CD7 ED A0         [16]  128       ldi              ;; [5] <|
   6CD9 ED A0         [16]  129       ldi              ;; [5]  |
   6CDB ED A0         [16]  130       ldi              ;; [5]  |
   6CDD ED A0         [16]  131       ldi              ;; [5] <|
   6CDF ED A0         [16]  132       ldi              ;; [5] <|
   6CE1 ED A0         [16]  133       ldi              ;; [5]  |
   6CE3 ED A0         [16]  134       ldi              ;; [5]  |
   6CE5 ED A0         [16]  135       ldi              ;; [5] <|
   6CE7 ED A0         [16]  136       ldi              ;; [5]  |
   6CE9 ED A0         [16]  137       ldi              ;; [5] <|
   6CEB ED A0         [16]  138       ldi              ;; [5] <|
   6CED ED A0         [16]  139       ldi              ;; [5]  |
   6CEF ED A0         [16]  140       ldi              ;; [5]  |
   6CF1 ED A0         [16]  141       ldi              ;; [5] <|
   6CF3 ED A0         [16]  142       ldi              ;; [5] <|
   6CF5 ED A0         [16]  143       ldi              ;; [5]  |
   6CF7 ED A0         [16]  144       ldi              ;; [5]  |
   6CF9 ED A0         [16]  145       ldi              ;; [5] <|
   6CFB ED A0         [16]  146       ldi              ;; [5]  |
   6CFD ED A0         [16]  147       ldi              ;; [5] <|
   6CFF ED A0         [16]  148       ldi              ;; [5] <|
   6D01 ED A0         [16]  149       ldi              ;; [5]  |
   6D03 ED A0         [16]  150       ldi              ;; [5]  |
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 91.
Hexadecimal [16-Bits]



   6D05 ED A0         [16]  151       ldi              ;; [5] <|
   6D07 ED A0         [16]  152       ldi              ;; [5] <|
   6D09 ED A0         [16]  153       ldi              ;; [5]  |
   6D0B ED A0         [16]  154       ldi              ;; [5]  |
   6D0D ED A0         [16]  155       ldi              ;; [5] <|
   6D0F ED A0         [16]  156       ldi              ;; [5]  |
   6D11 ED A0         [16]  157       ldi              ;; [5] <|
   6D13 ED A0         [16]  158       ldi              ;; [5] <|
   6D15 ED A0         [16]  159       ldi              ;; [5]  |
   6D17 ED A0         [16]  160       ldi              ;; [5]  |
   6D19 ED A0         [16]  161       ldi              ;; [5] <|
   6D1B ED A0         [16]  162       ldi              ;; [5] <|
   6D1D ED A0         [16]  163       ldi              ;; [5]  |
   6D1F ED A0         [16]  164       ldi              ;; [5]  |
   6D21 ED A0         [16]  165       ldi              ;; [5] <|
   6D23 ED A0         [16]  166       ldi              ;; [5] <|
   6D25 ED A0         [16]  167       ldi              ;; [5]  |
   6D27 ED A0         [16]  168       ldi              ;; [5]  |
                            169     
   6D29 3D            [ 4]  170       dec   a          ;; [1] Another line finished: we discount it from A
   6D2A C8            [11]  171       ret   z          ;; [2/4] If that was the last line, we safely return
                            172 
                            173       ;; Jump destination pointer to the start of the next line in video memory
   6D2B EB            [ 4]  174       ex   de, hl      ;; [1] DE has destination, but we have to exchange it with HL to be able to do 16bit maths
   6D2C 09            [11]  175       add  hl, bc      ;; [3] We add 0x800 minus the width of the sprite (BC) to destination pointer 
   6D2D 47            [ 4]  176       ld    b, a       ;; [1] Save A into B (B = A)
   6D2E 7C            [ 4]  177       ld    a, h       ;; [1] We check if we have crossed video memory boundaries (which will happen every 8 lines). 
                            178                        ;; .... If that happens, bits 13,12 and 11 of destination pointer will be 0
   6D2F E6 38         [ 7]  179       and   #0x38      ;; [2] leave out only bits 13,12 and 11 from new memory address (00xxx000 00000000)
   6D31 78            [ 4]  180       ld    a, b       ;; [1] Restore A from B (A = B)
   6D32 C2 A5 6C      [10]  181       jp   nz, ds_drawSpriteWidth_next ;; [3] If any bit from {13,12,11} is not 0, we are still inside 
                            182                                        ;; .... video memory boundaries, so proceed with next line
                            183 
                            184       ;; Every 8 lines, we cross the 16K video memory boundaries and have to
                            185       ;; reposition destination pointer. That means our next line is 16K-0x50 bytes back
                            186       ;; which is the same as advancing 48K+0x50 = 0xC050 bytes, as memory is 64K 
                            187       ;; and our 16bit pointers cycle over it
   6D35 01 28 C0      [10]  188       ld   bc, #0xC028 ;; [3] We advance destination pointer to next line
   6D38 09            [11]  189       add  hl, bc                ;; [3]  HL += 0xC050
   6D39 C3 A5 6C      [10]  190       jp ds_drawSpriteWidth_next ;; [3] Continue copying
                            191 
   6D3C C9            [10]  192 ret
                            193 
                            194 
   6D3D                     195 mygetScrPrt_20x32::
                            196 
                            197     ;; Add up X coordinate to screen_memory, so that DE = (screen_start + x)
                            198     ;; (DE += C, as DE = screen_memory, and C = x coordinate) 
   6D3D 7B            [ 4]  199     ld    a, e     ;; [1] / E = E + x   (As C = x)
   6D3E 81            [ 4]  200     add   c        ;; [1] |   ( If E + x > 0xFF, Carry is set. We must Add it to D )
   6D3F 5F            [ 4]  201     ld    e, a     ;; [1] |
   6D40 8A            [ 4]  202     adc   d        ;; [1] | D = D + (C + A) + Carry   (E = C + A)
   6D41 93            [ 4]  203     sub   e        ;; [1] | D = D + Carry
   6D42 57            [ 4]  204     ld    d, a     ;; [1] |   (If E + x did set carry, this will do D += 1, else D += 0)
                            205 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 92.
Hexadecimal [16-Bits]



                            206     ;; Let y' = [ y / 8 ] = int(y / 8) (Integer division by 8)
                            207     ;; Calculate 40y' = (32 + 8)y' (0x28 * y')
   6D43 78            [ 4]  208     ld    a, b     ;; [1] A = y coordinate (which is stored in b)
   6D44 E6 F8         [ 7]  209     and   #0xF8    ;; [2] A = 8y'   ( and 0xF8 is the same as 8 * int(y / 8) = 8y' )
   6D46 6F            [ 4]  210     ld    l, a     ;; [1] | HL = 8y'  (H = 0, L = 8y')
   6D47 26 00         [ 7]  211     ld    h, #0    ;; [2] |
   6D49 78            [ 4]  212     ld    a, b     ;; [1] A = y coordinate (Save for later use, freeing BC)
   6D4A 44            [ 4]  213     ld    b, h     ;; [1] | BC = 8y'
   6D4B 4D            [ 4]  214     ld    c, l     ;; [1] |
   6D4C 29            [11]  215     add  hl, hl    ;; [3] HL = 8y' + 8y'   = 16y'
   6D4D 29            [11]  216     add  hl, hl    ;; [3] HL = 16y' + 16y' = 32y'
   6D4E 09            [11]  217     add  hl, bc    ;; [3] HL = 32y' + 8y'  = 40y'
                            218 
                            219     ;; Calculate 2048 * (y % 8)  (0x800 * (y % 8))
   6D4F E6 07         [ 7]  220     and   #0x07    ;; [2]  A = y % 8  (A had y coordinate)
   6D51 07            [ 4]  221     rlca           ;; [1]  A = 2 (y % 8)
   6D52 07            [ 4]  222     rlca           ;; [1]  A = 4 (y % 8)
   6D53 07            [ 4]  223     rlca           ;; [1]  A = 8 (y % 8)
                            224     ;; Now [A 0x00] (Using a as HSB) would be 0x100 * A = 0x100 * 8 (y % 8 )
                            225     ;; So, we only have to add A to H in order to have HL += 0x100 * 8 (y % 8)
   6D54 84            [ 4]  226     add   h        ;; [1]  | HL += 0x100 * 8 (y % 8)
   6D55 67            [ 4]  227     ld    h, a     ;; [1]  |
                            228 
                            229     ;; Add up everything and return
   6D56 19            [11]  230     add  hl, de    ;; [3] HL = 40 * [y / 8] + 2048 * (y % 8) + (screen_start + x)
                            231 
   6D57 C9            [10]  232 ret            ;; [3] Return
                            233 
                            234 
                            235 
   6D58                     236 mysetdrawtilemap::
                            237    ;; Declare global symbols used here
                            238 
                            239    .globl pp_tilesetPtr 
                            240    .globl pp_widthHeightSet
                            241    .globl pp_restoreWidth
                            242    .globl pp_updateWidth
                            243    .globl pp_incrementHL
                            244    .globl pp_restoreI
                            245 
                            246       ;; Set (tilesetPtr) placeholder
   6D58 22 9C 6D      [16]  247       ld (pp_tilesetPtr), hl     ;; [5] Save HL into tilesetPtr placeholder
                            248 
                            249       ;; Set all Width values required by drawTileMap4x8_ag. First two values
                            250       ;; (heightSet, widthSet) are values used at the start of the function for
                            251       ;; initialization. The other one (restoreWidth) restores the value of the
                            252       ;; width after each loop, as it is used as counter and decremented to 0.
   6D5B ED 43 86 6D   [20]  253       ld (pp_widthHeightSet), bc ;; [6]
   6D5F 79            [ 4]  254       ld     a, c                    ;; [1]
   6D60 32 12 6E      [13]  255       ld (pp_restoreWidth), a    ;; [4] Set restore width after each loop placeholder
                            256       
                            257       ;; In order to properly show a view of (Width x Height) tiles from within the
                            258       ;; tilemap, every time a row has been drawn, we need to move tilemap pointer
                            259       ;; to the start of the next row. As the complete tilemap is (tilemapWidth) bytes
                            260       ;; wide and we are showing a view only (Width) tiles wide, to complete (tilemapWidth)
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 93.
Hexadecimal [16-Bits]



                            261       ;; bytes at each loop, we need to add (tilemapWidth - Width) bytes.
   016C                     262       sub_de_a                      ;; [7] tilemapWidth - Width
   016C                       1    sub_REGPAIR_a  d, e
                              1    ;; First Perform A' = A - 1 - RL 
                              2    ;; (Inverse subtraction minus 1, used  to test for Carry, needed to know when to subtract 1 from RH)
   6D63 3D            [ 4]    3    dec    a          ;; [1] --A (In case A == RL, inverse subtraction should produce carry not to decrement RH)
   6D64 93            [ 4]    4    sub   e          ;; [1] A' = A - 1 - RL
   6D65 38 01         [12]    5    jr     c, 10000$  ;; [2/3] If A <= RL, Carry will be produced, and no decrement of RH is required, so jump over it
   6D67 15            [ 4]    6      dec   d        ;; [1] --RH (A > RL, so RH must be decremented)
   6D68                       7 10000$:   
                              8    ;; Now invert A to get the subtraction we wanted 
                              9    ;; { RL' = -A' - 1 = -(A - 1 - RL) - 1 = RL - A }
   6D68 2F            [ 4]   10    cpl            ;; [1] A'' = RL - A (Original subtraction we wanted, calculated trough one's complement of A')
   6D69 5F            [ 4]   11    ld    e, a    ;; [1] Save into RL (RL' = RL - A)
   6D6A ED 53 15 6E   [20]  263       ld (pp_updateWidth), de   ;; [6] set the difference in updateWidth placeholder
                            264 
                            265       ;; Calculate HL update that has to be performed for each new row loop.
                            266       ;; HL advances through video memory as tiles are being drawn. When a row
                            267       ;; is completely drawn, HL is at the right-most place of the screen.
                            268       ;; As each screen row has a width of 0x50 bytes (in standard modes), 
                            269       ;; if the Row that has been drawn has less than 0x50 bytes, this difference
                            270       ;; has to be added to HL to make it point to the start of next screen row.
                            271       ;; As each tile is 4-bytes wide, this amount is (0x50 - 4*Width). Also,
                            272       ;; taking into account that 4*Width cannot exceed 255 (1-byte), a maximum
                            273       ;; of 63 tiles can be considered as Width.
   6D6E 79            [ 4]  274       ld     a, c                ;; [1] A = Width
   6D6F 87            [ 4]  275       add    a                   ;; [1] A = 2*Width
   6D70 87            [ 4]  276       add    a                   ;; [1] A = 4*Width
   6D71 2F            [ 4]  277       cpl                        ;; [1] A = -4*Width - 1
   6D72 C6 29         [ 7]  278       add #0x28 + 1              ;; [2] A = -4*Width-1 + 0x50+1 = 0x50 - 4*Width
   6D74 32 0D 6E      [13]  279       ld (pp_incrementHL), a ;; [4] Set HL increment in its placeholder
                            280 
                            281       ;; Set the restoring of Interrupt Status. drawTileMap4x8_ag disables interrupts before
                            282       ;; drawing each tile row, and then it restores previous interrupt status after the row
                            283       ;; has been drawn. To do this, present interrupt status is considered. This code detects
                            284       ;; present interrupt status and sets a EI/DI instruction at the end of tile row drawing
                            285       ;; to either reactivate interrupts or preserve interrupts disabled.
   6D77 ED 57         [ 9]  286       ld     a, i             ;; [3] P/V flag set to current interrupt status (IFF2 flip-flop)
   6D79 3E FB         [ 7]  287       ld     a, #opc_EI       ;; [2] A = Opcode for Enable Interrupts instruction (EI = 0xFB)
   6D7B EA 80 6D      [10]  288       jp    pe, int_enabled   ;; [3] If interrupts are enabled, EI is the appropriate instruction
   6D7E 3E F3         [ 7]  289         ld   a, #opc_DI       ;; [2] Otherwise, it is DI, so A = Opcode for Disable Interrupts instruction (DI = 0xF3)
                            290    
   6D80                     291    int_enabled:
   6D80 32 07 6E      [13]  292       ld (pp_restoreI), a ;; [4] Set the Restore Interrupt status at the end with corresponding DI or EI
                            293 
   6D83 C9            [10]  294 ret                     ;; [3] Return to caller
                            295 
                            296 
                            297 
   6D84                     298 mydrawtilemap::
                            299 
                            300    ;;;;
                            301    .macro drawSpriteRow MOV
                            302       pop   bc             ;; [3] Get next 2 sprite bytes
                            303       ld  (hl), c          ;; [2] Copy byte 1
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 94.
Hexadecimal [16-Bits]



                            304       MOV    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
                            305       ld  (hl), b          ;; [2] Copy byte 2
                            306       MOV    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
                            307       pop   bc             ;; [3] Get next 2 sprite bytes
                            308       ld  (hl), c          ;; [2] Copy byte 3
                            309       MOV    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
                            310       ld  (hl), b          ;; [2] Copy byte 4
                            311    .endm
                            312    ;;
                            313    ;;;; LOCAL MACRO: drawTilemap4x8_ag_gen
                            314    ;;;;    All code function is defined as a macro to prevent code duplication on reuse
                            315    ;;;; between ASM/C bindings. As setDrawtilemap4x8_ag ASM/C bindings have to couple
                            316    ;;;; each one with its correct version, different global labels can be generated
                            317    ;;;; from the same source using different pp_parameters. 
                            318    ;;;;    Therefore, ASM/C bindings include this file and use this macro to generate
                            319    ;;;; specific source code that will be compiled, with the appropriate labels.
                            320    ;;;;
                            321    ;;.macro drawTilemap4x8_ag_gen pp_   ;; Set Height and Width of the View Window of the current 
                            322    ;;   ;; tilemap to be drawn (This is set by setDrawTilemap4x8_agf)
                     018F   323    widthHeightSet = .+2
   6D84 FD 21 00 00   [14]  324       ld iy, #0000         ;; [4] IYL=View Window Width, IYH=View Window Height
                            325 
   6D88                     326    nextRow:
                            327       ;; Disable interrupts and save SP before starting
   6D88 F3            [ 4]  328       di                   ;; [1] Disable interrupts before starting (we are using SP to read values)
   6D89 ED 73 05 6E   [20]  329       ld (restoreSP), sp   ;; [6] Save actual SP to restore it in the end
                            330       ;; Start of the code that draws the next tile of the present row being drawn
                            331       ;;
   6D8D                     332    nexttile:
                            333       ;; Get next tile to be drawn from the tilemap, which is pointed by DE
   6D8D 1A            [ 7]  334       ld     a, (de)    ;; [2] A = present tile-ID of the tile to be drawn
   6D8E 47            [ 4]  335       ld     b, a       ;; [1] B = A
                            336 
                            337       ;; From the tile-ID we hold in B, we need to calculate the Offset of the 
                            338       ;; tile definition (its 32-bytes of screen pixel data). As each tile takes 32-bytes,
                            339       ;; offsets are tile_0: 0-bytes, tile_1: 32-bytes, tile_2: 64-bytes... tile_N: N*32-bytes.
                            340       ;; Therefore, we need to multiply 32*B (32*tile-ID). As this multiplication may result 
                            341       ;; in a 16-bits value, we will perform BC = 32*B. Considering B=[abcdefgh], result 
                            342       ;; has to be BC = [000abcde][fgh00000] (B shifted 5 times left = BC = 32*tile-ID).  
   6D8F AF            [ 4]  343       xor    a       ;; [1] A = [00000000]
   6D90 CB 38         [ 8]  344       srl    b       ;; [2] B = [0abcdefg] (Right shift, Carry = h)
   6D92 1F            [ 4]  345       rra            ;; [1] A = [h0000000] (Rotate Right + Bit7 = h (Carry insertion))
   6D93 CB 38         [ 8]  346       srl    b       ;; [2] B = [00abcdef] (Right shift, Carry = g)
   6D95 1F            [ 4]  347       rra            ;; [1] A = [gh000000] (Rotate Right + Bit7 = g (Carry insertion))
   6D96 CB 38         [ 8]  348       srl    b       ;; [2] B = [000abcde] (Right shift, Carry = f). 
   6D98 1F            [ 4]  349       rra            ;; [1] A = [fgh00000] (Rotate Right + Bit7 = f (Carry insertion)). 
   6D99 4F            [ 4]  350       ld     c, a    ;; [1] C = A. BC = 32*tile-ID complete.
                            351 
                            352       ;; Make IX point to the 32-byte screen pixel definition of the selected tile.
                            353       ;; For that, we need to add previous calculated tile Offset (BC) and the start location
                            354       ;; of the tileset (IX). So operation is IX = tilesetPtr + Offset = IX + BC. 
                     01A5   355    tilesetPtr = .+2
   6D9A DD 21 00 00   [14]  356       ld    ix, #0000   ;; [4] IX = Pointer to start of tileset (0000 is placeholder set with tileset address)
   6D9E DD 09         [15]  357       add   ix, bc      ;; [4] IX += Tile Offset  
   6DA0 DD F9         [10]  358       ld    sp, ix      ;; [3] Make SP Point to the start of the 32-byte screen pixel data
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 95.
Hexadecimal [16-Bits]



                            359                         ;; ... definition of the current tile (IX is used to save and restore this pointer)
                            360       ;;
                            361       ;; This section of the code draws 1 8x8 pixels (4x8 bytes) tile
                            362       ;; Uses:
                            363       ;;    SP = Pointer to the start of the 32-bytes screen pixel definition of the tile
                            364       ;;    HL = Video Memory Pointer (top-left-corner)
                            365       ;; Modifies BC 
                            366       ;;
                            367 
                            368       ;; Draw Sprite Lines using Gray-Code order and Zig-Zag movement
                            369       ;; Gray Code scanline order: 0,1,3,2,6,7,5,4
   01AB                     370       drawSpriteRow inc ;; [17] Copy tile line Left-to-Right [>>]
   6DA2 C1            [10]    1       pop   bc             ;; [3] Get next 2 sprite bytes
   6DA3 71            [ 7]    2       ld  (hl), c          ;; [2] Copy byte 1
   6DA4 2C            [ 4]    3       inc    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DA5 70            [ 7]    4       ld  (hl), b          ;; [2] Copy byte 2
   6DA6 2C            [ 4]    5       inc    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DA7 C1            [10]    6       pop   bc             ;; [3] Get next 2 sprite bytes
   6DA8 71            [ 7]    7       ld  (hl), c          ;; [2] Copy byte 3
   6DA9 2C            [ 4]    8       inc    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DAA 70            [ 7]    9       ld  (hl), b          ;; [2] Copy byte 4
   6DAB CB DC         [ 8]  371       set    3, h       ;; [ 2] --000---=>--001--- (Next sprite line: 1)
   01B6                     372       drawSpriteRow dec ;; [17] Copy tile line Right-to-Left [<<]
   6DAD C1            [10]    1       pop   bc             ;; [3] Get next 2 sprite bytes
   6DAE 71            [ 7]    2       ld  (hl), c          ;; [2] Copy byte 1
   6DAF 2D            [ 4]    3       dec    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DB0 70            [ 7]    4       ld  (hl), b          ;; [2] Copy byte 2
   6DB1 2D            [ 4]    5       dec    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DB2 C1            [10]    6       pop   bc             ;; [3] Get next 2 sprite bytes
   6DB3 71            [ 7]    7       ld  (hl), c          ;; [2] Copy byte 3
   6DB4 2D            [ 4]    8       dec    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DB5 70            [ 7]    9       ld  (hl), b          ;; [2] Copy byte 4
   6DB6 CB E4         [ 8]  373       set    4, h       ;; [ 2] --001---=>--011--- (Next sprite line: 3)
   01C1                     374       drawSpriteRow inc ;; [17] Copy tile line Left-to-Right [>>]
   6DB8 C1            [10]    1       pop   bc             ;; [3] Get next 2 sprite bytes
   6DB9 71            [ 7]    2       ld  (hl), c          ;; [2] Copy byte 1
   6DBA 2C            [ 4]    3       inc    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DBB 70            [ 7]    4       ld  (hl), b          ;; [2] Copy byte 2
   6DBC 2C            [ 4]    5       inc    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DBD C1            [10]    6       pop   bc             ;; [3] Get next 2 sprite bytes
   6DBE 71            [ 7]    7       ld  (hl), c          ;; [2] Copy byte 3
   6DBF 2C            [ 4]    8       inc    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DC0 70            [ 7]    9       ld  (hl), b          ;; [2] Copy byte 4
   6DC1 CB 9C         [ 8]  375       res    3, h       ;; [ 2] --011---=>--010--- (Next sprite line: 2)
   01CC                     376       drawSpriteRow dec ;; [17] Copy tile line Right-to-Left [<<]
   6DC3 C1            [10]    1       pop   bc             ;; [3] Get next 2 sprite bytes
   6DC4 71            [ 7]    2       ld  (hl), c          ;; [2] Copy byte 1
   6DC5 2D            [ 4]    3       dec    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DC6 70            [ 7]    4       ld  (hl), b          ;; [2] Copy byte 2
   6DC7 2D            [ 4]    5       dec    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DC8 C1            [10]    6       pop   bc             ;; [3] Get next 2 sprite bytes
   6DC9 71            [ 7]    7       ld  (hl), c          ;; [2] Copy byte 3
   6DCA 2D            [ 4]    8       dec    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DCB 70            [ 7]    9       ld  (hl), b          ;; [2] Copy byte 4
   6DCC CB EC         [ 8]  377       set    5, h       ;; [ 2] --010---=>--110--- (Next sprite line: 6)
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 96.
Hexadecimal [16-Bits]



   01D7                     378       drawSpriteRow inc ;; [17] Copy tile line Left-to-Right [>>]
   6DCE C1            [10]    1       pop   bc             ;; [3] Get next 2 sprite bytes
   6DCF 71            [ 7]    2       ld  (hl), c          ;; [2] Copy byte 1
   6DD0 2C            [ 4]    3       inc    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DD1 70            [ 7]    4       ld  (hl), b          ;; [2] Copy byte 2
   6DD2 2C            [ 4]    5       inc    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DD3 C1            [10]    6       pop   bc             ;; [3] Get next 2 sprite bytes
   6DD4 71            [ 7]    7       ld  (hl), c          ;; [2] Copy byte 3
   6DD5 2C            [ 4]    8       inc    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DD6 70            [ 7]    9       ld  (hl), b          ;; [2] Copy byte 4
   6DD7 CB DC         [ 8]  379       set    3, h       ;; [ 2] --110---=>--111--- (Next sprite line: 7)
   01E2                     380       drawSpriteRow dec ;; [17] Copy tile line Right-to-Left [<<] 
   6DD9 C1            [10]    1       pop   bc             ;; [3] Get next 2 sprite bytes
   6DDA 71            [ 7]    2       ld  (hl), c          ;; [2] Copy byte 1
   6DDB 2D            [ 4]    3       dec    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DDC 70            [ 7]    4       ld  (hl), b          ;; [2] Copy byte 2
   6DDD 2D            [ 4]    5       dec    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DDE C1            [10]    6       pop   bc             ;; [3] Get next 2 sprite bytes
   6DDF 71            [ 7]    7       ld  (hl), c          ;; [2] Copy byte 3
   6DE0 2D            [ 4]    8       dec    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DE1 70            [ 7]    9       ld  (hl), b          ;; [2] Copy byte 4
   6DE2 CB A4         [ 8]  381       res    4, h       ;; [ 2] --111---=>--101--- (Next sprite line: 5)
   01ED                     382       drawSpriteRow inc ;; [17] Copy tile line Left-to-Right [>>]
   6DE4 C1            [10]    1       pop   bc             ;; [3] Get next 2 sprite bytes
   6DE5 71            [ 7]    2       ld  (hl), c          ;; [2] Copy byte 1
   6DE6 2C            [ 4]    3       inc    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DE7 70            [ 7]    4       ld  (hl), b          ;; [2] Copy byte 2
   6DE8 2C            [ 4]    5       inc    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DE9 C1            [10]    6       pop   bc             ;; [3] Get next 2 sprite bytes
   6DEA 71            [ 7]    7       ld  (hl), c          ;; [2] Copy byte 3
   6DEB 2C            [ 4]    8       inc    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DEC 70            [ 7]    9       ld  (hl), b          ;; [2] Copy byte 4
   6DED CB 9C         [ 8]  383       res    3, h       ;; [ 2] --101---=>--100--- (Next sprite line: 4)
   01F8                     384       drawSpriteRow dec ;; [17] Copy tile line Right-to-Left [<<]
   6DEF C1            [10]    1       pop   bc             ;; [3] Get next 2 sprite bytes
   6DF0 71            [ 7]    2       ld  (hl), c          ;; [2] Copy byte 1
   6DF1 2D            [ 4]    3       dec    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DF2 70            [ 7]    4       ld  (hl), b          ;; [2] Copy byte 2
   6DF3 2D            [ 4]    5       dec    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DF4 C1            [10]    6       pop   bc             ;; [3] Get next 2 sprite bytes
   6DF5 71            [ 7]    7       ld  (hl), c          ;; [2] Copy byte 3
   6DF6 2D            [ 4]    8       dec    l             ;; [1] HL++ / HL-- (4-byte aligned) -> next video mem location
   6DF7 70            [ 7]    9       ld  (hl), b          ;; [2] Copy byte 4
   6DF8 CB AC         [ 8]  385       res    5, h       ;; [ 2] --100---=>--000--- (Next sprite line: 0)
                            386 
                            387       ;; After drawing the tile, HL points to the same place in video memory
                            388       ;; as it started. We need to move it to the right 4 bytes (the width of 1 tile)
                            389       ;; to point to the place in video memory for the next tile. As this function
                            390       ;; requires tilemap to be 4-bytes aligned in video memory, maximum value 
                            391       ;; for L will be L=0xFC, so we can always safely add 3 to L with INC L, without 
                            392       ;; modifying H. Then for safety reasons, last increment will be INC HL to 
                            393       ;; ensure that H gets incremented when L=0xFF. This saves 1 microsecond
                            394       ;; from LD BC, #4: ADD HL, BC.
   6DFA 2C            [ 4]  395       inc    l  ;; [1] /
   6DFB 2C            [ 4]  396       inc    l  ;; [1] | HL+=3 (Incrementing L only)  
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 97.
Hexadecimal [16-Bits]



   6DFC 2C            [ 4]  397       inc    l  ;; [1] \ 
   6DFD 23            [ 6]  398       inc   hl  ;; [2] HL++ (HL += 4 in total)
                            399 
                            400       ;; We now test if we have finished drawing present row of tiles. If that is
                            401       ;; the case, the Width counter will be 0 (IYL=0). 
   6DFE 13            [ 6]  402       inc   de           ;; [2] ++DE (Make tilemapPtr point to next tile to be drawn)
   0208                     403       dec__iyl           ;; [2] --IYL (--Width, One less tile to be drawn in this row)
   6DFF FD 2D                 1    .dw #0x2DFD  ;; Opcode for dec iyl
   6E01 C2 8D 6D      [10]  404       jp    nz, nexttile ;; [3] if (IYL!=0), then more tiles are left to be drawn in this row,
                            405                          ;; ... so continue with next tile.
   6E04                     406    rowEnd:
                            407       ;; We have finished drawing present row of tiles. We restore SP original value
                            408       ;; and previous interrupt status. This will enable interrupts to occur in a
                            409       ;; safe way, permitting the use of this function along with split rasters
                            410       ;; and/or music played on interrupts
                     020E   411    restoreSP = .+1
   6E04 31 00 00      [10]  412       ld    sp, #0000      ;; [3] Restore SP (#0000 is a placeholder)
                     0210   413    restoreI = .
   6E07 FB            [ 4]  414       ei                   ;; [1] Restore previous interrupt status (Enabled or disabled)
                            415                            ;; ... EI gets modified by setDrawTilemap_agf and could by DI instead
                            416 
                            417       ;; Decrement the Height counter (IYH) as we have finished a complete row.
                            418       ;; If the counter is 0, then we have finished drawing the whole tilemap.
   0211                     419       dec__iyh             ;; [3]   --IYH (--Height)
   6E08 FD 25                 1    .dw #0x25FD  ;; Opcode for dec iyh
   6E0A 28 10         [12]  420       jr     z, return     ;; [2/3] if (Height==0) then return
                            421 
                            422       ;;
                            423       ;; As Height counter is not 0 (IYH > 0), there are more rows to draw.
                            424       ;; Set up pointers before drawing next tile row.
                            425       ;;
                            426 
                            427       ;; Video Memory Pointer (Currently HL) has to point to next row in the screen.
                            428       ;; As each row takes 0x50 bytes (in standard modes) we need to add to HL
                            429       ;; the difference between the bytes drawn in this row and 0x50 to ensure that
                            430       ;; each loop makes HL increment exactly 0x50 bytes, so that it points to next line.
                            431       ;; Also, as width is measured in tiles, and each tile is 4 bytes-wide, the 
                            432       ;; final calculation will be HL += screenWidth - drawnWidth = 0x50 - 4*width
                     0216   433    incrementHL = .+1
   6E0C 01 00 00      [10]  434       ld    bc, #0000      ;; [3] BC = (0x50 - 4*width) (#0000 is a placeholder that gets the value)
   6E0F 09            [11]  435       add   hl, bc         ;; [3] HL += 0x50 - 4*width
                            436 
                            437       ;; As IYL has been used as width counter, it has been decremented to 0.
                            438       ;; Restore it to the width value before using it again.
                     021B   439    restoreWidth = .+2
   0219                     440       ld__iyl  #00         ;; [2] IYL = Width (#00 is a placeholder)
   6E10 FD 2E 00              1    .db #0xFD, #0x2E, #00  ;; Opcode for ld iyl, Value
                            441 
                            442       ;; Tilemap pointer (Currently at DE) has to point to the start of the next row 
                            443       ;; of the tilemap to be drawn. Similarly to the Video Memory Pointer, if our tilemap
                            444       ;; is wider than our view width, we need to increment the pointer with the 
                            445       ;; difference between tilemapWidth and our view width to ensure that the pointer
                            446       ;; gets incremented by exactly tilemapWidth at each loop (ensuring that we always
                            447       ;; end up pointing to the first tile of the next row). As we have incremented
                            448       ;; the tilemap pointer by (width), the operation will be 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 98.
Hexadecimal [16-Bits]



                            449       ;; TilemapPtr += tilemapWidth - width
   6E13 EB            [ 4]  450       ex    de, hl         ;; [1] Temporarily exchange HL<=>DE to do 16-bit maths for updating DE
                     021E   451    updateWidth = .+1
   6E14 01 00 00      [10]  452       ld    bc, #0000      ;; [3] BC = tilemapWidth - width
   6E17 09            [11]  453       add   hl, bc         ;; [3] HL += tilemapWidth - width (TilemapPtr points to first tile of next row)
   6E18 EB            [ 4]  454       ex    de, hl         ;; [1] Restore DE,HL into its proper registers, now with DE incremented
                            455 
   6E19 C3 88 6D      [10]  456       jp    nextRow        ;; [3] Next Row
                            457 
                            458       ;; When everything is finished, we safely return
                            459       ;; 
   6E1C                     460    return:
                            461 
                            462    ;; Set up association of global symbols with locals
                     01A5   463    pp_tilesetPtr     == tilesetPtr
                     018F   464    pp_widthHeightSet == widthHeightSet
                     021B   465    pp_restoreWidth   == restoreWidth
                     021E   466    pp_updateWidth    == updateWidth
                     0216   467    pp_incrementHL    == incrementHL
                     0210   468    pp_restoreI       == restoreI
                            469 
   6E1C C9            [10]  470 ret
