ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 1.
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                              1 ;;####################################################################
                              2 ;;# GNU Free Documentation License                                   #
                              3 ;;# Version 1.3, 3 November 2008                                     #
                              4 ;;#                                                                  #
                              5 ;;# Copyright (C) 2021 Lumina                                        #
                              6 ;;# (Paula Garcia Morales, Laura Gil Lopez, Jorge Perez Dominguez)   #
                              7 ;;#                                                                  #
                              8 ;;# Everyone is permitted to copy and distribute verbatim copies     #
                              9 ;;# of this license document, but changing it is not allowed.        #
                             10 ;;####################################################################
                             11 
                             12 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 2.
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                             13 .include "cpctelera.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;; All CPCtelera include files
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 3.
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                             20 .include "macros/allmacros.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 4.
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                             19 .include "macros/cpct_maths.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Math Macros
                             21 ;;
                             22 ;;    Useful assembler macros for doing common math operations
                             23 ;;
                             24 
                             25 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             26 ;; Macro: add_REGPAIR_a 
                             27 ;;
                             28 ;;    Performs the operation REGPAIR = REGPAIR + A. REGPAIR is any given pair of 8-bit registers.
                             29 ;;
                             30 ;; ASM Definition:
                             31 ;;    .macro <add_REGPAIR_a> RH, RL
                             32 ;;
                             33 ;; Parameters:
                             34 ;;    RH    - Register 1 of the REGPAIR. Holds higher-byte value
                             35 ;;    RL    - Register 2 of the REGPAIR. Holds lower-byte value
                             36 ;; 
                             37 ;; Input Registers: 
                             38 ;;    RH:RL - 16-value used as left-operand and final storage for the sum
                             39 ;;    A     - Second sum operand
                             40 ;;
                             41 ;; Return Value:
                             42 ;;    RH:RL - Holds the sum of RH:RL + A
                             43 ;;
                             44 ;; Details:
                             45 ;;    This macro performs the sum of RH:RL + A and stores it directly on RH:RL.
                             46 ;; It uses only RH:RL and A to perform the operation.
                             47 ;;
                             48 ;; Modified Registers: 
                             49 ;;    A, RH, RL
                             50 ;;
                             51 ;; Required memory:
                             52 ;;    5 bytes
                             53 ;;
                             54 ;; Time Measures:
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 5.
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                             55 ;; (start code)
                             56 ;;  Case | microSecs(us) | CPU Cycles
                             57 ;; ------------------------------------
                             58 ;;  Any  |       5       |     20
                             59 ;; ------------------------------------
                             60 ;; (end code)
                             61 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             62 .macro add_REGPAIR_a rh, rl
                             63    ;; First Perform RH = E + A
                             64    add rl    ;; [1] A' = RL + A 
                             65    ld  rl, a ;; [1] RL' = A' = RL + A. It might generate Carry that must be added to RH
                             66    
                             67    ;; Then Perform RH = RH + Carry 
                             68    adc rh    ;; [1] A'' = A' + RH + Carry = RL + A + RH + Carry
                             69    sub rl    ;; [1] Remove RL'. A''' = A'' - RL' = RL + A + RH + Carry - (RL + A) = RH + Carry
                             70    ld  rh, a ;; [1] Save into RH (RH' = A''' = RH + Carry)
                             71 .endm
                             72 
                             73 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             74 ;; Macro: add_de_a
                             75 ;;
                             76 ;;    Performs the operation DE = DE + A
                             77 ;;
                             78 ;; ASM Definition:
                             79 ;;    .macro <add_de_a>
                             80 ;;
                             81 ;; Parameters:
                             82 ;;    None
                             83 ;; 
                             84 ;; Input Registers: 
                             85 ;;    DE    - First sum operand and Destination Register
                             86 ;;    A     - Second sum operand
                             87 ;;
                             88 ;; Return Value:
                             89 ;;    DE - Holds the sum of DE + A
                             90 ;;
                             91 ;; Details:
                             92 ;;    This macro performs the sum of DE + A and stores it directly on DE.
                             93 ;; It uses only DE and A to perform the operation.
                             94 ;;    This macro is a direct instantiation of the macro <add_REGPAIR_a>.
                             95 ;;
                             96 ;; Modified Registers: 
                             97 ;;    A, DE
                             98 ;;
                             99 ;; Required memory:
                            100 ;;    5 bytes
                            101 ;;
                            102 ;; Time Measures:
                            103 ;; (start code)
                            104 ;;  Case | microSecs(us) | CPU Cycles
                            105 ;; ------------------------------------
                            106 ;;  Any  |       5       |     20
                            107 ;; ------------------------------------
                            108 ;; (end code)
                            109 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 6.
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                            110 .macro add_de_a
                            111    add_REGPAIR_a  d, e
                            112 .endm
                            113 
                            114 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            115 ;; Macro: add_hl_a
                            116 ;;
                            117 ;;    Performs the operation HL = HL + A
                            118 ;;
                            119 ;; ASM Definition:
                            120 ;;    .macro <add_hl_a>
                            121 ;;
                            122 ;; Parameters:
                            123 ;;    None
                            124 ;; 
                            125 ;; Input Registers: 
                            126 ;;    HL    - First sum operand and Destination Register
                            127 ;;    A     - Second sum operand
                            128 ;;
                            129 ;; Return Value:
                            130 ;;    HL - Holds the sum of HL + A
                            131 ;;
                            132 ;; Details:
                            133 ;;    This macro performs the sum of HL + A and stores it directly on HL.
                            134 ;; It uses only HL and A to perform the operation.
                            135 ;;    This macro is a direct instantiation of the macro <add_REGPAIR_a>.
                            136 ;;
                            137 ;; Modified Registers: 
                            138 ;;    A, HL
                            139 ;;
                            140 ;; Required memory:
                            141 ;;    5 bytes
                            142 ;;
                            143 ;; Time Measures:
                            144 ;; (start code)
                            145 ;;  Case | microSecs(us) | CPU Cycles
                            146 ;; ------------------------------------
                            147 ;;  Any  |       5       |     20
                            148 ;; ------------------------------------
                            149 ;; (end code)
                            150 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            151 .macro add_hl_a
                            152    add_REGPAIR_a  h, l
                            153 .endm
                            154 
                            155 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            156 ;; Macro: add_bc_a
                            157 ;;
                            158 ;;    Performs the operation BC = BC + A
                            159 ;;
                            160 ;; ASM Definition:
                            161 ;;    .macro <add_bc_a>
                            162 ;;
                            163 ;; Parameters:
                            164 ;;    None
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 7.
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                            165 ;; 
                            166 ;; Input Registers: 
                            167 ;;    BC    - First sum operand and Destination Register
                            168 ;;    A     - Second sum operand
                            169 ;;
                            170 ;; Return Value:
                            171 ;;    BC - Holds the sum of BC + A
                            172 ;;
                            173 ;; Details:
                            174 ;;    This macro performs the sum of BC + A and stores it directly on BC.
                            175 ;; It uses only BC and A to perform the operation.
                            176 ;;    This macro is a direct instantiation of the macro <add_REGPAIR_a>.
                            177 ;;
                            178 ;; Modified Registers: 
                            179 ;;    A, BC
                            180 ;;
                            181 ;; Required memory:
                            182 ;;    5 bytes
                            183 ;;
                            184 ;; Time Measures:
                            185 ;; (start code)
                            186 ;;  Case | microSecs(us) | CPU Cycles
                            187 ;; ------------------------------------
                            188 ;;  Any  |       5       |     20
                            189 ;; ------------------------------------
                            190 ;; (end code)
                            191 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            192 .macro add_bc_a
                            193    add_REGPAIR_a  b, c
                            194 .endm
                            195 
                            196 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            197 ;; Macro: sub_REGPAIR_a 
                            198 ;;
                            199 ;;    Performs the operation REGPAIR = REGPAIR - A. REGPAIR is any given pair of 8-bit registers.
                            200 ;;
                            201 ;; ASM Definition:
                            202 ;;    .macro <sub_REGPAIR_a> RH, RL
                            203 ;;
                            204 ;; Parameters:
                            205 ;;    RH    - Register 1 of the REGPAIR. Holds higher-byte value
                            206 ;;    RL    - Register 2 of the REGPAIR. Holds lower-byte value
                            207 ;;  ?JMPLBL - Optional Jump label. A temporal one will be produced if none is given.
                            208 ;; 
                            209 ;; Input Registers: 
                            210 ;;    RH:RL - 16-value used as left-operand and final storage for the subtraction
                            211 ;;    A     - Second subtraction operand (A > 0)
                            212 ;;
                            213 ;; Preconditions:
                            214 ;;    A > 0 - Value in register A is considered to be unsigned and must be greater
                            215 ;;            than 0 for this macro to work properly.
                            216 ;;
                            217 ;; Return Value:
                            218 ;;    RH:RL - Holds the result of RH:RL - A
                            219 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 8.
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                            220 ;; Details:
                            221 ;;    This macro performs the subtraction of RH:RL - A and stores it directly on RH:RL.
                            222 ;; It uses only RH:RL and A to perform the operation.
                            223 ;;    With respect to the optional label ?JMPLBL, it is often better not to provide 
                            224 ;; this parameter. A temporal local symbol will be automatically generated for that label.
                            225 ;; Only provide it when you have a specific reason to do that.
                            226 ;;
                            227 ;; Modified Registers: 
                            228 ;;    A, RH, RL
                            229 ;;
                            230 ;; Required memory:
                            231 ;;    7 bytes
                            232 ;;
                            233 ;; Time Measures:
                            234 ;; (start code)
                            235 ;;  Case | microSecs(us) | CPU Cycles
                            236 ;; ------------------------------------
                            237 ;;  Any  |       7       |     28
                            238 ;; ------------------------------------
                            239 ;; (end code)
                            240 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            241 .macro sub_REGPAIR_a rh, rl, ?jmplbl
                            242    ;; First Perform A' = A - 1 - RL 
                            243    ;; (Inverse subtraction minus 1, used  to test for Carry, needed to know when to subtract 1 from RH)
                            244    dec    a          ;; [1] --A (In case A == RL, inverse subtraction should produce carry not to decrement RH)
                            245    sub   rl          ;; [1] A' = A - 1 - RL
                            246    jr     c, jmplbl  ;; [2/3] If A <= RL, Carry will be produced, and no decrement of RH is required, so jump over it
                            247      dec   rh        ;; [1] --RH (A > RL, so RH must be decremented)
                            248 jmplbl:   
                            249    ;; Now invert A to get the subtraction we wanted 
                            250    ;; { RL' = -A' - 1 = -(A - 1 - RL) - 1 = RL - A }
                            251    cpl            ;; [1] A'' = RL - A (Original subtraction we wanted, calculated trough one's complement of A')
                            252    ld    rl, a    ;; [1] Save into RL (RL' = RL - A)
                            253 .endm
                            254 
                            255 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            256 ;; Macro: sub_de_a 
                            257 ;;
                            258 ;;    Performs the operation DE = DE - A. DE is any given pair of 8-bit registers.
                            259 ;;
                            260 ;; ASM Definition:
                            261 ;;    .macro <sub_de_a>
                            262 ;; 
                            263 ;; Input Registers: 
                            264 ;;    DE - 16-value used as left-operand and final storage for the subtraction
                            265 ;;    A  - Second subtraction operand
                            266 ;;
                            267 ;; Return Value:
                            268 ;;    DE - Holds the result of DE - A
                            269 ;;
                            270 ;; Details:
                            271 ;;    This macro performs the subtraction of DE - A and stores it directly on DE.
                            272 ;; It uses only DE and A to perform the operation.
                            273 ;;
                            274 ;; Modified Registers: 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 9.
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                            275 ;;    A, DE
                            276 ;;
                            277 ;; Required memory:
                            278 ;;    7 bytes
                            279 ;;
                            280 ;; Time Measures:
                            281 ;; (start code)
                            282 ;;  Case | microSecs(us) | CPU Cycles
                            283 ;; ------------------------------------
                            284 ;;  Any  |       7       |     28
                            285 ;; ------------------------------------
                            286 ;; (end code)
                            287 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            288 .macro sub_de_a
                            289    sub_REGPAIR_a  d, e
                            290 .endm
                            291 
                            292 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            293 ;; Macro: sub_hl_a 
                            294 ;;
                            295 ;;    Performs the operation HL = HL - A. HL is any given pair of 8-bit registers.
                            296 ;;
                            297 ;; ASM Definition:
                            298 ;;    .macro <sub_hl_a>
                            299 ;; 
                            300 ;; Input Registers: 
                            301 ;;    HL - 16-value used as left-operand and final storage for the subtraction
                            302 ;;    A  - Second subtraction operand
                            303 ;;
                            304 ;; Return Value:
                            305 ;;    HL - Holds the result of HL - A
                            306 ;;
                            307 ;; Details:
                            308 ;;    This macro performs the subtraction of HL - A and stores it directly on HL.
                            309 ;; It uses only HL and A to perform the operation.
                            310 ;;
                            311 ;; Modified Registers: 
                            312 ;;    A, HL
                            313 ;;
                            314 ;; Required memory:
                            315 ;;    7 bytes
                            316 ;;
                            317 ;; Time Measures:
                            318 ;; (start code)
                            319 ;;  Case | microSecs(us) | CPU Cycles
                            320 ;; ------------------------------------
                            321 ;;  Any  |       7       |     28
                            322 ;; ------------------------------------
                            323 ;; (end code)
                            324 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            325 .macro sub_hl_a
                            326    sub_REGPAIR_a  h, l
                            327 .endm
                            328 
                            329 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 10.
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                            330 ;; Macro: sub_bc_a 
                            331 ;;
                            332 ;;    Performs the operation BC = BC - A. BC is any given pair of 8-bit registers.
                            333 ;;
                            334 ;; ASM Definition:
                            335 ;;    .macro <sub_bc_a>
                            336 ;; 
                            337 ;; Input Registers: 
                            338 ;;    BC - 16-value used as left-operand and final storage for the subtraction
                            339 ;;    A  - Second subtraction operand
                            340 ;;
                            341 ;; Return Value:
                            342 ;;    BC - Holds the result of BC - A
                            343 ;;
                            344 ;; Details:
                            345 ;;    This macro performs the subtraction of BC - A and stores it directly on BC.
                            346 ;; It uses only BC and A to perform the operation.
                            347 ;;
                            348 ;; Modified Registers: 
                            349 ;;    A, BC
                            350 ;;
                            351 ;; Required memory:
                            352 ;;    7 bytes
                            353 ;;
                            354 ;; Time Measures:
                            355 ;; (start code)
                            356 ;;  Case | microSecs(us) | CPU Cycles
                            357 ;; ------------------------------------
                            358 ;;  Any  |       7       |     28
                            359 ;; ------------------------------------
                            360 ;; (end code)
                            361 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            362 .macro sub_bc_a
                            363    sub_REGPAIR_a  b, c
                            364 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 11.
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                             20 .include "macros/cpct_opcodeConstants.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2016 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Opcodes
                             21 ;;
                             22 ;;    Constant definitions of Z80 opcodes. This will be normally used as data
                             23 ;; for self-modifying code.
                             24 ;;
                             25 
                             26 ;; Constant: opc_JR
                             27 ;;    Opcode for "JR xx" instruction. Requires 1-byte parameter (xx)
                     0018    28 opc_JR   = 0x18
                             29 
                             30 ;; Constant: opc_LD_D
                             31 ;;    Opcode for "LD d, xx" instruction. Requires 1-byte parameter (xx)
                     0016    32 opc_LD_D = 0x16
                             33 
                             34 ;; Constant: opc_EI
                             35 ;;    Opcode for "EI" instruction. 
                     00FB    36 opc_EI = 0xFB
                             37 
                             38 ;; Constant: opc_DI
                             39 ;;    Opcode for "DI" instruction. 
                     00F3    40 opc_DI = 0xF3
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 12.
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                             21 .include "macros/cpct_reverseBits.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2016 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Reverse Bits
                             21 ;;
                             22 ;;    Useful macros for bit reversing and selecting in different ways. Only
                             23 ;; valid to be used from assembly language (not from C).
                             24 ;;
                             25 
                             26 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             27 ;; Macro: cpctm_reverse_and_select_bits_of_A
                             28 ;;
                             29 ;;    Reorders the bits of A and mixes them letting the user select the 
                             30 ;; new order for the bits by using a selection mask.
                             31 ;;
                             32 ;; Parameters:
                             33 ;;    TReg          - An 8-bits register that will be used for intermediate calculations.
                             34 ;; This register may be one of these: B, C, D, E, H, L
                             35 ;;    SelectionMask - An 8-bits mask that will be used to select the bits to get from 
                             36 ;; the reordered bits. It might be an 8-bit register or even (hl).
                             37 ;; 
                             38 ;; Input Registers: 
                             39 ;;    A     - Byte to be reversed
                             40 ;;    TReg  - Should have a copy of A (same exact value)
                             41 ;;
                             42 ;; Return Value:
                             43 ;;    A - Resulting value with bits reversed and selected 
                             44 ;;
                             45 ;; Details:
                             46 ;;    This macro reorders the bits in A and mixes them with the same bits in
                             47 ;; their original order by using a *SelectionMask*. The process is as follows:
                             48 ;;
                             49 ;;    1. Consider the 8 bits of A = TReg = [01234567]
                             50 ;;    2. Reorder the 8 bits of A, producing A2 = [32547610]
                             51 ;;    2. Reorder the bits of TReg, producing TReg2 = [76103254]
                             52 ;;    3. Combines both reorders into final result using a *SelectionMask*. Each 
                             53 ;; 0 bit from the selection mask means "select bit from A2", whereas each 1 bit
                             54 ;; means "select bit from TReg2".
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 13.
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                             55 ;;
                             56 ;;    For instance, a selection mask 0b11001100 will produce this result:
                             57 ;;
                             58 ;; (start code)
                             59 ;;       A2 = [ 32 54 76 10 ]
                             60 ;;    TReg2 = [ 76 10 32 54 ]
                             61 ;;  SelMask = [ 11 00 11 00 ] // 1 = TReg2-bits, 0 = A2-bits
                             62 ;;  ---------------------------
                             63 ;;   Result = [ 76 54 32 10 ]
                             64 ;; (end code)
                             65 ;;
                             66 ;;    Therefore, mask 0b11001100 produces the effect of reversing the bits of A
                             67 ;; completely. Other masks will produce different reorders of the bits in A, for
                             68 ;; different requirements or needs.
                             69 ;;
                             70 ;; Modified Registers: 
                             71 ;;    AF, TReg
                             72 ;;
                             73 ;; Required memory:
                             74 ;;    16 bytes
                             75 ;;
                             76 ;; Time Measures:
                             77 ;; (start code)
                             78 ;;  Case | microSecs(us) | CPU Cycles
                             79 ;; ------------------------------------
                             80 ;;  Any  |      16       |     64
                             81 ;; ------------------------------------
                             82 ;; (end code)
                             83 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             84 .macro cpctm_reverse_and_select_bits_of_A  TReg, SelectionMask
                             85    rlca            ;; [1] | Rotate left twice so that...
                             86    rlca            ;; [1] | ... A=[23456701]
                             87 
                             88    ;; Mix bits of TReg and A so that all bits are in correct relative order
                             89    ;; but displaced from their final desired location
                             90    xor TReg        ;; [1] TReg = [01234567] (original value)
                             91    and #0b01010101 ;; [2]    A = [23456701] (bits rotated twice left)
                             92    xor TReg        ;; [1]   A2 = [03254761] (TReg mixed with A to get bits in order)
                             93    
                             94    ;; Now get bits 54 and 10 in their right location and save them into TReg
                             95    rlca            ;; [1]    A = [ 32 54 76 10 ] (54 and 10 are in their desired place)
                             96    ld TReg, a      ;; [1] TReg = A (Save this bit location into TReg)
                             97    
                             98    ;; Now get bits 76 and 32 in their right location in A
                             99    rrca            ;; [1] | Rotate A right 4 times to...
                            100    rrca            ;; [1] | ... get bits 76 and 32 located at their ...
                            101    rrca            ;; [1] | ... desired location :
                            102    rrca            ;; [1] | ... A = [ 76 10 32 54 ] (76 and 32 are in their desired place)
                            103    
                            104    ;; Finally, mix bits from TReg and A to get all bits reversed and selected
                            105    xor TReg          ;; [1] TReg = [32547610] (Mixed bits with 54 & 10 in their right place)
                            106    and SelectionMask ;; [2]    A = [76103254] (Mixed bits with 76 & 32 in their right place)
                            107    xor TReg          ;; [1]   A2 = [xxxxxxxx] final value: bits of A reversed and selected using *SelectionMask*
                            108 .endm
                            109 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 14.
Hexadecimal [16-Bits]



                            110 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            111 ;; Macro: cpctm_reverse_bits_of_A 
                            112 ;; Macro: cpctm_reverse_mode_2_pixels_of_A
                            113 ;;
                            114 ;;    Reverses the 8-bits of A, from [01234567] to [76543210]. This also reverses
                            115 ;; all pixels contained in A when A is in screen pixel format, mode 2.
                            116 ;;
                            117 ;; Parameters:
                            118 ;;    TReg - An 8-bits register that will be used for intermediate calculations.
                            119 ;; This register may be one of these: B, C, D, E, H, L
                            120 ;; 
                            121 ;; Input Registers: 
                            122 ;;    A    - Byte to be reversed
                            123 ;;    TReg - Should have a copy of A (same exact value)
                            124 ;;
                            125 ;; Return Value:
                            126 ;;    A - Resulting value with bits reversed 
                            127 ;;
                            128 ;; Requires:
                            129 ;;   - Uses the macro <cpctm_reverse_and_select_bits_of_A>.
                            130 ;;
                            131 ;; Details:
                            132 ;;    This macro reverses the bits in A. If bits of A = [01234567], the final
                            133 ;; result after processing this macro will be A = [76543210]. Register TReg is
                            134 ;; used for intermediate calculations and its value is destroyed.
                            135 ;;
                            136 ;; Modified Registers: 
                            137 ;;    AF, TReg
                            138 ;;
                            139 ;; Required memory:
                            140 ;;    16 bytes
                            141 ;;
                            142 ;; Time Measures:
                            143 ;; (start code)
                            144 ;;  Case | microSecs(us) | CPU Cycles
                            145 ;; ------------------------------------
                            146 ;;  Any  |      16       |     64
                            147 ;; ------------------------------------
                            148 ;; (end code)
                            149 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            150 .macro cpctm_reverse_bits_of_A  TReg
                            151    cpctm_reverse_and_select_bits_of_A  TReg, #0b11001100
                            152 .endm
                            153 .macro cpctm_reverse_mode_2_pixels_of_A   TReg
                            154    cpctm_reverse_bits_of_A  TReg
                            155 .endm
                            156 
                            157 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            158 ;; Macro: cpctm_reverse_mode_1_pixels_of_A
                            159 ;;
                            160 ;;    Reverses the order of pixel values contained in register A, assuming A is 
                            161 ;; in screen pixel format, mode 1.
                            162 ;;
                            163 ;; Parameters:
                            164 ;;    TReg - An 8-bits register that will be used for intermediate calculations.
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 15.
Hexadecimal [16-Bits]



                            165 ;; This register may be one of these: B, C, D, E, H, L
                            166 ;; 
                            167 ;; Input Registers: 
                            168 ;;    A    - Byte with pixel values to be reversed
                            169 ;;    TReg - Should have a copy of A (same exact value)
                            170 ;;
                            171 ;; Return Value:
                            172 ;;    A - Resulting byte with the 4 pixels values reversed in order
                            173 ;;
                            174 ;; Requires:
                            175 ;;   - Uses the macro <cpctm_reverse_and_select_bits_of_A>.
                            176 ;;
                            177 ;; Details:
                            178 ;;    This macro considers that A contains a byte that codifies 4 pixels in 
                            179 ;; screen pixel format, mode 1. It modifies A to reverse the order of its 4 
                            180 ;; contained pixel values left-to-right (1234 -> 4321). With respect to the 
                            181 ;; order of the 8-bits of A, the concrete operations performed is:
                            182 ;; (start code)
                            183 ;;    A = [01234567] == reverse-pixels ==> [32107654] = A2
                            184 ;; (end code)
                            185 ;;    You may want to check <cpct_px2byteM1> to know how bits codify both pixels
                            186 ;; in one single byte for screen pixel format, mode 1.
                            187 ;;
                            188 ;;    *TReg* is an 8-bit register that will be used for intermediate calculations,
                            189 ;; destroying its original value (that should be same as A, at the start).
                            190 ;;
                            191 ;; Modified Registers: 
                            192 ;;    AF, TReg
                            193 ;;
                            194 ;; Required memory:
                            195 ;;    16 bytes
                            196 ;;
                            197 ;; Time Measures:
                            198 ;; (start code)
                            199 ;;  Case | microSecs(us) | CPU Cycles
                            200 ;; ------------------------------------
                            201 ;;  Any  |      16       |     64
                            202 ;; ------------------------------------
                            203 ;; (end code)
                            204 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            205 .macro cpctm_reverse_mode_1_pixels_of_A  TReg
                            206    cpctm_reverse_and_select_bits_of_A  TReg, #0b00110011
                            207 .endm
                            208 
                            209 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            210 ;; Macro: cpctm_reverse_mode_0_pixels_of_A
                            211 ;;
                            212 ;;    Reverses the order of pixel values contained in register A, assuming A is 
                            213 ;; in screen pixel format, mode 0.
                            214 ;;
                            215 ;; Parameters:
                            216 ;;    TReg - An 8-bits register that will be used for intermediate calculations.
                            217 ;; This register may be one of these: B, C, D, E, H, L
                            218 ;; 
                            219 ;; Input Registers: 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 16.
Hexadecimal [16-Bits]



                            220 ;;    A    - Byte with pixel values to be reversed
                            221 ;;    TReg - Should have a copy of A (same exact value)
                            222 ;;
                            223 ;; Return Value:
                            224 ;;    A - Resulting byte with the 2 pixels values reversed in order
                            225 ;;
                            226 ;; Details:
                            227 ;;    This macro considers that A contains a byte that codifies 2 pixels in 
                            228 ;; screen pixel format, mode 0. It modifies A to reverse the order of its 2 
                            229 ;; contained pixel values left-to-right (12 -> 21). With respect to the 
                            230 ;; order of the 8-bits of A, the concrete operation performed is:
                            231 ;; (start code)
                            232 ;;    A = [01234567] == reverse-pixels ==> [10325476] = A2
                            233 ;; (end code)
                            234 ;;    You may want to check <cpct_px2byteM0> to know how bits codify both pixels
                            235 ;; in one single byte for screen pixel format, mode 0.
                            236 ;;
                            237 ;;    *TReg* is an 8-bit register that will be used for intermediate calculations,
                            238 ;; destroying its original value (that should be same as A, at the start).
                            239 ;;
                            240 ;; Modified Registers: 
                            241 ;;    AF, TReg
                            242 ;;
                            243 ;; Required memory:
                            244 ;;    7 bytes
                            245 ;;
                            246 ;; Time Measures:
                            247 ;; (start code)
                            248 ;;  Case | microSecs(us) | CPU Cycles
                            249 ;; ------------------------------------
                            250 ;;  Any  |       7       |     28
                            251 ;; ------------------------------------
                            252 ;; (end code)
                            253 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            254 .macro cpctm_reverse_mode_0_pixels_of_A  TReg
                            255    rlca            ;; [1] | Rotate A twice to the left to get bits ordered...
                            256    rlca            ;; [1] | ... in the way we need for mixing, A = [23456701]
                            257   
                            258    ;; Mix TReg with A to get pixels reversed by reordering bits
                            259    xor TReg        ;; [1] | TReg = [01234567]
                            260    and #0b01010101 ;; [2] |    A = [23456701]
                            261    xor TReg        ;; [1] |   A2 = [03254761]
                            262    rrca            ;; [1] Rotate right to get pixels reversed A = [10325476]
                            263 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 17.
Hexadecimal [16-Bits]



                             22 .include "macros/cpct_undocumentedOpcodes.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Undocumented Opcodes
                             21 ;;
                             22 ;;    Macros to clarify source code when using undocumented opcodes. Only
                             23 ;; valid to be used from assembly language (not from C).
                             24 ;;
                             25 
                             26 ;; Macro: jr__0
                             27 ;;    Opcode for "JR #0" instruction
                             28 ;; 
                             29 .mdelete jr__0
                             30 .macro jr__0
                             31    .DW #0x0018  ;; JR #00 (Normally used as a modifiable jump, as jr 0 is an infinite loop)
                             32 .endm
                             33 
                             34 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             35 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             36 ;; SLL Instructions
                             37 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             38 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             39 
                             40 ;; Macro: sll__b
                             41 ;;    Opcode for "SLL b" instruction
                             42 ;; 
                             43 .mdelete sll__b
                             44 .macro sll__b
                             45    .db #0xCB, #0x30  ;; Opcode for sll b
                             46 .endm
                             47 
                             48 ;; Macro: sll__c
                             49 ;;    Opcode for "SLL c" instruction
                             50 ;; 
                             51 .mdelete sll__c
                             52 .macro sll__c
                             53    .db #0xCB, #0x31  ;; Opcode for sll c
                             54 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 18.
Hexadecimal [16-Bits]



                             55 
                             56 ;; Macro: sll__d
                             57 ;;    Opcode for "SLL d" instruction
                             58 ;; 
                             59 .mdelete sll__d
                             60 .macro sll__d
                             61    .db #0xCB, #0x32  ;; Opcode for sll d
                             62 .endm
                             63 
                             64 ;; Macro: sll__e
                             65 ;;    Opcode for "SLL e" instruction
                             66 ;; 
                             67 .mdelete sll__e
                             68 .macro sll__e
                             69    .db #0xCB, #0x33  ;; Opcode for sll e
                             70 .endm
                             71 
                             72 ;; Macro: sll__h
                             73 ;;    Opcode for "SLL h" instruction
                             74 ;; 
                             75 .mdelete sll__h
                             76 .macro sll__h
                             77    .db #0xCB, #0x34  ;; Opcode for sll h
                             78 .endm
                             79 
                             80 ;; Macro: sll__l
                             81 ;;    Opcode for "SLL l" instruction
                             82 ;; 
                             83 .mdelete sll__l
                             84 .macro sll__l
                             85    .db #0xCB, #0x35  ;; Opcode for sll l
                             86 .endm
                             87 
                             88 ;; Macro: sll___hl_
                             89 ;;    Opcode for "SLL (hl)" instruction
                             90 ;; 
                             91 .mdelete sll___hl_
                             92 .macro sll___hl_
                             93    .db #0xCB, #0x36  ;; Opcode for sll (hl)
                             94 .endm
                             95 
                             96 ;; Macro: sll__a
                             97 ;;    Opcode for "SLL a" instruction
                             98 ;; 
                             99 .mdelete sll__a
                            100 .macro sll__a
                            101    .db #0xCB, #0x37  ;; Opcode for sll a
                            102 .endm
                            103 
                            104 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            105 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            106 ;; IXL Related Macros
                            107 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            108 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            109 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 19.
Hexadecimal [16-Bits]



                            110 ;; Macro: ld__ixl    Value
                            111 ;;    Opcode for "LD ixl, Value" instruction
                            112 ;;  
                            113 ;; Parameters:
                            114 ;;    Value - An inmediate 8-bits value that will be loaded into ixl
                            115 ;; 
                            116 .mdelete ld__ixl
                            117 .macro ld__ixl    Value 
                            118    .db #0xDD, #0x2E, Value  ;; Opcode for ld ixl, Value
                            119 .endm
                            120 
                            121 ;; Macro: ld__ixl_a
                            122 ;;    Opcode for "LD ixl, a" instruction
                            123 ;; 
                            124 .mdelete ld__ixl_a
                            125 .macro ld__ixl_a
                            126    .dw #0x6FDD  ;; Opcode for ld ixl, a
                            127 .endm
                            128 
                            129 ;; Macro: ld__ixl_b
                            130 ;;    Opcode for "LD ixl, B" instruction
                            131 ;; 
                            132 .mdelete ld__ixl_b
                            133 .macro ld__ixl_b
                            134    .dw #0x68DD  ;; Opcode for ld ixl, b
                            135 .endm
                            136 
                            137 ;; Macro: ld__ixl_c
                            138 ;;    Opcode for "LD ixl, C" instruction
                            139 ;; 
                            140 .mdelete ld__ixl_c
                            141 .macro ld__ixl_c
                            142    .dw #0x69DD  ;; Opcode for ld ixl, c
                            143 .endm
                            144 
                            145 ;; Macro: ld__ixl_d
                            146 ;;    Opcode for "LD ixl, D" instruction
                            147 ;; 
                            148 .mdelete ld__ixl_d
                            149 .macro ld__ixl_d
                            150    .dw #0x6ADD  ;; Opcode for ld ixl, d
                            151 .endm
                            152 
                            153 ;; Macro: ld__ixl_e
                            154 ;;    Opcode for "LD ixl, E" instruction
                            155 ;; 
                            156 .mdelete ld__ixl_e
                            157 .macro ld__ixl_e
                            158    .dw #0x6BDD  ;; Opcode for ld ixl, e
                            159 .endm
                            160 
                            161 ;; Macro: ld__ixl_ixh
                            162 ;;    Opcode for "LD ixl, IXH" instruction
                            163 ;; 
                            164 .mdelete  ld__ixl_ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 20.
Hexadecimal [16-Bits]



                            165 .macro ld__ixl_ixh
                            166    .dw #0x6CDD  ;; Opcode for ld ixl, ixh
                            167 .endm
                            168 
                            169 ;; Macro: ld__a_ixl
                            170 ;;    Opcode for "LD A, ixl" instruction
                            171 ;; 
                            172 .mdelete ld__a_ixl
                            173 .macro ld__a_ixl
                            174    .dw #0x7DDD  ;; Opcode for ld a, ixl
                            175 .endm
                            176 
                            177 ;; Macro: ld__b_ixl
                            178 ;;    Opcode for "LD B, ixl" instruction
                            179 ;; 
                            180 .mdelete ld__b_ixl
                            181 .macro ld__b_ixl
                            182    .dw #0x45DD  ;; Opcode for ld b, ixl
                            183 .endm
                            184 
                            185 ;; Macro: ld__c_ixl
                            186 ;;    Opcode for "LD c, ixl" instruction
                            187 ;; 
                            188 .mdelete ld__c_ixl
                            189 .macro ld__c_ixl
                            190    .dw #0x4DDD  ;; Opcode for ld c, ixl
                            191 .endm
                            192 
                            193 ;; Macro: ld__d_ixl
                            194 ;;    Opcode for "LD D, ixl" instruction
                            195 ;; 
                            196 .mdelete ld__d_ixl
                            197 .macro ld__d_ixl
                            198    .dw #0x55DD  ;; Opcode for ld d, ixl
                            199 .endm
                            200 
                            201 ;; Macro: ld__e_ixl
                            202 ;;    Opcode for "LD e, ixl" instruction
                            203 ;; 
                            204 .mdelete ld__e_ixl
                            205 .macro ld__e_ixl
                            206    .dw #0x5DDD  ;; Opcode for ld e, ixl
                            207 .endm
                            208 
                            209 ;; Macro: add__ixl
                            210 ;;    Opcode for "Add ixl" instruction
                            211 ;; 
                            212 .mdelete add__ixl
                            213 .macro add__ixl
                            214    .dw #0x85DD  ;; Opcode for add ixl
                            215 .endm
                            216 
                            217 ;; Macro: sub__ixl
                            218 ;;    Opcode for "SUB ixl" instruction
                            219 ;; 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 21.
Hexadecimal [16-Bits]



                            220 .mdelete sub__ixl
                            221 .macro sub__ixl
                            222    .dw #0x95DD  ;; Opcode for sub ixl
                            223 .endm
                            224 
                            225 ;; Macro: adc__ixl
                            226 ;;    Opcode for "ADC ixl" instruction
                            227 ;; 
                            228 .mdelete adc__ixl
                            229 .macro adc__ixl
                            230    .dw #0x8DDD  ;; Opcode for adc ixl
                            231 .endm
                            232 
                            233 ;; Macro: sbc__ixl
                            234 ;;    Opcode for "SBC ixl" instruction
                            235 ;; 
                            236 .mdelete sbc__ixl
                            237 .macro sbc__ixl
                            238    .dw #0x9DDD  ;; Opcode for sbc ixl
                            239 .endm
                            240 
                            241 ;; Macro: and__ixl
                            242 ;;    Opcode for "AND ixl" instruction
                            243 ;; 
                            244 .mdelete and__ixl
                            245 .macro and__ixl
                            246    .dw #0xA5DD  ;; Opcode for and ixl
                            247 .endm
                            248 
                            249 ;; Macro: or__ixl
                            250 ;;    Opcode for "OR ixl" instruction
                            251 ;; 
                            252 .mdelete or__ixl
                            253 .macro or__ixl
                            254    .dw #0xB5DD  ;; Opcode for or ixl
                            255 .endm
                            256 
                            257 ;; Macro: xor__ixl
                            258 ;;    Opcode for "XOR ixl" instruction
                            259 ;; 
                            260 .mdelete xor__ixl
                            261 .macro xor__ixl
                            262    .dw #0xADDD  ;; Opcode for xor ixl
                            263 .endm
                            264 
                            265 ;; Macro: cp__ixl
                            266 ;;    Opcode for "CP ixl" instruction
                            267 ;; 
                            268 .mdelete cp__ixl
                            269 .macro cp__ixl
                            270    .dw #0xBDDD  ;; Opcode for cp ixl
                            271 .endm
                            272 
                            273 ;; Macro: dec__ixl
                            274 ;;    Opcode for "DEC ixl" instruction
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 22.
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                            275 ;; 
                            276 .mdelete dec__ixl
                            277 .macro dec__ixl
                            278    .dw #0x2DDD  ;; Opcode for dec ixl
                            279 .endm
                            280 
                            281 ;; Macro: inc__ixl
                            282 ;;    Opcode for "INC ixl" instruction
                            283 ;; 
                            284 .mdelete inc__ixl
                            285 .macro inc__ixl
                            286    .dw #0x2CDD  ;; Opcode for inc ixl
                            287 .endm
                            288 
                            289 
                            290 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            291 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            292 ;; IXH Related Macros
                            293 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            294 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            295 
                            296 ;; Macro: ld__ixh    Value
                            297 ;;    Opcode for "LD IXH, Value" instruction
                            298 ;;  
                            299 ;; Parameters:
                            300 ;;    Value - An inmediate 8-bits value that will be loaded into IXH
                            301 ;; 
                            302 .mdelete  ld__ixh
                            303 .macro ld__ixh    Value 
                            304    .db #0xDD, #0x26, Value  ;; Opcode for ld ixh, Value
                            305 .endm
                            306 
                            307 ;; Macro: ld__ixh_a
                            308 ;;    Opcode for "LD IXH, a" instruction
                            309 ;; 
                            310 .mdelete ld__ixh_a
                            311 .macro ld__ixh_a
                            312    .dw #0x67DD  ;; Opcode for ld ixh, a
                            313 .endm
                            314 
                            315 ;; Macro: ld__ixh_b
                            316 ;;    Opcode for "LD IXH, B" instruction
                            317 ;; 
                            318 .mdelete ld__ixh_b
                            319 .macro ld__ixh_b
                            320    .dw #0x60DD  ;; Opcode for ld ixh, b
                            321 .endm
                            322 
                            323 ;; Macro: ld__ixh_c
                            324 ;;    Opcode for "LD IXH, C" instruction
                            325 ;; 
                            326 .mdelete ld__ixh_c
                            327 .macro ld__ixh_c
                            328    .dw #0x61DD  ;; Opcode for ld ixh, c
                            329 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 23.
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                            330 
                            331 ;; Macro: ld__ixh_d
                            332 ;;    Opcode for "LD IXH, D" instruction
                            333 ;; 
                            334 .mdelete ld__ixh_d
                            335 .macro ld__ixh_d
                            336    .dw #0x62DD  ;; Opcode for ld ixh, d
                            337 .endm
                            338 
                            339 ;; Macro: ld__ixh_e
                            340 ;;    Opcode for "LD IXH, E" instruction
                            341 ;; 
                            342 .mdelete ld__ixh_e
                            343 .macro ld__ixh_e
                            344    .dw #0x63DD  ;; Opcode for ld ixh, e
                            345 .endm
                            346 
                            347 ;; Macro: ld__ixh_ixl
                            348 ;;    Opcode for "LD IXH, IXL" instruction
                            349 ;; 
                            350 .mdelete ld__ixh_ixl
                            351 .macro ld__ixh_ixl
                            352    .dw #0x65DD  ;; Opcode for ld ixh, ixl
                            353 .endm
                            354 
                            355 ;; Macro: ld__a_ixh
                            356 ;;    Opcode for "LD A, IXH" instruction
                            357 ;; 
                            358 .mdelete ld__a_ixh
                            359 .macro ld__a_ixh
                            360    .dw #0x7CDD  ;; Opcode for ld a, ixh
                            361 .endm
                            362 
                            363 ;; Macro: ld__b_ixh
                            364 ;;    Opcode for "LD B, IXH" instruction
                            365 ;; 
                            366 .mdelete ld__b_ixh
                            367 .macro ld__b_ixh
                            368    .dw #0x44DD  ;; Opcode for ld b, ixh
                            369 .endm
                            370 
                            371 ;; Macro: ld__c_ixh
                            372 ;;    Opcode for "LD c, IXH" instruction
                            373 ;; 
                            374 .mdelete ld__c_ixh
                            375 .macro ld__c_ixh
                            376    .dw #0x4CDD  ;; Opcode for ld c, ixh
                            377 .endm
                            378 
                            379 ;; Macro: ld__d_ixh
                            380 ;;    Opcode for "LD D, IXH" instruction
                            381 ;; 
                            382 .mdelete ld__d_ixh
                            383 .macro ld__d_ixh
                            384    .dw #0x54DD  ;; Opcode for ld d, ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 24.
Hexadecimal [16-Bits]



                            385 .endm
                            386 
                            387 ;; Macro: ld__e_ixh
                            388 ;;    Opcode for "LD e, IXH" instruction
                            389 ;; 
                            390 .mdelete ld__e_ixh
                            391 .macro ld__e_ixh
                            392    .dw #0x5CDD  ;; Opcode for ld e, ixh
                            393 .endm
                            394 
                            395 ;; Macro: add__ixh
                            396 ;;    Opcode for "ADD IXH" instruction
                            397 ;; 
                            398 .mdelete add__ixh
                            399 .macro add__ixh
                            400    .dw #0x84DD  ;; Opcode for add ixh
                            401 .endm
                            402 
                            403 ;; Macro: sub__ixh
                            404 ;;    Opcode for "SUB IXH" instruction
                            405 ;; 
                            406 .mdelete sub__ixh
                            407 .macro sub__ixh
                            408    .dw #0x94DD  ;; Opcode for sub ixh
                            409 .endm
                            410 
                            411 ;; Macro: adc__ixh
                            412 ;;    Opcode for "ADC IXH" instruction
                            413 ;; 
                            414 .mdelete adc__ixh
                            415 .macro adc__ixh
                            416    .dw #0x8CDD  ;; Opcode for adc ixh
                            417 .endm
                            418 
                            419 ;; Macro: sbc__ixh
                            420 ;;    Opcode for "SBC IXH" instruction
                            421 ;; 
                            422 .mdelete sbc__ixh
                            423 .macro sbc__ixh
                            424    .dw #0x9CDD  ;; Opcode for sbc ixh
                            425 .endm
                            426 
                            427 ;; Macro: and__ixh
                            428 ;;    Opcode for "AND IXH" instruction
                            429 ;; 
                            430 .mdelete and__ixh
                            431 .macro and__ixh
                            432    .dw #0xA4DD  ;; Opcode for and ixh
                            433 .endm
                            434 
                            435 ;; Macro: or__ixh
                            436 ;;    Opcode for "OR IXH" instruction
                            437 ;; 
                            438 .mdelete or__ixh
                            439 .macro or__ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 25.
Hexadecimal [16-Bits]



                            440    .dw #0xB4DD  ;; Opcode for or ixh
                            441 .endm
                            442 
                            443 ;; Macro: xor__ixh
                            444 ;;    Opcode for "XOR IXH" instruction
                            445 ;; 
                            446 .mdelete xor__ixh
                            447 .macro xor__ixh
                            448    .dw #0xACDD  ;; Opcode for xor ixh
                            449 .endm
                            450 
                            451 ;; Macro: cp__ixh
                            452 ;;    Opcode for "CP IXH" instruction
                            453 ;; 
                            454 .mdelete cp__ixh
                            455 .macro cp__ixh
                            456    .dw #0xBCDD  ;; Opcode for cp ixh
                            457 .endm
                            458 
                            459 ;; Macro: dec__ixh
                            460 ;;    Opcode for "DEC IXH" instruction
                            461 ;; 
                            462 .mdelete dec__ixh
                            463 .macro dec__ixh
                            464    .dw #0x25DD  ;; Opcode for dec ixh
                            465 .endm
                            466 
                            467 ;; Macro: inc__ixh
                            468 ;;    Opcode for "INC IXH" instruction
                            469 ;; 
                            470 .mdelete inc__ixh
                            471 .macro inc__ixh
                            472    .dw #0x24DD  ;; Opcode for inc ixh
                            473 .endm
                            474 
                            475 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            476 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            477 ;; IYL Related Macros
                            478 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            479 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            480 
                            481 ;; Macro: ld__iyl    Value
                            482 ;;    Opcode for "LD iyl, Value" instruction
                            483 ;;  
                            484 ;; Parameters:
                            485 ;;    Value - An inmediate 8-bits value that will be loaded into iyl
                            486 ;; 
                            487 .mdelete  ld__iyl
                            488 .macro ld__iyl    Value 
                            489    .db #0xFD, #0x2E, Value  ;; Opcode for ld iyl, Value
                            490 .endm
                            491 
                            492 ;; Macro: ld__iyl_a
                            493 ;;    Opcode for "LD iyl, a" instruction
                            494 ;; 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 26.
Hexadecimal [16-Bits]



                            495 .mdelete ld__iyl_a
                            496 .macro ld__iyl_a
                            497    .dw #0x6FFD  ;; Opcode for ld iyl, a
                            498 .endm
                            499 
                            500 ;; Macro: ld__iyl_b
                            501 ;;    Opcode for "LD iyl, B" instruction
                            502 ;; 
                            503 .mdelete ld__iyl_b
                            504 .macro ld__iyl_b
                            505    .dw #0x68FD  ;; Opcode for ld iyl, b
                            506 .endm
                            507 
                            508 ;; Macro: ld__iyl_c
                            509 ;;    Opcode for "LD iyl, C" instruction
                            510 ;; 
                            511 .mdelete ld__iyl_c
                            512 .macro ld__iyl_c
                            513    .dw #0x69FD  ;; Opcode for ld iyl, c
                            514 .endm
                            515 
                            516 ;; Macro: ld__iyl_d
                            517 ;;    Opcode for "LD iyl, D" instruction
                            518 ;; 
                            519 .mdelete ld__iyl_d
                            520 .macro ld__iyl_d
                            521    .dw #0x6AFD  ;; Opcode for ld iyl, d
                            522 .endm
                            523 
                            524 ;; Macro: ld__iyl_e
                            525 ;;    Opcode for "LD iyl, E" instruction
                            526 ;; 
                            527 .mdelete ld__iyl_e
                            528 .macro ld__iyl_e
                            529    .dw #0x6BFD  ;; Opcode for ld iyl, e
                            530 .endm
                            531 
                            532 ;; Macro: ld__iyl_iyh
                            533 ;;    Opcode for "LD iyl, IXL" instruction
                            534 ;; 
                            535 .mdelete  ld__iyl_iyh
                            536 .macro ld__iyl_iyh
                            537    .dw #0x6CFD  ;; Opcode for ld iyl, ixl
                            538 .endm
                            539 
                            540 ;; Macro: ld__a_iyl
                            541 ;;    Opcode for "LD A, iyl" instruction
                            542 ;; 
                            543 .mdelete ld__a_iyl
                            544 .macro ld__a_iyl
                            545    .dw #0x7DFD  ;; Opcode for ld a, iyl
                            546 .endm
                            547 
                            548 ;; Macro: ld__b_iyl
                            549 ;;    Opcode for "LD B, iyl" instruction
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 27.
Hexadecimal [16-Bits]



                            550 ;; 
                            551 .mdelete ld__b_iyl
                            552 .macro ld__b_iyl
                            553    .dw #0x45FD  ;; Opcode for ld b, iyl
                            554 .endm
                            555 
                            556 ;; Macro: ld__c_iyl
                            557 ;;    Opcode for "LD c, iyl" instruction
                            558 ;; 
                            559 .mdelete ld__c_iyl
                            560 .macro ld__c_iyl
                            561    .dw #0x4DFD  ;; Opcode for ld c, iyl
                            562 .endm
                            563 
                            564 ;; Macro: ld__d_iyl
                            565 ;;    Opcode for "LD D, iyl" instruction
                            566 ;; 
                            567 .mdelete ld__d_iyl
                            568 .macro ld__d_iyl
                            569    .dw #0x55FD  ;; Opcode for ld d, iyl
                            570 .endm
                            571 
                            572 ;; Macro: ld__e_iyl
                            573 ;;    Opcode for "LD e, iyl" instruction
                            574 ;; 
                            575 .mdelete ld__e_iyl
                            576 .macro ld__e_iyl
                            577    .dw #0x5DFD  ;; Opcode for ld e, iyl
                            578 .endm
                            579 
                            580 ;; Macro: add__iyl
                            581 ;;    Opcode for "Add iyl" instruction
                            582 ;; 
                            583 .mdelete add__iyl
                            584 .macro add__iyl
                            585    .dw #0x85FD  ;; Opcode for add iyl
                            586 .endm
                            587 
                            588 ;; Macro: sub__iyl
                            589 ;;    Opcode for "SUB iyl" instruction
                            590 ;; 
                            591 .mdelete sub__iyl
                            592 .macro sub__iyl
                            593    .dw #0x95FD  ;; Opcode for sub iyl
                            594 .endm
                            595 
                            596 ;; Macro: adc__iyl
                            597 ;;    Opcode for "ADC iyl" instruction
                            598 ;; 
                            599 .mdelete adc__iyl
                            600 .macro adc__iyl
                            601    .dw #0x8DFD  ;; Opcode for adc iyl
                            602 .endm
                            603 
                            604 ;; Macro: sbc__iyl
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 28.
Hexadecimal [16-Bits]



                            605 ;;    Opcode for "SBC iyl" instruction
                            606 ;; 
                            607 .mdelete sbc__iyl
                            608 .macro sbc__iyl
                            609    .dw #0x9DFD  ;; Opcode for sbc iyl
                            610 .endm
                            611 
                            612 ;; Macro: and__iyl
                            613 ;;    Opcode for "AND iyl" instruction
                            614 ;; 
                            615 .mdelete and__iyl
                            616 .macro and__iyl
                            617    .dw #0xA5FD  ;; Opcode for and iyl
                            618 .endm
                            619 
                            620 ;; Macro: or__iyl
                            621 ;;    Opcode for "OR iyl" instruction
                            622 ;; 
                            623 .mdelete or__iyl
                            624 .macro or__iyl
                            625    .dw #0xB5FD  ;; Opcode for or iyl
                            626 .endm
                            627 
                            628 ;; Macro: xor__iyl
                            629 ;;    Opcode for "XOR iyl" instruction
                            630 ;; 
                            631 .mdelete xor__iyl
                            632 .macro xor__iyl
                            633    .dw #0xADFD  ;; Opcode for xor iyl
                            634 .endm
                            635 
                            636 ;; Macro: cp__iyl
                            637 ;;    Opcode for "CP iyl" instruction
                            638 ;; 
                            639 .mdelete cp__iyl
                            640 .macro cp__iyl
                            641    .dw #0xBDFD  ;; Opcode for cp iyl
                            642 .endm
                            643 
                            644 ;; Macro: dec__iyl
                            645 ;;    Opcode for "DEC iyl" instruction
                            646 ;; 
                            647 .mdelete dec__iyl
                            648 .macro dec__iyl
                            649    .dw #0x2DFD  ;; Opcode for dec iyl
                            650 .endm
                            651 
                            652 ;; Macro: inc__iyl
                            653 ;;    Opcode for "INC iyl" instruction
                            654 ;; 
                            655 .mdelete inc__iyl
                            656 .macro inc__iyl
                            657    .dw #0x2CFD  ;; Opcode for inc iyl
                            658 .endm
                            659 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 29.
Hexadecimal [16-Bits]



                            660 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            661 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            662 ;; IYH Related Macros
                            663 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            664 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            665 
                            666 ;; Macro: ld__iyh    Value
                            667 ;;    Opcode for "LD iyh, Value" instruction
                            668 ;;  
                            669 ;; Parameters:
                            670 ;;    Value - An inmediate 8-bits value that will be loaded into iyh
                            671 ;; 
                            672 .mdelete  ld__iyh
                            673 .macro ld__iyh    Value 
                            674    .db #0xFD, #0x26, Value  ;; Opcode for ld iyh, Value
                            675 .endm
                            676 
                            677 ;; Macro: ld__iyh_a
                            678 ;;    Opcode for "LD iyh, a" instruction
                            679 ;; 
                            680 .mdelete ld__iyh_a
                            681 .macro ld__iyh_a
                            682    .dw #0x67FD  ;; Opcode for ld iyh, a
                            683 .endm
                            684 
                            685 ;; Macro: ld__iyh_b
                            686 ;;    Opcode for "LD iyh, B" instruction
                            687 ;; 
                            688 .mdelete ld__iyh_b
                            689 .macro ld__iyh_b
                            690    .dw #0x60FD  ;; Opcode for ld iyh, b
                            691 .endm
                            692 
                            693 ;; Macro: ld__iyh_c
                            694 ;;    Opcode for "LD iyh, C" instruction
                            695 ;; 
                            696 .mdelete ld__iyh_c
                            697 .macro ld__iyh_c
                            698    .dw #0x61FD  ;; Opcode for ld iyh, c
                            699 .endm
                            700 
                            701 ;; Macro: ld__iyh_d
                            702 ;;    Opcode for "LD iyh, D" instruction
                            703 ;; 
                            704 .mdelete ld__iyh_d
                            705 .macro ld__iyh_d
                            706    .dw #0x62FD  ;; Opcode for ld iyh, d
                            707 .endm
                            708 
                            709 ;; Macro: ld__iyh_e
                            710 ;;    Opcode for "LD iyh, E" instruction
                            711 ;; 
                            712 .mdelete ld__iyh_e
                            713 .macro ld__iyh_e
                            714    .dw #0x63FD  ;; Opcode for ld iyh, e
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 30.
Hexadecimal [16-Bits]



                            715 .endm
                            716 
                            717 ;; Macro: ld__iyh_iyl
                            718 ;;    Opcode for "LD iyh, IyL" instruction
                            719 ;; 
                            720 .mdelete  ld__iyh_iyl
                            721 .macro ld__iyh_iyl
                            722    .dw #0x65FD  ;; Opcode for ld iyh, iyl
                            723 .endm
                            724 
                            725 ;; Macro: ld__a_iyh
                            726 ;;    Opcode for "LD A, iyh" instruction
                            727 ;; 
                            728 .mdelete ld__a_iyh
                            729 .macro ld__a_iyh
                            730    .dw #0x7CFD  ;; Opcode for ld a, iyh
                            731 .endm
                            732 
                            733 ;; Macro: ld__b_iyh
                            734 ;;    Opcode for "LD B, iyh" instruction
                            735 ;; 
                            736 .mdelete ld__b_iyh
                            737 .macro ld__b_iyh
                            738    .dw #0x44FD  ;; Opcode for ld b, iyh
                            739 .endm
                            740 
                            741 ;; Macro: ld__c_iyh
                            742 ;;    Opcode for "LD c, iyh" instruction
                            743 ;; 
                            744 .mdelete ld__c_iyh
                            745 .macro ld__c_iyh
                            746    .dw #0x4CFD  ;; Opcode for ld c, iyh
                            747 .endm
                            748 
                            749 ;; Macro: ld__d_iyh
                            750 ;;    Opcode for "LD D, iyh" instruction
                            751 ;; 
                            752 .mdelete ld__d_iyh
                            753 .macro ld__d_iyh
                            754    .dw #0x54FD  ;; Opcode for ld d, iyh
                            755 .endm
                            756 
                            757 ;; Macro: ld__e_iyh
                            758 ;;    Opcode for "LD e, iyh" instruction
                            759 ;; 
                            760 .mdelete ld__e_iyh
                            761 .macro ld__e_iyh
                            762    .dw #0x5CFD  ;; Opcode for ld e, iyh
                            763 .endm
                            764 
                            765 ;; Macro: add__iyh
                            766 ;;    Opcode for "Add iyh" instruction
                            767 ;; 
                            768 .mdelete add__iyh
                            769 .macro add__iyh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 31.
Hexadecimal [16-Bits]



                            770    .dw #0x84FD  ;; Opcode for add iyh
                            771 .endm
                            772 
                            773 ;; Macro: sub__iyh
                            774 ;;    Opcode for "SUB iyh" instruction
                            775 ;; 
                            776 .mdelete sub__iyh
                            777 .macro sub__iyh
                            778    .dw #0x94FD  ;; Opcode for sub iyh
                            779 .endm
                            780 
                            781 ;; Macro: adc__iyh
                            782 ;;    Opcode for "ADC iyh" instruction
                            783 ;; 
                            784 .mdelete adc__iyh
                            785 .macro adc__iyh
                            786    .dw #0x8CFD  ;; Opcode for adc iyh
                            787 .endm
                            788 
                            789 ;; Macro: sbc__iyh
                            790 ;;    Opcode for "SBC iyh" instruction
                            791 ;; 
                            792 .mdelete sbc__iyh
                            793 .macro sbc__iyh
                            794    .dw #0x9CFD  ;; Opcode for sbc iyh
                            795 .endm
                            796 
                            797 ;; Macro: and__iyh
                            798 ;;    Opcode for "AND iyh" instruction
                            799 ;; 
                            800 .mdelete and__iyh
                            801 .macro and__iyh
                            802    .dw #0xA4FD  ;; Opcode for and iyh
                            803 .endm
                            804 
                            805 ;; Macro: or__iyh
                            806 ;;    Opcode for "OR iyh" instruction
                            807 ;; 
                            808 .mdelete or__iyh
                            809 .macro or__iyh
                            810    .dw #0xB4FD  ;; Opcode for or iyh
                            811 .endm
                            812 
                            813 ;; Macro: xor__iyh
                            814 ;;    Opcode for "XOR iyh" instruction
                            815 ;; 
                            816 .mdelete xor__iyh
                            817 .macro xor__iyh
                            818    .dw #0xACFD  ;; Opcode for xor iyh
                            819 .endm
                            820 
                            821 ;; Macro: cp__iyh
                            822 ;;    Opcode for "CP iyh" instruction
                            823 ;; 
                            824 .mdelete cp__iyh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 32.
Hexadecimal [16-Bits]



                            825 .macro cp__iyh
                            826    .dw #0xBCFD  ;; Opcode for cp iyh
                            827 .endm
                            828 
                            829 ;; Macro: dec__iyh
                            830 ;;    Opcode for "DEC iyh" instruction
                            831 ;; 
                            832 .mdelete dec__iyh
                            833 .macro dec__iyh
                            834    .dw #0x25FD  ;; Opcode for dec iyh
                            835 .endm
                            836 
                            837 ;; Macro: inc__iyh
                            838 ;;    Opcode for "INC iyh" instruction
                            839 ;; 
                            840 .mdelete inc__iyh
                            841 .macro inc__iyh
                            842    .dw #0x24FD  ;; Opcode for inc iyh
                            843 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 33.
Hexadecimal [16-Bits]



                             23 .include "macros/cpct_combinedOperations.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Combined operations
                             21 ;;
                             22 ;;    Macros to clarify source code that combine several operations in one macro.
                             23 ;; For instance, macros to copy HL to DE or IX to DE, that require 2 or more 
                             24 ;; instructions but are commonly used.
                             25 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 34.
Hexadecimal [16-Bits]



                             26 .include "macros/cpct_undocumentedOpcodes.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Undocumented Opcodes
                             21 ;;
                             22 ;;    Macros to clarify source code when using undocumented opcodes. Only
                             23 ;; valid to be used from assembly language (not from C).
                             24 ;;
                             25 
                             26 ;; Macro: jr__0
                             27 ;;    Opcode for "JR #0" instruction
                             28 ;; 
                             29 .mdelete jr__0
                             30 .macro jr__0
                             31    .DW #0x0018  ;; JR #00 (Normally used as a modifiable jump, as jr 0 is an infinite loop)
                             32 .endm
                             33 
                             34 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             35 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             36 ;; SLL Instructions
                             37 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             38 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                             39 
                             40 ;; Macro: sll__b
                             41 ;;    Opcode for "SLL b" instruction
                             42 ;; 
                             43 .mdelete sll__b
                             44 .macro sll__b
                             45    .db #0xCB, #0x30  ;; Opcode for sll b
                             46 .endm
                             47 
                             48 ;; Macro: sll__c
                             49 ;;    Opcode for "SLL c" instruction
                             50 ;; 
                             51 .mdelete sll__c
                             52 .macro sll__c
                             53    .db #0xCB, #0x31  ;; Opcode for sll c
                             54 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 35.
Hexadecimal [16-Bits]



                             55 
                             56 ;; Macro: sll__d
                             57 ;;    Opcode for "SLL d" instruction
                             58 ;; 
                             59 .mdelete sll__d
                             60 .macro sll__d
                             61    .db #0xCB, #0x32  ;; Opcode for sll d
                             62 .endm
                             63 
                             64 ;; Macro: sll__e
                             65 ;;    Opcode for "SLL e" instruction
                             66 ;; 
                             67 .mdelete sll__e
                             68 .macro sll__e
                             69    .db #0xCB, #0x33  ;; Opcode for sll e
                             70 .endm
                             71 
                             72 ;; Macro: sll__h
                             73 ;;    Opcode for "SLL h" instruction
                             74 ;; 
                             75 .mdelete sll__h
                             76 .macro sll__h
                             77    .db #0xCB, #0x34  ;; Opcode for sll h
                             78 .endm
                             79 
                             80 ;; Macro: sll__l
                             81 ;;    Opcode for "SLL l" instruction
                             82 ;; 
                             83 .mdelete sll__l
                             84 .macro sll__l
                             85    .db #0xCB, #0x35  ;; Opcode for sll l
                             86 .endm
                             87 
                             88 ;; Macro: sll___hl_
                             89 ;;    Opcode for "SLL (hl)" instruction
                             90 ;; 
                             91 .mdelete sll___hl_
                             92 .macro sll___hl_
                             93    .db #0xCB, #0x36  ;; Opcode for sll (hl)
                             94 .endm
                             95 
                             96 ;; Macro: sll__a
                             97 ;;    Opcode for "SLL a" instruction
                             98 ;; 
                             99 .mdelete sll__a
                            100 .macro sll__a
                            101    .db #0xCB, #0x37  ;; Opcode for sll a
                            102 .endm
                            103 
                            104 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            105 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            106 ;; IXL Related Macros
                            107 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            108 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            109 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 36.
Hexadecimal [16-Bits]



                            110 ;; Macro: ld__ixl    Value
                            111 ;;    Opcode for "LD ixl, Value" instruction
                            112 ;;  
                            113 ;; Parameters:
                            114 ;;    Value - An inmediate 8-bits value that will be loaded into ixl
                            115 ;; 
                            116 .mdelete ld__ixl
                            117 .macro ld__ixl    Value 
                            118    .db #0xDD, #0x2E, Value  ;; Opcode for ld ixl, Value
                            119 .endm
                            120 
                            121 ;; Macro: ld__ixl_a
                            122 ;;    Opcode for "LD ixl, a" instruction
                            123 ;; 
                            124 .mdelete ld__ixl_a
                            125 .macro ld__ixl_a
                            126    .dw #0x6FDD  ;; Opcode for ld ixl, a
                            127 .endm
                            128 
                            129 ;; Macro: ld__ixl_b
                            130 ;;    Opcode for "LD ixl, B" instruction
                            131 ;; 
                            132 .mdelete ld__ixl_b
                            133 .macro ld__ixl_b
                            134    .dw #0x68DD  ;; Opcode for ld ixl, b
                            135 .endm
                            136 
                            137 ;; Macro: ld__ixl_c
                            138 ;;    Opcode for "LD ixl, C" instruction
                            139 ;; 
                            140 .mdelete ld__ixl_c
                            141 .macro ld__ixl_c
                            142    .dw #0x69DD  ;; Opcode for ld ixl, c
                            143 .endm
                            144 
                            145 ;; Macro: ld__ixl_d
                            146 ;;    Opcode for "LD ixl, D" instruction
                            147 ;; 
                            148 .mdelete ld__ixl_d
                            149 .macro ld__ixl_d
                            150    .dw #0x6ADD  ;; Opcode for ld ixl, d
                            151 .endm
                            152 
                            153 ;; Macro: ld__ixl_e
                            154 ;;    Opcode for "LD ixl, E" instruction
                            155 ;; 
                            156 .mdelete ld__ixl_e
                            157 .macro ld__ixl_e
                            158    .dw #0x6BDD  ;; Opcode for ld ixl, e
                            159 .endm
                            160 
                            161 ;; Macro: ld__ixl_ixh
                            162 ;;    Opcode for "LD ixl, IXH" instruction
                            163 ;; 
                            164 .mdelete  ld__ixl_ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 37.
Hexadecimal [16-Bits]



                            165 .macro ld__ixl_ixh
                            166    .dw #0x6CDD  ;; Opcode for ld ixl, ixh
                            167 .endm
                            168 
                            169 ;; Macro: ld__a_ixl
                            170 ;;    Opcode for "LD A, ixl" instruction
                            171 ;; 
                            172 .mdelete ld__a_ixl
                            173 .macro ld__a_ixl
                            174    .dw #0x7DDD  ;; Opcode for ld a, ixl
                            175 .endm
                            176 
                            177 ;; Macro: ld__b_ixl
                            178 ;;    Opcode for "LD B, ixl" instruction
                            179 ;; 
                            180 .mdelete ld__b_ixl
                            181 .macro ld__b_ixl
                            182    .dw #0x45DD  ;; Opcode for ld b, ixl
                            183 .endm
                            184 
                            185 ;; Macro: ld__c_ixl
                            186 ;;    Opcode for "LD c, ixl" instruction
                            187 ;; 
                            188 .mdelete ld__c_ixl
                            189 .macro ld__c_ixl
                            190    .dw #0x4DDD  ;; Opcode for ld c, ixl
                            191 .endm
                            192 
                            193 ;; Macro: ld__d_ixl
                            194 ;;    Opcode for "LD D, ixl" instruction
                            195 ;; 
                            196 .mdelete ld__d_ixl
                            197 .macro ld__d_ixl
                            198    .dw #0x55DD  ;; Opcode for ld d, ixl
                            199 .endm
                            200 
                            201 ;; Macro: ld__e_ixl
                            202 ;;    Opcode for "LD e, ixl" instruction
                            203 ;; 
                            204 .mdelete ld__e_ixl
                            205 .macro ld__e_ixl
                            206    .dw #0x5DDD  ;; Opcode for ld e, ixl
                            207 .endm
                            208 
                            209 ;; Macro: add__ixl
                            210 ;;    Opcode for "Add ixl" instruction
                            211 ;; 
                            212 .mdelete add__ixl
                            213 .macro add__ixl
                            214    .dw #0x85DD  ;; Opcode for add ixl
                            215 .endm
                            216 
                            217 ;; Macro: sub__ixl
                            218 ;;    Opcode for "SUB ixl" instruction
                            219 ;; 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 38.
Hexadecimal [16-Bits]



                            220 .mdelete sub__ixl
                            221 .macro sub__ixl
                            222    .dw #0x95DD  ;; Opcode for sub ixl
                            223 .endm
                            224 
                            225 ;; Macro: adc__ixl
                            226 ;;    Opcode for "ADC ixl" instruction
                            227 ;; 
                            228 .mdelete adc__ixl
                            229 .macro adc__ixl
                            230    .dw #0x8DDD  ;; Opcode for adc ixl
                            231 .endm
                            232 
                            233 ;; Macro: sbc__ixl
                            234 ;;    Opcode for "SBC ixl" instruction
                            235 ;; 
                            236 .mdelete sbc__ixl
                            237 .macro sbc__ixl
                            238    .dw #0x9DDD  ;; Opcode for sbc ixl
                            239 .endm
                            240 
                            241 ;; Macro: and__ixl
                            242 ;;    Opcode for "AND ixl" instruction
                            243 ;; 
                            244 .mdelete and__ixl
                            245 .macro and__ixl
                            246    .dw #0xA5DD  ;; Opcode for and ixl
                            247 .endm
                            248 
                            249 ;; Macro: or__ixl
                            250 ;;    Opcode for "OR ixl" instruction
                            251 ;; 
                            252 .mdelete or__ixl
                            253 .macro or__ixl
                            254    .dw #0xB5DD  ;; Opcode for or ixl
                            255 .endm
                            256 
                            257 ;; Macro: xor__ixl
                            258 ;;    Opcode for "XOR ixl" instruction
                            259 ;; 
                            260 .mdelete xor__ixl
                            261 .macro xor__ixl
                            262    .dw #0xADDD  ;; Opcode for xor ixl
                            263 .endm
                            264 
                            265 ;; Macro: cp__ixl
                            266 ;;    Opcode for "CP ixl" instruction
                            267 ;; 
                            268 .mdelete cp__ixl
                            269 .macro cp__ixl
                            270    .dw #0xBDDD  ;; Opcode for cp ixl
                            271 .endm
                            272 
                            273 ;; Macro: dec__ixl
                            274 ;;    Opcode for "DEC ixl" instruction
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 39.
Hexadecimal [16-Bits]



                            275 ;; 
                            276 .mdelete dec__ixl
                            277 .macro dec__ixl
                            278    .dw #0x2DDD  ;; Opcode for dec ixl
                            279 .endm
                            280 
                            281 ;; Macro: inc__ixl
                            282 ;;    Opcode for "INC ixl" instruction
                            283 ;; 
                            284 .mdelete inc__ixl
                            285 .macro inc__ixl
                            286    .dw #0x2CDD  ;; Opcode for inc ixl
                            287 .endm
                            288 
                            289 
                            290 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            291 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            292 ;; IXH Related Macros
                            293 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            294 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            295 
                            296 ;; Macro: ld__ixh    Value
                            297 ;;    Opcode for "LD IXH, Value" instruction
                            298 ;;  
                            299 ;; Parameters:
                            300 ;;    Value - An inmediate 8-bits value that will be loaded into IXH
                            301 ;; 
                            302 .mdelete  ld__ixh
                            303 .macro ld__ixh    Value 
                            304    .db #0xDD, #0x26, Value  ;; Opcode for ld ixh, Value
                            305 .endm
                            306 
                            307 ;; Macro: ld__ixh_a
                            308 ;;    Opcode for "LD IXH, a" instruction
                            309 ;; 
                            310 .mdelete ld__ixh_a
                            311 .macro ld__ixh_a
                            312    .dw #0x67DD  ;; Opcode for ld ixh, a
                            313 .endm
                            314 
                            315 ;; Macro: ld__ixh_b
                            316 ;;    Opcode for "LD IXH, B" instruction
                            317 ;; 
                            318 .mdelete ld__ixh_b
                            319 .macro ld__ixh_b
                            320    .dw #0x60DD  ;; Opcode for ld ixh, b
                            321 .endm
                            322 
                            323 ;; Macro: ld__ixh_c
                            324 ;;    Opcode for "LD IXH, C" instruction
                            325 ;; 
                            326 .mdelete ld__ixh_c
                            327 .macro ld__ixh_c
                            328    .dw #0x61DD  ;; Opcode for ld ixh, c
                            329 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 40.
Hexadecimal [16-Bits]



                            330 
                            331 ;; Macro: ld__ixh_d
                            332 ;;    Opcode for "LD IXH, D" instruction
                            333 ;; 
                            334 .mdelete ld__ixh_d
                            335 .macro ld__ixh_d
                            336    .dw #0x62DD  ;; Opcode for ld ixh, d
                            337 .endm
                            338 
                            339 ;; Macro: ld__ixh_e
                            340 ;;    Opcode for "LD IXH, E" instruction
                            341 ;; 
                            342 .mdelete ld__ixh_e
                            343 .macro ld__ixh_e
                            344    .dw #0x63DD  ;; Opcode for ld ixh, e
                            345 .endm
                            346 
                            347 ;; Macro: ld__ixh_ixl
                            348 ;;    Opcode for "LD IXH, IXL" instruction
                            349 ;; 
                            350 .mdelete ld__ixh_ixl
                            351 .macro ld__ixh_ixl
                            352    .dw #0x65DD  ;; Opcode for ld ixh, ixl
                            353 .endm
                            354 
                            355 ;; Macro: ld__a_ixh
                            356 ;;    Opcode for "LD A, IXH" instruction
                            357 ;; 
                            358 .mdelete ld__a_ixh
                            359 .macro ld__a_ixh
                            360    .dw #0x7CDD  ;; Opcode for ld a, ixh
                            361 .endm
                            362 
                            363 ;; Macro: ld__b_ixh
                            364 ;;    Opcode for "LD B, IXH" instruction
                            365 ;; 
                            366 .mdelete ld__b_ixh
                            367 .macro ld__b_ixh
                            368    .dw #0x44DD  ;; Opcode for ld b, ixh
                            369 .endm
                            370 
                            371 ;; Macro: ld__c_ixh
                            372 ;;    Opcode for "LD c, IXH" instruction
                            373 ;; 
                            374 .mdelete ld__c_ixh
                            375 .macro ld__c_ixh
                            376    .dw #0x4CDD  ;; Opcode for ld c, ixh
                            377 .endm
                            378 
                            379 ;; Macro: ld__d_ixh
                            380 ;;    Opcode for "LD D, IXH" instruction
                            381 ;; 
                            382 .mdelete ld__d_ixh
                            383 .macro ld__d_ixh
                            384    .dw #0x54DD  ;; Opcode for ld d, ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 41.
Hexadecimal [16-Bits]



                            385 .endm
                            386 
                            387 ;; Macro: ld__e_ixh
                            388 ;;    Opcode for "LD e, IXH" instruction
                            389 ;; 
                            390 .mdelete ld__e_ixh
                            391 .macro ld__e_ixh
                            392    .dw #0x5CDD  ;; Opcode for ld e, ixh
                            393 .endm
                            394 
                            395 ;; Macro: add__ixh
                            396 ;;    Opcode for "ADD IXH" instruction
                            397 ;; 
                            398 .mdelete add__ixh
                            399 .macro add__ixh
                            400    .dw #0x84DD  ;; Opcode for add ixh
                            401 .endm
                            402 
                            403 ;; Macro: sub__ixh
                            404 ;;    Opcode for "SUB IXH" instruction
                            405 ;; 
                            406 .mdelete sub__ixh
                            407 .macro sub__ixh
                            408    .dw #0x94DD  ;; Opcode for sub ixh
                            409 .endm
                            410 
                            411 ;; Macro: adc__ixh
                            412 ;;    Opcode for "ADC IXH" instruction
                            413 ;; 
                            414 .mdelete adc__ixh
                            415 .macro adc__ixh
                            416    .dw #0x8CDD  ;; Opcode for adc ixh
                            417 .endm
                            418 
                            419 ;; Macro: sbc__ixh
                            420 ;;    Opcode for "SBC IXH" instruction
                            421 ;; 
                            422 .mdelete sbc__ixh
                            423 .macro sbc__ixh
                            424    .dw #0x9CDD  ;; Opcode for sbc ixh
                            425 .endm
                            426 
                            427 ;; Macro: and__ixh
                            428 ;;    Opcode for "AND IXH" instruction
                            429 ;; 
                            430 .mdelete and__ixh
                            431 .macro and__ixh
                            432    .dw #0xA4DD  ;; Opcode for and ixh
                            433 .endm
                            434 
                            435 ;; Macro: or__ixh
                            436 ;;    Opcode for "OR IXH" instruction
                            437 ;; 
                            438 .mdelete or__ixh
                            439 .macro or__ixh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 42.
Hexadecimal [16-Bits]



                            440    .dw #0xB4DD  ;; Opcode for or ixh
                            441 .endm
                            442 
                            443 ;; Macro: xor__ixh
                            444 ;;    Opcode for "XOR IXH" instruction
                            445 ;; 
                            446 .mdelete xor__ixh
                            447 .macro xor__ixh
                            448    .dw #0xACDD  ;; Opcode for xor ixh
                            449 .endm
                            450 
                            451 ;; Macro: cp__ixh
                            452 ;;    Opcode for "CP IXH" instruction
                            453 ;; 
                            454 .mdelete cp__ixh
                            455 .macro cp__ixh
                            456    .dw #0xBCDD  ;; Opcode for cp ixh
                            457 .endm
                            458 
                            459 ;; Macro: dec__ixh
                            460 ;;    Opcode for "DEC IXH" instruction
                            461 ;; 
                            462 .mdelete dec__ixh
                            463 .macro dec__ixh
                            464    .dw #0x25DD  ;; Opcode for dec ixh
                            465 .endm
                            466 
                            467 ;; Macro: inc__ixh
                            468 ;;    Opcode for "INC IXH" instruction
                            469 ;; 
                            470 .mdelete inc__ixh
                            471 .macro inc__ixh
                            472    .dw #0x24DD  ;; Opcode for inc ixh
                            473 .endm
                            474 
                            475 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            476 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            477 ;; IYL Related Macros
                            478 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            479 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            480 
                            481 ;; Macro: ld__iyl    Value
                            482 ;;    Opcode for "LD iyl, Value" instruction
                            483 ;;  
                            484 ;; Parameters:
                            485 ;;    Value - An inmediate 8-bits value that will be loaded into iyl
                            486 ;; 
                            487 .mdelete  ld__iyl
                            488 .macro ld__iyl    Value 
                            489    .db #0xFD, #0x2E, Value  ;; Opcode for ld iyl, Value
                            490 .endm
                            491 
                            492 ;; Macro: ld__iyl_a
                            493 ;;    Opcode for "LD iyl, a" instruction
                            494 ;; 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 43.
Hexadecimal [16-Bits]



                            495 .mdelete ld__iyl_a
                            496 .macro ld__iyl_a
                            497    .dw #0x6FFD  ;; Opcode for ld iyl, a
                            498 .endm
                            499 
                            500 ;; Macro: ld__iyl_b
                            501 ;;    Opcode for "LD iyl, B" instruction
                            502 ;; 
                            503 .mdelete ld__iyl_b
                            504 .macro ld__iyl_b
                            505    .dw #0x68FD  ;; Opcode for ld iyl, b
                            506 .endm
                            507 
                            508 ;; Macro: ld__iyl_c
                            509 ;;    Opcode for "LD iyl, C" instruction
                            510 ;; 
                            511 .mdelete ld__iyl_c
                            512 .macro ld__iyl_c
                            513    .dw #0x69FD  ;; Opcode for ld iyl, c
                            514 .endm
                            515 
                            516 ;; Macro: ld__iyl_d
                            517 ;;    Opcode for "LD iyl, D" instruction
                            518 ;; 
                            519 .mdelete ld__iyl_d
                            520 .macro ld__iyl_d
                            521    .dw #0x6AFD  ;; Opcode for ld iyl, d
                            522 .endm
                            523 
                            524 ;; Macro: ld__iyl_e
                            525 ;;    Opcode for "LD iyl, E" instruction
                            526 ;; 
                            527 .mdelete ld__iyl_e
                            528 .macro ld__iyl_e
                            529    .dw #0x6BFD  ;; Opcode for ld iyl, e
                            530 .endm
                            531 
                            532 ;; Macro: ld__iyl_iyh
                            533 ;;    Opcode for "LD iyl, IXL" instruction
                            534 ;; 
                            535 .mdelete  ld__iyl_iyh
                            536 .macro ld__iyl_iyh
                            537    .dw #0x6CFD  ;; Opcode for ld iyl, ixl
                            538 .endm
                            539 
                            540 ;; Macro: ld__a_iyl
                            541 ;;    Opcode for "LD A, iyl" instruction
                            542 ;; 
                            543 .mdelete ld__a_iyl
                            544 .macro ld__a_iyl
                            545    .dw #0x7DFD  ;; Opcode for ld a, iyl
                            546 .endm
                            547 
                            548 ;; Macro: ld__b_iyl
                            549 ;;    Opcode for "LD B, iyl" instruction
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 44.
Hexadecimal [16-Bits]



                            550 ;; 
                            551 .mdelete ld__b_iyl
                            552 .macro ld__b_iyl
                            553    .dw #0x45FD  ;; Opcode for ld b, iyl
                            554 .endm
                            555 
                            556 ;; Macro: ld__c_iyl
                            557 ;;    Opcode for "LD c, iyl" instruction
                            558 ;; 
                            559 .mdelete ld__c_iyl
                            560 .macro ld__c_iyl
                            561    .dw #0x4DFD  ;; Opcode for ld c, iyl
                            562 .endm
                            563 
                            564 ;; Macro: ld__d_iyl
                            565 ;;    Opcode for "LD D, iyl" instruction
                            566 ;; 
                            567 .mdelete ld__d_iyl
                            568 .macro ld__d_iyl
                            569    .dw #0x55FD  ;; Opcode for ld d, iyl
                            570 .endm
                            571 
                            572 ;; Macro: ld__e_iyl
                            573 ;;    Opcode for "LD e, iyl" instruction
                            574 ;; 
                            575 .mdelete ld__e_iyl
                            576 .macro ld__e_iyl
                            577    .dw #0x5DFD  ;; Opcode for ld e, iyl
                            578 .endm
                            579 
                            580 ;; Macro: add__iyl
                            581 ;;    Opcode for "Add iyl" instruction
                            582 ;; 
                            583 .mdelete add__iyl
                            584 .macro add__iyl
                            585    .dw #0x85FD  ;; Opcode for add iyl
                            586 .endm
                            587 
                            588 ;; Macro: sub__iyl
                            589 ;;    Opcode for "SUB iyl" instruction
                            590 ;; 
                            591 .mdelete sub__iyl
                            592 .macro sub__iyl
                            593    .dw #0x95FD  ;; Opcode for sub iyl
                            594 .endm
                            595 
                            596 ;; Macro: adc__iyl
                            597 ;;    Opcode for "ADC iyl" instruction
                            598 ;; 
                            599 .mdelete adc__iyl
                            600 .macro adc__iyl
                            601    .dw #0x8DFD  ;; Opcode for adc iyl
                            602 .endm
                            603 
                            604 ;; Macro: sbc__iyl
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 45.
Hexadecimal [16-Bits]



                            605 ;;    Opcode for "SBC iyl" instruction
                            606 ;; 
                            607 .mdelete sbc__iyl
                            608 .macro sbc__iyl
                            609    .dw #0x9DFD  ;; Opcode for sbc iyl
                            610 .endm
                            611 
                            612 ;; Macro: and__iyl
                            613 ;;    Opcode for "AND iyl" instruction
                            614 ;; 
                            615 .mdelete and__iyl
                            616 .macro and__iyl
                            617    .dw #0xA5FD  ;; Opcode for and iyl
                            618 .endm
                            619 
                            620 ;; Macro: or__iyl
                            621 ;;    Opcode for "OR iyl" instruction
                            622 ;; 
                            623 .mdelete or__iyl
                            624 .macro or__iyl
                            625    .dw #0xB5FD  ;; Opcode for or iyl
                            626 .endm
                            627 
                            628 ;; Macro: xor__iyl
                            629 ;;    Opcode for "XOR iyl" instruction
                            630 ;; 
                            631 .mdelete xor__iyl
                            632 .macro xor__iyl
                            633    .dw #0xADFD  ;; Opcode for xor iyl
                            634 .endm
                            635 
                            636 ;; Macro: cp__iyl
                            637 ;;    Opcode for "CP iyl" instruction
                            638 ;; 
                            639 .mdelete cp__iyl
                            640 .macro cp__iyl
                            641    .dw #0xBDFD  ;; Opcode for cp iyl
                            642 .endm
                            643 
                            644 ;; Macro: dec__iyl
                            645 ;;    Opcode for "DEC iyl" instruction
                            646 ;; 
                            647 .mdelete dec__iyl
                            648 .macro dec__iyl
                            649    .dw #0x2DFD  ;; Opcode for dec iyl
                            650 .endm
                            651 
                            652 ;; Macro: inc__iyl
                            653 ;;    Opcode for "INC iyl" instruction
                            654 ;; 
                            655 .mdelete inc__iyl
                            656 .macro inc__iyl
                            657    .dw #0x2CFD  ;; Opcode for inc iyl
                            658 .endm
                            659 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 46.
Hexadecimal [16-Bits]



                            660 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            661 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            662 ;; IYH Related Macros
                            663 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            664 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;,
                            665 
                            666 ;; Macro: ld__iyh    Value
                            667 ;;    Opcode for "LD iyh, Value" instruction
                            668 ;;  
                            669 ;; Parameters:
                            670 ;;    Value - An inmediate 8-bits value that will be loaded into iyh
                            671 ;; 
                            672 .mdelete  ld__iyh
                            673 .macro ld__iyh    Value 
                            674    .db #0xFD, #0x26, Value  ;; Opcode for ld iyh, Value
                            675 .endm
                            676 
                            677 ;; Macro: ld__iyh_a
                            678 ;;    Opcode for "LD iyh, a" instruction
                            679 ;; 
                            680 .mdelete ld__iyh_a
                            681 .macro ld__iyh_a
                            682    .dw #0x67FD  ;; Opcode for ld iyh, a
                            683 .endm
                            684 
                            685 ;; Macro: ld__iyh_b
                            686 ;;    Opcode for "LD iyh, B" instruction
                            687 ;; 
                            688 .mdelete ld__iyh_b
                            689 .macro ld__iyh_b
                            690    .dw #0x60FD  ;; Opcode for ld iyh, b
                            691 .endm
                            692 
                            693 ;; Macro: ld__iyh_c
                            694 ;;    Opcode for "LD iyh, C" instruction
                            695 ;; 
                            696 .mdelete ld__iyh_c
                            697 .macro ld__iyh_c
                            698    .dw #0x61FD  ;; Opcode for ld iyh, c
                            699 .endm
                            700 
                            701 ;; Macro: ld__iyh_d
                            702 ;;    Opcode for "LD iyh, D" instruction
                            703 ;; 
                            704 .mdelete ld__iyh_d
                            705 .macro ld__iyh_d
                            706    .dw #0x62FD  ;; Opcode for ld iyh, d
                            707 .endm
                            708 
                            709 ;; Macro: ld__iyh_e
                            710 ;;    Opcode for "LD iyh, E" instruction
                            711 ;; 
                            712 .mdelete ld__iyh_e
                            713 .macro ld__iyh_e
                            714    .dw #0x63FD  ;; Opcode for ld iyh, e
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 47.
Hexadecimal [16-Bits]



                            715 .endm
                            716 
                            717 ;; Macro: ld__iyh_iyl
                            718 ;;    Opcode for "LD iyh, IyL" instruction
                            719 ;; 
                            720 .mdelete  ld__iyh_iyl
                            721 .macro ld__iyh_iyl
                            722    .dw #0x65FD  ;; Opcode for ld iyh, iyl
                            723 .endm
                            724 
                            725 ;; Macro: ld__a_iyh
                            726 ;;    Opcode for "LD A, iyh" instruction
                            727 ;; 
                            728 .mdelete ld__a_iyh
                            729 .macro ld__a_iyh
                            730    .dw #0x7CFD  ;; Opcode for ld a, iyh
                            731 .endm
                            732 
                            733 ;; Macro: ld__b_iyh
                            734 ;;    Opcode for "LD B, iyh" instruction
                            735 ;; 
                            736 .mdelete ld__b_iyh
                            737 .macro ld__b_iyh
                            738    .dw #0x44FD  ;; Opcode for ld b, iyh
                            739 .endm
                            740 
                            741 ;; Macro: ld__c_iyh
                            742 ;;    Opcode for "LD c, iyh" instruction
                            743 ;; 
                            744 .mdelete ld__c_iyh
                            745 .macro ld__c_iyh
                            746    .dw #0x4CFD  ;; Opcode for ld c, iyh
                            747 .endm
                            748 
                            749 ;; Macro: ld__d_iyh
                            750 ;;    Opcode for "LD D, iyh" instruction
                            751 ;; 
                            752 .mdelete ld__d_iyh
                            753 .macro ld__d_iyh
                            754    .dw #0x54FD  ;; Opcode for ld d, iyh
                            755 .endm
                            756 
                            757 ;; Macro: ld__e_iyh
                            758 ;;    Opcode for "LD e, iyh" instruction
                            759 ;; 
                            760 .mdelete ld__e_iyh
                            761 .macro ld__e_iyh
                            762    .dw #0x5CFD  ;; Opcode for ld e, iyh
                            763 .endm
                            764 
                            765 ;; Macro: add__iyh
                            766 ;;    Opcode for "Add iyh" instruction
                            767 ;; 
                            768 .mdelete add__iyh
                            769 .macro add__iyh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 48.
Hexadecimal [16-Bits]



                            770    .dw #0x84FD  ;; Opcode for add iyh
                            771 .endm
                            772 
                            773 ;; Macro: sub__iyh
                            774 ;;    Opcode for "SUB iyh" instruction
                            775 ;; 
                            776 .mdelete sub__iyh
                            777 .macro sub__iyh
                            778    .dw #0x94FD  ;; Opcode for sub iyh
                            779 .endm
                            780 
                            781 ;; Macro: adc__iyh
                            782 ;;    Opcode for "ADC iyh" instruction
                            783 ;; 
                            784 .mdelete adc__iyh
                            785 .macro adc__iyh
                            786    .dw #0x8CFD  ;; Opcode for adc iyh
                            787 .endm
                            788 
                            789 ;; Macro: sbc__iyh
                            790 ;;    Opcode for "SBC iyh" instruction
                            791 ;; 
                            792 .mdelete sbc__iyh
                            793 .macro sbc__iyh
                            794    .dw #0x9CFD  ;; Opcode for sbc iyh
                            795 .endm
                            796 
                            797 ;; Macro: and__iyh
                            798 ;;    Opcode for "AND iyh" instruction
                            799 ;; 
                            800 .mdelete and__iyh
                            801 .macro and__iyh
                            802    .dw #0xA4FD  ;; Opcode for and iyh
                            803 .endm
                            804 
                            805 ;; Macro: or__iyh
                            806 ;;    Opcode for "OR iyh" instruction
                            807 ;; 
                            808 .mdelete or__iyh
                            809 .macro or__iyh
                            810    .dw #0xB4FD  ;; Opcode for or iyh
                            811 .endm
                            812 
                            813 ;; Macro: xor__iyh
                            814 ;;    Opcode for "XOR iyh" instruction
                            815 ;; 
                            816 .mdelete xor__iyh
                            817 .macro xor__iyh
                            818    .dw #0xACFD  ;; Opcode for xor iyh
                            819 .endm
                            820 
                            821 ;; Macro: cp__iyh
                            822 ;;    Opcode for "CP iyh" instruction
                            823 ;; 
                            824 .mdelete cp__iyh
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 49.
Hexadecimal [16-Bits]



                            825 .macro cp__iyh
                            826    .dw #0xBCFD  ;; Opcode for cp iyh
                            827 .endm
                            828 
                            829 ;; Macro: dec__iyh
                            830 ;;    Opcode for "DEC iyh" instruction
                            831 ;; 
                            832 .mdelete dec__iyh
                            833 .macro dec__iyh
                            834    .dw #0x25FD  ;; Opcode for dec iyh
                            835 .endm
                            836 
                            837 ;; Macro: inc__iyh
                            838 ;;    Opcode for "INC iyh" instruction
                            839 ;; 
                            840 .mdelete inc__iyh
                            841 .macro inc__iyh
                            842    .dw #0x24FD  ;; Opcode for inc iyh
                            843 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 50.
Hexadecimal [16-Bits]



                             27 
                             28 ;; Macro: ld__hl_de
                             29 ;;    Copy DE to HL, using 2 instructions
                             30 ;; COST: 2 us (8 CPU Cycles)
                             31 ;; 
                             32 .macro ld__hl_de
                             33    ;; LD HL, DE
                             34    ;;------------
                             35    ld h, d
                             36    ld l, e
                             37    ;;------------
                             38 .endm
                             39 
                             40 ;; Macro: ld__de_hl
                             41 ;;    Copy HL to DE, using 2 instructions (ld d, h : ld e, l)
                             42 ;; COST: 2 us (8 CPU Cycles)
                             43 ;; 
                             44 .macro ld__de_hl
                             45    ;; LD DE, HL
                             46    ;;------------
                             47    ld d, h
                             48    ld e, l
                             49    ;;------------
                             50 .endm
                             51 
                             52 ;; Macro: ld__de_ix
                             53 ;;    Copy IX to DE, using 2 instructions (ld e, ixl : ld d, ixh)
                             54 ;; COST: 4 us (16 CPU Cycles)
                             55 ;; 
                             56 .macro ld__de_ix
                             57    ;; LD DE, IX
                             58    ;;------------
                             59    ld__e_ixl
                             60    ld__d_ixh
                             61    ;;------------
                             62 .endm
                             63 
                             64 ;; Macro: ld__bc_ix
                             65 ;;    Copy IX to BC, using 2 instructions (ld c, ixl : ld b, ixh)
                             66 ;; COST: 4 us (16 CPU Cycles)
                             67 ;; 
                             68 .macro ld__bc_ix
                             69    ;; LD BC, IX
                             70    ;;------------
                             71    ld__c_ixl
                             72    ld__b_ixh
                             73    ;;------------
                             74 .endm
                             75 
                             76 ;; Macro: ld__hl_ix
                             77 ;;    Copy IX to HL, using 4 instructions. 
                             78 ;;    Modifies A Register
                             79 ;; COST: 6 us (24 CPU Cycles)
                             80 ;; 
                             81 .macro ld__hl_ix
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 51.
Hexadecimal [16-Bits]



                             82    ;; LD HL, IX
                             83    ;;------------
                             84    ld__a_ixl
                             85    ld  l, a
                             86    ld__a_ixh
                             87    ld  h, a
                             88    ;;------------
                             89 .endm
                             90 
                             91 ;; Macro: ld__ix_de
                             92 ;;    Copy DE to IX, using 2 instructions (ld ixl, e : ld ixh, d)
                             93 ;; COST: 4 us (16 CPU Cycles)
                             94 ;; 
                             95 .macro ld__ix_de
                             96    ;; LD IX, DE
                             97    ;;------------
                             98    ld__ixl_e
                             99    ld__ixh_d
                            100    ;;------------
                            101 .endm
                            102 
                            103 ;; Macro: ld__ix_bc
                            104 ;;    Copy BX to IX, using 2 instructions (ld ixl, c : ld ixh, b)
                            105 ;; COST: 4 us (16 CPU Cycles)
                            106 ;; 
                            107 .macro ld__ix_bc
                            108    ;; LD IX, BC
                            109    ;;------------
                            110    ld__ixl_c
                            111    ld__ixh_b
                            112    ;;------------
                            113 .endm
                            114 
                            115 ;; Macro: ld__ix_hl
                            116 ;;    Copy HL to IX, using 4 instructions. 
                            117 ;;    Modifies A Register
                            118 ;; COST: 6 us (24 CPU Cycles)
                            119 ;; 
                            120 .macro ld__ix_hl
                            121    ;; LD IX, HL
                            122    ;;------------
                            123    ld  a, l
                            124    ld__ixl_a
                            125    ld  a, h
                            126    ld__ixh_a
                            127    ;;------------
                            128 .endm
                            129 
                            130 ;; Macro: ld__de_iy
                            131 ;;    Copy IY to DE, using 2 instructions (ld e, iyl : ld d, iyh)
                            132 ;; COST: 4 us (16 CPU Cycles)
                            133 ;; 
                            134 .macro ld__de_iy
                            135    ;; LD DE, IY
                            136    ;;------------
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 52.
Hexadecimal [16-Bits]



                            137    ld__e_iyl
                            138    ld__d_iyh
                            139    ;;------------
                            140 .endm
                            141 
                            142 ;; Macro: ld__bc_iy
                            143 ;;    Copy IY to BC, using 2 instructions (ld c, iyl : ld b, iyh)
                            144 ;; COST: 4 us (16 CPU Cycles)
                            145 ;; 
                            146 .macro ld__bc_iy
                            147    ;; LD BC, IY
                            148    ;;------------
                            149    ld__c_iyl
                            150    ld__b_iyh
                            151    ;;------------
                            152 .endm
                            153 
                            154 ;; Macro: ld__hl_iy
                            155 ;;    Copy IY to HL, using 4 instructions. 
                            156 ;;    Modifies A Register
                            157 ;; COST: 6 us (24 CPU Cycles)
                            158 ;; 
                            159 .macro ld__hl_iy
                            160    ;; LD HL, IY
                            161    ;;------------
                            162    ld__a_iyl
                            163    ld  l, a
                            164    ld__a_iyh
                            165    ld  h, a
                            166    ;;------------
                            167 .endm
                            168 
                            169 ;; Macro: ld__iy_de
                            170 ;;    Copy DE to IY, using 2 instructions (ld iyl, e : ld iyh, d)
                            171 ;; COST: 4 us (16 CPU Cycles)
                            172 ;; 
                            173 .macro ld__iy_de
                            174    ;; LD IY, DE
                            175    ;;------------
                            176    ld__iyl_e
                            177    ld__iyh_d
                            178    ;;------------
                            179 .endm
                            180 
                            181 ;; Macro: ld__iy_bc
                            182 ;;    Copy BX to IY, using 2 instructions (ld iyl, c : ld iyh, b)
                            183 ;; COST: 4 us (16 CPU Cycles)
                            184 ;; 
                            185 .macro ld__iy_bc
                            186    ;; LD IY, BC
                            187    ;;------------
                            188    ld__iyl_c
                            189    ld__iyh_b
                            190    ;;------------
                            191 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 53.
Hexadecimal [16-Bits]



                            192 
                            193 ;; Macro: ld__iy_hl
                            194 ;;    Copy HL to IY, using 4 instructions. 
                            195 ;;    Modifies A Register
                            196 ;; COST: 6 us (24 CPU Cycles)
                            197 ;; 
                            198 .macro ld__iy_hl
                            199    ;; LD IY, HL
                            200    ;;------------
                            201    ld  a, l
                            202    ld__iyl_a
                            203    ld  a, h
                            204    ld__iyh_a
                            205    ;;------------
                            206 .endm
                            207 
                            208 ;; Macro: ld__ix_iy
                            209 ;;    Copy IY to IX, using 4 instructions. 
                            210 ;;    Modifies A Register
                            211 ;; Cost: 8 us (32 CPU Cycles)
                            212 ;; 
                            213 .macro ld__ix_iy
                            214    ;; LD IX, IY
                            215    ;;------------
                            216    ld__a_iyl
                            217    ld__ixl_a
                            218    ld__a_iyh
                            219    ld__ixh_a
                            220    ;;------------
                            221 .endm
                            222 
                            223 ;; Macro: ld__iy_ix
                            224 ;;    Copy IX to IY, using 4 instructions. 
                            225 ;;    Modifies A Register
                            226 ;; Cost: 8 us (32 CPU Cycles)
                            227 ;; 
                            228 .macro ld__iy_ix
                            229    ;; LD IY, IX
                            230    ;;------------
                            231    ld__a_ixl
                            232    ld__iyl_a
                            233    ld__a_ixh
                            234    ld__iyh_a
                            235    ;;------------
                            236 .endm
                            237 
                            238 ;; Macro: ex__de_ix
                            239 ;;    Swap DE with IX
                            240 ;;    Modifies A Register
                            241 ;; Cost: 10 us (40 CPU Cycles)
                            242 ;; 
                            243 .macro ex__de_ix
                            244    ;; EX DE, IX
                            245    ;;------------
                            246    ld a, e
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 54.
Hexadecimal [16-Bits]



                            247    ld__e_ixl
                            248    ld__ixl_a
                            249    ld a, d
                            250    ld__d_ixh
                            251    ld__ixh_a
                            252    ;;------------
                            253 .endm
                            254 
                            255 ;; Macro: ex__bc_ix
                            256 ;;    Swap BC with IX
                            257 ;;    Modifies A Register
                            258 ;; Cost: 10 us (40 CPU Cycles)
                            259 ;; 
                            260 .macro ex__bc_ix
                            261    ;; EX BC, IX
                            262    ;;------------
                            263    ld a, c
                            264    ld__c_ixl
                            265    ld__ixl_a
                            266    ld a, b
                            267    ld__b_ixh
                            268    ld__ixh_a
                            269    ;;------------
                            270 .endm
                            271 
                            272 ;; Macro: ex__hl_ix
                            273 ;;    Swap HL with IX
                            274 ;;    Uses 2 bytes on the stack for the swap
                            275 ;;    Modifies A register
                            276 ;; Cost: 15 us (60 CPU Cycles)
                            277 ;; 
                            278 .macro ex__hl_ix
                            279    ;; EX HL, IX
                            280    ;;------------
                            281    push  hl
                            282    ld__a_ixl
                            283    ld l, a
                            284    ld__a_ixh
                            285    ld h, a
                            286    pop   ix
                            287    ;;------------
                            288 .endm
                            289 
                            290 ;; Macro: ex__de_iy
                            291 ;;    Swap DE with IY
                            292 ;;    Modifies A Register
                            293 ;; Cost: 10 us (40 CPU Cycles)
                            294 ;; 
                            295 .macro ex__de_iy
                            296    ;; EX DE, IY
                            297    ;;------------
                            298    ld a, e
                            299    ld__e_iyl
                            300    ld__iyl_a
                            301    ld a, d
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 55.
Hexadecimal [16-Bits]



                            302    ld__d_iyh
                            303    ld__iyh_a
                            304    ;;------------
                            305 .endm
                            306 
                            307 ;; Macro: ex__bc_iy
                            308 ;;    Swap BC with IY
                            309 ;;    Modifies A Register
                            310 ;; Cost: 10 us (40 CPU Cycles)
                            311 ;; 
                            312 .macro ex__bc_iy
                            313    ;; EX BC, IY
                            314    ;;------------
                            315    ld a, c
                            316    ld__c_iyl
                            317    ld__iyl_a
                            318    ld a, b
                            319    ld__b_iyh
                            320    ld__iyh_a
                            321    ;;------------
                            322 .endm
                            323 
                            324 ;; Macro: ex__hl_iy
                            325 ;;    Swap HL with IY
                            326 ;;    Uses 2 bytes on the stack for the swap
                            327 ;;    Modifies A register
                            328 ;; Cost: 15 us (60 CPU Cycles)
                            329 ;; 
                            330 .macro ex__hl_iy
                            331    ;; EX HL, IY
                            332    ;;------------
                            333    push  hl
                            334    ld__a_iyl
                            335    ld l, a
                            336    ld__a_iyh
                            337    ld h, a
                            338    pop   iy
                            339    ;;------------
                            340 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 56.
Hexadecimal [16-Bits]



                             24 .include "macros/cpct_pushpop.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2020 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: Push - Pop Macros
                             21 ;;
                             22 ;;    Useful macros to simplify push-pop save/restore operations
                             23 ;;
                             24 
                             25 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             26 ;; Macro: cpctm_push RO, R1, R2, R3, R4, R5
                             27 ;;
                             28 ;;    Pushes any given registers (up to 6) into the stack
                             29 ;;
                             30 ;; ASM Definition:
                             31 ;;    .macro <cpctm_push> R0, R1, R2, R3, R4, R5
                             32 ;;
                             33 ;; Parameters:
                             34 ;;    R0-R5 - Any number of 16-bit pushable registers, up to 6
                             35 ;;
                             36 ;; Details:
                             37 ;;    This macro converts the list of 16-bit registers given as parameters into a list
                             38 ;; of 'push' operations to push all of them into the stack. The registers are pushed
                             39 ;; into the stack in the same order as they are given in the parameter list.
                             40 ;;    The macro accepts any number of registers up to the maximum of 6 that are 
                             41 ;; predefined as parameters. However, you may use it with 1, 2, 3, 4 or 5 registers
                             42 ;; as parameters. There is no need to give the 6 parameters: only those given will 
                             43 ;; be considered.
                             44 ;;
                             45 ;; Modified Registers: 
                             46 ;;    none
                             47 ;;
                             48 ;; Required memory:
                             49 ;;    1 byte per register given (2 if they are IX or IY)
                             50 ;;
                             51 ;; Time Measures:
                             52 ;; (start code)
                             53 ;;  Case     | microSecs(us) | CPU Cycles
                             54 ;; ------------------------------------
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 57.
Hexadecimal [16-Bits]



                             55 ;;  Per Reg  |       4       |     16
                             56 ;; ------------------------------------
                             57 ;;  Per IX/IY|       5       |     20
                             58 ;; ------------------------------------
                             59 ;; (end code)
                             60 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             61 .macro cpctm_push r0, r1, r2, r3, r4, r5
                             62    .narg v
                             63    .if v
                             64    push r0
                             65    .if v-1
                             66    push r1
                             67    .if v-2
                             68    push r2
                             69    .if v-3
                             70    push r3
                             71    .if v-4
                             72    push r4
                             73    .if v-5
                             74    push r5
                             75    .else
                             76    .mexit
                             77    .endif
                             78    .else
                             79    .mexit
                             80    .endif
                             81    .else
                             82    .mexit
                             83    .endif
                             84    .else
                             85    .mexit
                             86    .endif
                             87    .else
                             88    .mexit
                             89    .endif
                             90    .else
                             91    .mexit
                             92    .endif
                             93 .endm
                             94 
                             95 
                             96 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             97 ;; Macro: cpctm_pop RO, R1, R2, R3, R4, R5
                             98 ;;
                             99 ;;    Pops any given registers (up to 6) from the stack
                            100 ;;
                            101 ;; ASM Definition:
                            102 ;;    .macro <cpctm_pop> R0, R1, R2, R3, R4, R5
                            103 ;;
                            104 ;; Parameters:
                            105 ;;    R0-R5 - Any number of 16-bit pushable/popable registers, up to 6
                            106 ;;
                            107 ;; Details:
                            108 ;;    This macro converts the list of 16-bit registers given as parameters into a list
                            109 ;; of 'pop' operations to pop all of them from the stack. The registers are poped
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 58.
Hexadecimal [16-Bits]



                            110 ;; in the same order as they are given in the parameter list.
                            111 ;;    The macro accepts any number of registers up to the maximum of 6 that are 
                            112 ;; predefined as parameters. However, you may use it with 1, 2, 3, 4 or 5 registers
                            113 ;; as parameters. There is no need to give the 6 parameters: only those given will 
                            114 ;; be considered.
                            115 ;;
                            116 ;; Modified Registers: 
                            117 ;;    R0, R1, R2, R3, R4, R5 (Those given as parameters are loaded from the stack)
                            118 ;;
                            119 ;; Required memory:
                            120 ;;    1 byte per register given (2 if they are IX or IY)
                            121 ;;
                            122 ;; Time Measures:
                            123 ;; (start code)
                            124 ;;  Case     | microSecs(us) | CPU Cycles
                            125 ;; ------------------------------------
                            126 ;;  Per Reg  |       3       |     12
                            127 ;; ------------------------------------
                            128 ;;  Per IX/IY|       5       |     20
                            129 ;; ------------------------------------
                            130 ;; (end code)
                            131 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                            132 .macro cpctm_pop r0, r1, r2, r3, r4, r5
                            133    .narg v
                            134    .if v
                            135    pop r0
                            136    .if v-1
                            137    pop r1
                            138    .if v-2
                            139    pop r2
                            140    .if v-3
                            141    pop r3
                            142    .if v-4
                            143    pop r4
                            144    .if v-5
                            145    pop r5
                            146    .else
                            147    .mexit
                            148    .endif
                            149    .else
                            150    .mexit
                            151    .endif
                            152    .else
                            153    .mexit
                            154    .endif
                            155    .else
                            156    .mexit
                            157    .endif
                            158    .else
                            159    .mexit
                            160    .endif
                            161    .else
                            162    .mexit
                            163    .endif
                            164 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 59.
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                             25 .include "macros/cpct_luts.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2018 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;
                             20 ;; File: LUTs (Look-Up-Tables)
                             21 ;;
                             22 ;;    Useful macros for accessing and managing Look-Up-Tables
                             23 ;;
                             24 
                             25 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             26 ;; Macro: cpctm_lutget8
                             27 ;;
                             28 ;;    Gets a value from a 256-byte-max 8-bit table into A register
                             29 ;;
                             30 ;; Parameters:
                             31 ;;    Table         - Memory address where the 256-byte-max table starts. It can be 
                             32 ;;  either an hexadecimal, decimal or octal address, or a symbol (the table name).
                             33 ;;    TR1           - An 8-bits register from the set {B, D, H}
                             34 ;;    TR2           - An 8-bits register from the set {C, E, L}. This register must
                             35 ;;  match TR1 to form a valid 16-bits register (BC, DE or HL), as the register TR1'TR2
                             36 ;;  will be loaded with the address of the table, to be the base pointer.
                             37 ;; 
                             38 ;; Input Registers: 
                             39 ;;    A     - Index in the LUT to be accessed.
                             40 ;;
                             41 ;; Return Value:
                             42 ;;    A     - Value got from the LUT ( table[TR1'TR2 + A] )
                             43 ;;
                             44 ;; Details:
                             45 ;;    This macro gets a value from a table into the A register. The process is simple:
                             46 ;;
                             47 ;;    1. It loads the address of the table in the 16-bits register TR1'TR2
                             48 ;;    2. It adds the index (A) to TR1'TR2  (TR1'TR2 += A)
                             49 ;;    3. It loads into A register the byte pointed by TR1'TR2
                             50 ;;
                             51 ;; Modified Registers: 
                             52 ;;    AF, TR1, TR2
                             53 ;;
                             54 ;; Required memory:
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 60.
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                             55 ;;    9 bytes
                             56 ;;
                             57 ;; Time Measures:
                             58 ;; (start code)
                             59 ;;  Case | microSecs(us) | CPU Cycles
                             60 ;; ------------------------------------
                             61 ;;  Any  |      10       |     40
                             62 ;; ------------------------------------
                             63 ;; (end code)
                             64 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
                             65 
                             66 .macro cpctm_lutget8 Table, TR1, TR2
                             67     ld   TR1'TR2, #Table   ;; [3] TR1_TR2 points to the LUT
                             68     
                             69     ;; Compute TR1'TR2 += A
                             70     add  TR2               ;; [1] | TR2 += A
                             71     ld   TR2, a            ;; [1] |
                             72     sub  a                 ;; [1] A = 0 (preserving Carry Flag)
                             73     adc  TR1               ;; [1] | TR1 += Carry
                             74     ld   TR1, a            ;; [1] |
                             75 
                             76     ;; A = *(TR1_TR2 + A)
                             77     ld   a, (TR1'TR2)      ;; [2] A = Value stored at given index from the LUT 
                             78 .endm
                             79 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 61.
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                             26 
                             27 ;;//////////////////////////////////////////////////////////////////////
                             28 ;; Group: General Useful Macros
                             29 ;;//////////////////////////////////////////////////////////////////////
                             30 
                             31 ;;
                             32 ;; Macro: cpctm_produceHalts_asm
                             33 ;;
                             34 ;;   Produce a set of consecutive halt instructions in order to wait for 
                             35 ;; a given number of interrupts.
                             36 ;;
                             37 ;; C Definition:
                             38 ;;   .macro <cpctm_produceHalts_asm> *N*
                             39 ;;
                             40 ;; Input Parameters:
                             41 ;;   (_) N - Number of consecutive halts to be produced
                             42 ;;
                             43 ;; Known issues:
                             44 ;;    * *N* must be a constant expression that can evaluate to a number
                             45 ;; at compile time.
                             46 ;;    * If the code generated by this macro is executed with interrupts
                             47 ;; being disabled, your CPU will effectively hang forever.
                             48 ;;    * This macro can only be used from assembler code. For C callings
                             49 ;; use <cpctm_produceHalts> instead.
                             50 ;;
                             51 ;; Size of generated code:
                             52 ;;    * *N* bytes (1 byte each halt instruction produced)
                             53 ;;
                             54 ;; Time Measures:
                             55 ;;    * Time depends on the exact moment of execution and the status of
                             56 ;; interrupts. *N* interrupts will pass.
                             57 ;;
                             58 ;; Details:
                             59 ;;    This macro produces a set of *N* consecutive *halt* assembly 
                             60 ;; instructions. Each *halt* instruction stops de Z80 CPU until 
                             61 ;; an interrupt is received. Therefore, this waits for *N* interrupts
                             62 ;; to be produced. This can be used for waiting or synchronization 
                             63 ;; purposes.
                             64 ;;
                             65 ;;    Please, take into account that this is a macro, and not a function.
                             66 ;; Each time this macro is used in your code it will produce the requested
                             67 ;; amount of halts. That can produce more code than you effectively need.
                             68 ;; For a unique function that controls a loop of *halt* waiting use
                             69 ;; <cpct_waitHalts> instead.
                             70 ;;
                             71 ;;
                             72 .mdelete cpctm_produceHalts
                             73 .macro cpctm_produceHalts N
                             74    .rept N
                             75       halt
                             76    .endm
                             77 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 62.
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                             21 .include "keyboard/keyboard.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 .module cpct_keyboard
                             19 
                             20 ;;
                             21 ;; Constant: Key Definitions (asm)
                             22 ;;
                             23 ;;    Definitions of the KeyCodes required by <cpct_isKeyPressed> 
                             24 ;; function for assembler programs. These are 16-bit values that define 
                             25 ;; matrix line in the keyboard layout (Most Significant Byte) and bit to
                             26 ;; be tested in that matrix line status for the given key (Least Significant
                             27 ;; byte). Each matrix line in the keyboard returns a byte containing the
                             28 ;; status of 8 keys, 1 bit each.
                             29 ;;
                             30 ;; CPCtelera include file:
                             31 ;;    _keyboard/keyboard.h.s_
                             32 ;;
                             33 ;; Keycode constant names:
                             34 ;; (start code)
                             35 ;;  KeyCode | Constant        || KeyCode | Constant      || KeyCode |  Constant
                             36 ;; -------------------------------------------------------------------------------
                             37 ;;   0x0100 | Key_CursorUp    ||  0x0803 | Key_P         ||  0x4006 |  Key_B
                             38 ;;          |                 ||         |               ||     ''  |  Joy1_Fire3
                             39 ;;   0x0200 | Key_CursorRight ||  0x1003 | Key_SemiColon ||  0x8006 |  Key_V
                             40 ;;   0x0400 | Key_CursorDown  ||  0x2003 | Key_Colon     ||  0x0107 |  Key_4
                             41 ;;   0x0800 | Key_F9          ||  0x4003 | Key_Slash     ||  0x0207 |  Key_3
                             42 ;;   0x1000 | Key_F6          ||  0x8003 | Key_Dot       ||  0x0407 |  Key_E
                             43 ;;   0x2000 | Key_F3          ||  0x0104 | Key_0         ||  0x0807 |  Key_W
                             44 ;;   0x4000 | Key_Enter       ||  0x0204 | Key_9         ||  0x1007 |  Key_S
                             45 ;;   0x8000 | Key_FDot        ||  0x0404 | Key_O         ||  0x2007 |  Key_D
                             46 ;;   0x0101 | Key_CursorLeft  ||  0x0804 | Key_I         ||  0x4007 |  Key_C
                             47 ;;   0x0201 | Key_Copy        ||  0x1004 | Key_L         ||  0x8007 |  Key_X
                             48 ;;   0x0401 | Key_F7          ||  0x2004 | Key_K         ||  0x0108 |  Key_1
                             49 ;;   0x0801 | Key_F8          ||  0x4004 | Key_M         ||  0x0208 |  Key_2
                             50 ;;   0x1001 | Key_F5          ||  0x8004 | Key_Comma     ||  0x0408 |  Key_Esc
                             51 ;;   0x2001 | Key_F1          ||  0x0105 | Key_8         ||  0x0808 |  Key_Q
                             52 ;;   0x4001 | Key_F2          ||  0x0205 | Key_7         ||  0x1008 |  Key_Tab
                             53 ;;   0x8001 | Key_F0          ||  0x0405 | Key_U         ||  0x2008 |  Key_A
                             54 ;;   0x0102 | Key_Clr         ||  0x0805 | Key_Y         ||  0x4008 |  Key_CapsLock
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 63.
Hexadecimal [16-Bits]



                             55 ;;   0x0202 | Key_OpenBracket ||  0x1005 | Key_H         ||  0x8008 |  Key_Z
                             56 ;;   0x0402 | Key_Return      ||  0x2005 | Key_J         ||  0x0109 |  Joy0_Up
                             57 ;;   0x0802 | Key_CloseBracket||  0x4005 | Key_N         ||  0x0209 |  Joy0_Down
                             58 ;;   0x1002 | Key_F4          ||  0x8005 | Key_Space     ||  0x0409 |  Joy0_Left
                             59 ;;   0x2002 | Key_Shift       ||  0x0106 | Key_6         ||  0x0809 |  Joy0_Right
                             60 ;;          |                 ||     ''  | Joy1_Up       ||         |
                             61 ;;   0x4002 | Key_BackSlash   ||  0x0206 | Key_5         ||  0x1009 |  Joy0_Fire1
                             62 ;;          |                 ||     ''  | Joy1_Down     ||         |
                             63 ;;   0x8002 | Key_Control     ||  0x0406 | Key_R         ||  0x2009 |  Joy0_Fire2
                             64 ;;          |                 ||     ''  | Joy1_Left     ||         |
                             65 ;;   0x0103 | Key_Caret       ||  0x0806 | Key_T         ||  0x4009 |  Joy0_Fire3
                             66 ;;          |                 ||     ''  | Joy1 Right    ||
                             67 ;;   0x0203 | Key_Hyphen      ||  0x1006 | Key_G         ||  0x8009 |  Key_Del
                             68 ;;          |                 ||     ''  | Joy1_Fire1    ||
                             69 ;;   0x0403 | Key_At          ||  0x2006 | Key_F         ||
                             70 ;;          |                 ||     ''  | Joy1_Fire2    ||
                             71 ;; -------------------------------------------------------------------------------
                             72 ;;  Table 1. KeyCodes defined for each possible key, ordered by KeyCode
                             73 ;; (end)
                             74 ;;
                             75 
                             76 ;; Matrix Line 0x00
                     0100    77 Key_CursorUp     = #0x0100  ;; Bit 0 (01h) => | 0000 0001 |
                     0200    78 Key_CursorRight  = #0x0200  ;; Bit 1 (02h) => | 0000 0010 |
                     0400    79 Key_CursorDown   = #0x0400  ;; Bit 2 (04h) => | 0000 0100 |
                     0800    80 Key_F9           = #0x0800  ;; Bit 3 (08h) => | 0000 1000 |
                     1000    81 Key_F6           = #0x1000  ;; Bit 4 (10h) => | 0001 0000 |
                     2000    82 Key_F3           = #0x2000  ;; Bit 5 (20h) => | 0010 0000 |
                     4000    83 Key_Enter        = #0x4000  ;; Bit 6 (40h) => | 0100 0000 |
                     8000    84 Key_FDot         = #0x8000  ;; Bit 7 (80h) => | 1000 0000 |
                             85 ;; Matrix Line 0x01
                     0101    86 Key_CursorLeft   = #0x0101
                     0201    87 Key_Copy         = #0x0201
                     0401    88 Key_F7           = #0x0401
                     0801    89 Key_F8           = #0x0801
                     1001    90 Key_F5           = #0x1001
                     2001    91 Key_F1           = #0x2001
                     4001    92 Key_F2           = #0x4001
                     8001    93 Key_F0           = #0x8001
                             94 ;; Matrix Line 0x02
                     0102    95 Key_Clr          = #0x0102
                     0202    96 Key_OpenBracket  = #0x0202
                     0402    97 Key_Return       = #0x0402
                     0802    98 Key_CloseBracket = #0x0802
                     1002    99 Key_F4           = #0x1002
                     2002   100 Key_Shift        = #0x2002
                     4002   101 Key_BackSlash    = #0x4002
                     8002   102 Key_Control      = #0x8002
                            103 ;; Matrix Line 0x03
                     0103   104 Key_Caret        = #0x0103
                     0203   105 Key_Hyphen       = #0x0203
                     0403   106 Key_At           = #0x0403
                     0803   107 Key_P            = #0x0803
                     1003   108 Key_SemiColon    = #0x1003
                     2003   109 Key_Colon        = #0x2003
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 64.
Hexadecimal [16-Bits]



                     4003   110 Key_Slash        = #0x4003
                     8003   111 Key_Dot          = #0x8003
                            112 ;; Matrix Line 0x04
                     0104   113 Key_0            = #0x0104
                     0204   114 Key_9            = #0x0204
                     0404   115 Key_O            = #0x0404
                     0804   116 Key_I            = #0x0804
                     1004   117 Key_L            = #0x1004
                     2004   118 Key_K            = #0x2004
                     4004   119 Key_M            = #0x4004
                     8004   120 Key_Comma        = #0x8004
                            121 ;; Matrix Line 0x05
                     0105   122 Key_8            = #0x0105
                     0205   123 Key_7            = #0x0205
                     0405   124 Key_U            = #0x0405
                     0805   125 Key_Y            = #0x0805
                     1005   126 Key_H            = #0x1005
                     2005   127 Key_J            = #0x2005
                     4005   128 Key_N            = #0x4005
                     8005   129 Key_Space        = #0x8005
                            130 ;; Matrix Line 0x06
                     0106   131 Key_6            = #0x0106
                     0106   132 Joy1_Up          = #0x0106
                     0206   133 Key_5            = #0x0206
                     0206   134 Joy1_Down        = #0x0206
                     0406   135 Key_R            = #0x0406
                     0406   136 Joy1_Left        = #0x0406
                     0806   137 Key_T            = #0x0806
                     0806   138 Joy1_Right       = #0x0806
                     1006   139 Key_G            = #0x1006
                     1006   140 Joy1_Fire1       = #0x1006
                     2006   141 Key_F            = #0x2006
                     2006   142 Joy1_Fire2       = #0x2006
                     4006   143 Key_B            = #0x4006
                     4006   144 Joy1_Fire3       = #0x4006
                     8006   145 Key_V            = #0x8006
                            146 ;; Matrix Line 0x07
                     0107   147 Key_4            = #0x0107
                     0207   148 Key_3            = #0x0207
                     0407   149 Key_E            = #0x0407
                     0807   150 Key_W            = #0x0807
                     1007   151 Key_S            = #0x1007
                     2007   152 Key_D            = #0x2007
                     4007   153 Key_C            = #0x4007
                     8007   154 Key_X            = #0x8007
                            155 ;; Matrix Line 0x08
                     0108   156 Key_1            = #0x0108
                     0208   157 Key_2            = #0x0208
                     0408   158 Key_Esc          = #0x0408
                     0808   159 Key_Q            = #0x0808
                     1008   160 Key_Tab          = #0x1008
                     2008   161 Key_A            = #0x2008
                     4008   162 Key_CapsLock     = #0x4008
                     8008   163 Key_Z            = #0x8008
                            164 ;; Matrix Line 0x09
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 65.
Hexadecimal [16-Bits]



                     0109   165 Joy0_Up          = #0x0109
                     0209   166 Joy0_Down        = #0x0209
                     0409   167 Joy0_Left        = #0x0409
                     0809   168 Joy0_Right       = #0x0809
                     1009   169 Joy0_Fire1       = #0x1009
                     2009   170 Joy0_Fire2       = #0x2009
                     4009   171 Joy0_Fire3       = #0x4009
                     8009   172 Key_Del          = #0x8009
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 66.
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                             22 .include "video/videomode.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 .module cpct_video
                             19    
                             20 ;;
                             21 ;; Includes
                             22 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 67.
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                             23 .include "video/video_macros.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;//////////////////////////////////////////////////////////////////////
                             20 ;;//////////////////////////////////////////////////////////////////////
                             21 ;; File: Macros (asm)
                             22 ;;//////////////////////////////////////////////////////////////////////
                             23 ;;//////////////////////////////////////////////////////////////////////
                             24 
                             25 ;;//////////////////////////////////////////////////////////////////////
                             26 ;; Group: Video memory manipulation
                             27 ;;//////////////////////////////////////////////////////////////////////
                             28 
                             29 ;;
                             30 ;; Constant: CPCT_VMEM_START_ASM
                             31 ;;
                             32 ;;    The address where screen video memory starts by default in the Amstrad CPC.
                             33 ;;
                             34 ;;    This address is exactly 0xC000, and this macro represents this number but
                             35 ;; automatically converted to <u8>* (Pointer to unsigned byte). You can use this
                             36 ;; macro for any function requiring the start of video memory, like 
                             37 ;; <cpct_getScreenPtr>.
                             38 ;;
                     C000    39 CPCT_VMEM_START_ASM = 0xC000
                             40 
                             41 ;;
                             42 ;; Constants: Video Memory Pages
                             43 ;;
                             44 ;; Useful constants defining some typical Video Memory Pages to be used as 
                             45 ;; parameters for <cpct_setVideoMemoryPage>
                             46 ;;
                             47 ;; cpct_pageCO - Video Memory Page 0xC0 (0xC0··)
                             48 ;; cpct_page8O - Video Memory Page 0x80 (0x80··)
                             49 ;; cpct_page4O - Video Memory Page 0x40 (0x40··)
                             50 ;; cpct_page0O - Video Memory Page 0x00 (0x00··)
                             51 ;;
                     0030    52 cpct_pageC0_asm = 0x30
                     0020    53 cpct_page80_asm = 0x20
                     0010    54 cpct_page40_asm = 0x10
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 68.
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                     0000    55 cpct_page00_asm = 0x00
                             56 
                             57 ;;
                             58 ;; Macro: cpctm_memPage6_asm
                             59 ;;
                             60 ;;    Macro that encodes a video memory page in the 6 Least Significant bits (LSb)
                             61 ;; of a byte, required as parameter for <cpct_setVideoMemoryPage>. It loads resulting
                             62 ;; value into a given 8-bits register.
                             63 ;;
                             64 ;; ASM Definition:
                             65 ;; .macro <cpct_memPage6_asm> *REG8*, *PAGE*
                             66 ;;
                             67 ;; Parameters (1 byte):
                             68 ;; (__) REG8 - 8bits register where result will be loaded
                             69 ;; (1B) PAGE - Video memory page wanted 
                             70 ;;
                             71 ;; Known issues:
                             72 ;;   * This macro can only be used from assembler code. It is not accessible from 
                             73 ;; C scope. For C programs, please refer to <cpct_memPage6>
                             74 ;;   * This macro will work *only* with constant values, as its value needs to
                             75 ;; be calculated in compilation time. If fed with variable values, it will give 
                             76 ;; an assembler error.
                             77 ;;
                             78 ;; Destroyed Registers:
                             79 ;;    REG8
                             80 ;;
                             81 ;; Size of generated code:
                             82 ;;    2 bytes 
                             83 ;;
                             84 ;; Time Measures:
                             85 ;;    * 2 microseconds
                             86 ;;    * 8 CPU Cycles
                             87 ;;
                             88 ;; Details:
                             89 ;;  This is just a macro that shifts *PAGE* 2 bits to the right, to leave it
                             90 ;; with just 6 significant bits. For more information, check functions
                             91 ;; <cpct_setVideoMemoryPage> and <cpct_setVideoMemoryOffset>.
                             92 ;;
                             93 .macro cpctm_memPage6_asm REG8, PAGE 
                             94    ld REG8, #PAGE / 4      ;; [2] REG8 = PAGE/4
                             95 .endm
                             96 
                             97 ;;
                             98 ;; Macro: cpctm_screenPtr_asm
                             99 ;;
                            100 ;;    Macro that calculates the video memory location (byte pointer) of a 
                            101 ;; given pair of coordinates (*X*, *Y*). Value resulting from calculation 
                            102 ;; will be loaded into a 16-bits register.
                            103 ;;
                            104 ;; ASM Definition:
                            105 ;;    .macro <cpctm_screenPtr_asm> *REG16*, *VMEM*, *X*, *Y*
                            106 ;;
                            107 ;; Parameters:
                            108 ;;    (__) REG16 - 16-bits register where the resulting value will be loaded
                            109 ;;    (2B) VMEM  - Start of video memory buffer where (*X*, *Y*) coordinates will be calculated
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 69.
Hexadecimal [16-Bits]



                            110 ;;    (1B) X     - X Coordinate of the video memory location *in bytes* (*BEWARE! NOT in pixels!*)
                            111 ;;    (1B) Y     - Y Coordinate of the video memory location in pixels / bytes (they are same amount)
                            112 ;;
                            113 ;; Parameter Restrictions:
                            114 ;;    * *REG16* has to be a 16-bits register that can perform ld REG16, #value.
                            115 ;;    * *VMEM* will normally be the start of the video memory buffer where you want to 
                            116 ;; draw something. It could theoretically be any 16-bits value. 
                            117 ;;    * *X* must be in the range [0-79] for normal screen sizes (modes 0,1,2). Screen is
                            118 ;; always 80 bytes wide in these modes and this function is byte-aligned, so you have to 
                            119 ;; give it a byte coordinate (*NOT a pixel one!*).
                            120 ;;    * *Y* must be in the range [0-199] for normal screen sizes (modes 0,1,2). Screen is 
                            121 ;; always 200 pixels high in these modes. Pixels and bytes always coincide in vertical
                            122 ;; resolution, so this coordinate is the same in bytes that in pixels.
                            123 ;;    * If you give incorrect values to this function, the returned pointer could
                            124 ;; point anywhere in memory. This function will not cause any damage by itself, 
                            125 ;; but you may destroy important parts of your memory if you use its result to 
                            126 ;; write to memory, and you gave incorrect parameters by mistake. Take always
                            127 ;; care.
                            128 ;;
                            129 ;; Known issues:
                            130 ;;   * This macro can only be used from assembler code. It is not accessible from 
                            131 ;; C scope. For C programs, please refer to <cpct_getScreenPtr>
                            132 ;;   * This macro will work *only* with constant values, as calculations need to be 
                            133 ;; performed at assembler time.
                            134 ;;
                            135 ;; Destroyed Registers:
                            136 ;;    REG16
                            137 ;;
                            138 ;; Size of generated code:
                            139 ;;    3 bytes 
                            140 ;;
                            141 ;; Time Measures:
                            142 ;;    * 3 microseconds
                            143 ;;    * 12 CPU Cycles
                            144 ;;
                            145 ;; Details:
                            146 ;;    This macro does the same calculation than the function <cpct_getScreenPtr>. However,
                            147 ;; as it is a macro, if all 3 parameters (*VMEM*, *X*, *Y*) are constants, the calculation
                            148 ;; will be done at compile-time. This will free the binary from code or data, just putting in
                            149 ;; the result of this calculation (2 bytes with the resulting address). It is highly 
                            150 ;; recommended to use this macro instead of the function <cpct_getScreenPtr> when values
                            151 ;; involved are all constant. 
                            152 ;;
                            153 ;; Recommendations:
                            154 ;;    All constant values - Use this macro <cpctm_screenPtr_asm>
                            155 ;;    Any variable value  - Use the function <cpct_getScreenPtr>
                            156 ;;
                            157 .macro cpctm_screenPtr_asm REG16, VMEM, X, Y 
                            158    ld REG16, #VMEM + 80 * (Y / 8) + 2048 * (Y & 7) + X   ;; [3] REG16 = screenPtr
                            159 .endm
                            160 
                            161 ;;
                            162 ;; Macro: cpctm_screenPtrSym_asm
                            163 ;;
                            164 ;;    Macro that calculates the video memory location (byte pointer) of a 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 70.
Hexadecimal [16-Bits]



                            165 ;; given pair of coordinates (*X*, *Y*). Value resulting from calculation 
                            166 ;; will be assigned to the given ASZ80 local symbol.
                            167 ;;
                            168 ;; ASM Definition:
                            169 ;;    .macro <cpctm_screenPtr_asm> *SYM*, *VMEM*, *X*, *Y*
                            170 ;;
                            171 ;; Parameters:
                            172 ;;    (__) SYM   - ASZ80 local symbol to assign the result from the calculation to
                            173 ;;    (2B) VMEM  - Start of video memory buffer where (*X*, *Y*) coordinates will be calculated
                            174 ;;    (1B) X     - X Coordinate of the video memory location *in bytes* (*BEWARE! NOT in pixels!*)
                            175 ;;    (1B) Y     - Y Coordinate of the video memory location in pixels / bytes (they are same amount)
                            176 ;;
                            177 ;; Parameter Restrictions:
                            178 ;;    * *SYM* need to be a valid symbol according to ASZ80 rules for symbols
                            179 ;;    * *VMEM* will normally be the start of the video memory buffer where you want to 
                            180 ;; draw something. It could theoretically be any 16-bits value. 
                            181 ;;    * *X* must be in the range [0-79] for normal screen sizes (modes 0,1,2). Screen is
                            182 ;; always 80 bytes wide in these modes and this function is byte-aligned, so you have to 
                            183 ;; give it a byte coordinate (*NOT a pixel one!*).
                            184 ;;    * *Y* must be in the range [0-199] for normal screen sizes (modes 0,1,2). Screen is 
                            185 ;; always 200 pixels high in these modes. Pixels and bytes always coincide in vertical
                            186 ;; resolution, so this coordinate is the same in bytes that in pixels.
                            187 ;;    * If you give incorrect values to this function, the returned pointer could
                            188 ;; point anywhere in memory. This function will not cause any damage by itself, 
                            189 ;; but you may destroy important parts of your memory if you use its result to 
                            190 ;; write to memory, and you gave incorrect parameters by mistake. Take always
                            191 ;; care.
                            192 ;;
                            193 ;; Known issues:
                            194 ;;   * This macro can only be used from assembler code. It is not accessible from 
                            195 ;; C scope. For C programs, please refer to <cpct_getScreenPtr>
                            196 ;;   * This macro will work *only* with constant values, as calculations need to be 
                            197 ;; performed at assembler time.
                            198 ;;
                            199 ;; Destroyed Registers:
                            200 ;;    none
                            201 ;;
                            202 ;; Size of generated code:
                            203 ;;    none (symbols are compile-time, do not generate code)
                            204 ;;
                            205 ;; Time Measures:
                            206 ;;    - not applicable -
                            207 ;;
                            208 ;; Details:
                            209 ;;    This macro does the same calculation than the function <cpct_getScreenPtr>. However,
                            210 ;; as it is a macro, and as its parameters (*VMEM*, *X*, *Y*) must be constants, the calculation
                            211 ;; will be performed at compile-time. This will free the binary from code or data, just putting in
                            212 ;; the result of this calculation (2 bytes with the resulting address). It is highly 
                            213 ;; recommended to use this macro instead of the function <cpct_getScreenPtr> when values
                            214 ;; involved are all constant. 
                            215 ;;
                            216 ;; Recommendations:
                            217 ;;    All constant values - Use this macro <cpctm_screenPtrSym_asm> or <cpctm_screenPtr_asm> 
                            218 ;;    Any variable value  - Use the function <cpct_getScreenPtr>
                            219 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 71.
Hexadecimal [16-Bits]



                            220 .macro cpctm_screenPtrSym_asm SYM, VMEM, X, Y 
                            221    SYM = #VMEM + 80 * (Y / 8) + 2048 * (Y & 7) + X 
                            222 .endm
                            223 
                            224 ;;
                            225 ;; Macro: cpctm_setCRTCReg
                            226 ;;
                            227 ;;    Macro that sets a new value for a given CRTC register.
                            228 ;;
                            229 ;; ASM Definition:
                            230 ;;    .macro <cpctm_setCRTCReg> *HEXREG*, *HEXVAL*
                            231 ;;
                            232 ;; Parameters:
                            233 ;;    (1B) HEXREG - New value to be set for the register (in hexadecimal)
                            234 ;;    (1B) HEXVAL - Number of the register to be set (in hexadecimal)
                            235 ;;
                            236 ;; Parameter Restrictions:
                            237 ;;    * *HEXREG* has to be an hexadecimal value from 00 to 1F
                            238 ;;    * *HEXVAL* has to be an hexadecimal value. Its valid range will depend
                            239 ;;          upon the selected register that will be modified. 
                            240 ;;
                            241 ;; Known issues:
                            242 ;;   * This macro can *only* be used from assembler code. It is not accessible from 
                            243 ;; C scope. 
                            244 ;;   * This macro can only be used with *constant values*. As given values are 
                            245 ;; concatenated with a number, they must also be hexadecimal numbers. If a 
                            246 ;; register or other value is given, this macro will not work.
                            247 ;;   * Using values out of range have unpredicted behaviour and can even 
                            248 ;; potentially cause damage to real Amstrad CPC monitors. Please, use with care.
                            249 ;;
                            250 ;; Destroyed Registers:
                            251 ;;    BC
                            252 ;;
                            253 ;; Size of generated code:
                            254 ;;    10 bytes 
                            255 ;;
                            256 ;; Time Measures:
                            257 ;;    * 14 microseconds
                            258 ;;    * 56 CPU Cycles
                            259 ;;
                            260 ;; Details:
                            261 ;;    This macro expands to two CRTC commands: Register selection and Register setting.
                            262 ;; It selects the register given as first parameter, then sets its new value to 
                            263 ;; that given as second parameter. Both given parameters must be of exactly 1 byte
                            264 ;; in size and the have to be provided in hexadecimal. This is due to the way
                            265 ;; that macro expansion and concatenation works. Given values will be concatenated
                            266 ;; with another 8-bit hexadecimal value to form a unique 16-bits hexadecimal value.
                            267 ;; Therefore, any parameter given will always be considered hexadecimal.
                            268 ;;
                            269 .macro cpctm_setCRTCReg_asm HEXREG, HEXVAL
                            270    ld    bc, #0xBC'HEXREG  ;; [3] B=0xBC CRTC Select Register, C=register number to be selected
                            271    out  (c), c             ;; [4] Select register
                            272    ld    bc, #0xBD'HEXVAL  ;; [3] B=0xBD CRTC Set Register, C=Value to be set
                            273    out  (c), c             ;; [4] Set the value
                            274 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 72.
Hexadecimal [16-Bits]



                            275 
                            276 ;;//////////////////////////////////////////////////////////////////////
                            277 ;; Group: Setting the border
                            278 ;;//////////////////////////////////////////////////////////////////////
                            279 
                            280 ;;
                            281 ;; Macro: cpctm_setBorder_asm
                            282 ;;
                            283 ;;   Changes the colour of the screen border.
                            284 ;;
                            285 ;; ASM Definition:
                            286 ;;   .macro <cpctm_setBorder_asm> HWC 
                            287 ;;
                            288 ;; Input Parameters (1 Byte):
                            289 ;;   (1B) HWC - Hardware colour value for the screen border in *hexadecimal [00-1B]*.
                            290 ;;
                            291 ;; Known issues:
                            292 ;;   * *Beware!* *HWC* colour value must be given in *hexadecimal*, as it is
                            293 ;; substituted in place, and must be in the range [00-1B].
                            294 ;;   * This macro can only be used from assembler code. It is not accessible from 
                            295 ;; C scope. For C programs, please refer to <cpct_setBorder>
                            296 ;;   * This macro will work *only* with constant values, as calculations need to be 
                            297 ;; performed at assembler time.
                            298 ;;
                            299 ;; Destroyed Registers:
                            300 ;;    AF, B, HL
                            301 ;;
                            302 ;; Size of generated code:
                            303 ;;    * 16 bytes 
                            304 ;;     6b - generated code
                            305 ;;    10b - cpct_setPALColour_asm code
                            306 ;;
                            307 ;; Time Measures:
                            308 ;;    * 28 microseconds
                            309 ;;    * 112 CPU Cycles
                            310 ;;
                            311 ;; Details:
                            312 ;;   This is not a real function, but an assembler macro. Beware of using it along
                            313 ;; with complex expressions or calculations, as it may expand in non-desired
                            314 ;; ways.
                            315 ;;
                            316 ;;   For more information, check the real function <cpct_setPALColour>, which
                            317 ;; is called when using <cpctm_setBorder_asm> (It is called using 16 as *pen*
                            318 ;; argument, which identifies the border).
                            319 ;;
                            320 .macro cpctm_setBorder_asm HWC
                            321    .radix h
                            322    cpctm_setBorder_raw_asm \HWC ;; [28] Macro that does the job, but requires a number value to be passed
                            323    .radix d
                            324 .endm
                            325 .macro cpctm_setBorder_raw_asm HWC
                            326    .globl cpct_setPALColour_asm
                            327    ld   hl, #0x'HWC'10         ;; [3]  H=Hardware value of desired colour, L=Border INK (16)
                            328    call cpct_setPALColour_asm  ;; [25] Set Palette colour of the border
                            329 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 73.
Hexadecimal [16-Bits]



                            330 
                            331 ;;//////////////////////////////////////////////////////////////////////
                            332 ;; Group: Screen clearing
                            333 ;;//////////////////////////////////////////////////////////////////////
                            334 
                            335 ;;
                            336 ;; Macro: cpctm_clearScreen_asm
                            337 ;;
                            338 ;;    Macro to simplify clearing the screen.
                            339 ;;
                            340 ;; ASM Definition:
                            341 ;;   .macro <cpctm_clearScreen_asm> COL
                            342 ;;
                            343 ;; Input Parameters (1 byte):
                            344 ;;   (1B) COL - Colour pattern to be used for screen clearing. 
                            345 ;;
                            346 ;; Parameters:
                            347 ;;    *COL* - Any 8-bits value or the A register are valid. Typically, a 0x00 is used 
                            348 ;; to fill up all the screen with 0's (firmware colour 0). However, you may use it in 
                            349 ;; combination with <cpct_px2byteM0>, <cpct_px2byteM1> or a manually created colour pattern.
                            350 ;;
                            351 ;; Known issues:
                            352 ;;   * This macro can only be used from assembler code. It is not accessible from 
                            353 ;; C scope. For C programs, please refer to <cpct_clearScreen>
                            354 ;;
                            355 ;; Details:
                            356 ;;   Fills up all the standard screen (range [0xC000-0xFFFF]) with *COL* byte, the colour 
                            357 ;; pattern given.
                            358 ;;
                            359 ;; Destroyed Registers:
                            360 ;;    BC, DE, HL
                            361 ;;
                            362 ;; Size of generated code:
                            363 ;;    13 bytes 
                            364 ;;
                            365 ;; Time Measures:
                            366 ;;    98309 microseconds (*4.924 VSYNCs* on a 50Hz display).
                            367 ;;    393236 CPU Cycles 
                            368 ;;
                            369 .macro cpctm_clearScreen_asm COL
                            370    ld    hl, #0xC000    ;; [3] HL Points to Start of Video Memory
                            371    ld    de, #0xC001    ;; [3] DE Points to the next byte
                            372    ld    bc, #0x4000    ;; [3] BC = 16384 bytes to be copied
                            373    ld   (hl), #COL      ;; [3] First Byte = given Colour
                            374    ldir                 ;; [98297] Perform the copy
                            375 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 74.
Hexadecimal [16-Bits]



                             24 .include "video/colours.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2017 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;//////////////////////////////////////////////////////////////////////
                             20 ;;//////////////////////////////////////////////////////////////////////
                             21 ;; File: Colours (asm)
                             22 ;;//////////////////////////////////////////////////////////////////////
                             23 ;;//////////////////////////////////////////////////////////////////////
                             24 ;;
                             25 ;;    Constants and utilities to manage the 27 colours from
                             26 ;; the CPC Palette comfortably in assembler.
                             27 ;;
                             28 ;;
                             29 
                             30 ;; Constant: Firmware colour values
                             31 ;;
                             32 ;;    Enumerates all 27 firmware colours for assembler programs
                             33 ;;
                             34 ;; Values:
                             35 ;; (start code)
                             36 ;;   [=================================================]
                             37 ;;   | Identifier        | Val| Identifier        | Val|
                             38 ;;   |-------------------------------------------------|
                             39 ;;   | FW_BLACK          |  0 | FW_BLUE           |  1 |
                             40 ;;   | FW_BRIGHT_BLUE    |  2 | FW_RED            |  3 |
                             41 ;;   | FW_MAGENTA        |  4 | FW_MAUVE          |  5 |
                             42 ;;   | FW_BRIGHT_RED     |  6 | FW_PURPLE         |  7 |
                             43 ;;   | FW_BRIGHT_MAGENTA |  8 | FW_GREEN          |  9 |
                             44 ;;   | FW_CYAN           | 10 | FW_SKY_BLUE       | 11 |
                             45 ;;   | FW_YELLOW         | 12 | FW_WHITE          | 13 |
                             46 ;;   | FW_PASTEL_BLUE    | 14 | FW_ORANGE         | 15 |
                             47 ;;   | FW_PINK           | 16 | FW_PASTEL_MAGENTA | 17 |
                             48 ;;   | FW_BRIGHT_GREEN   | 18 | FW_SEA_GREEN      | 19 |
                             49 ;;   | FW_BRIGHT_CYAN    | 20 | FW_LIME           | 21 |
                             50 ;;   | FW_PASTEL_GREEN   | 22 | FW_PASTEL_CYAN    | 23 |
                             51 ;;   | FW_BRIGHT_YELLOW  | 24 | FW_PASTEL_YELLOW  | 25 |
                             52 ;;   | FW_BRIGHT_WHITE   | 26 |                   |    |
                             53 ;;   [=================================================]
                             54 ;; (end code)
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 75.
Hexadecimal [16-Bits]



                             55 
                     0000    56 FW_BLACK          =  0
                     0001    57 FW_BLUE           =  1
                     0002    58 FW_BRIGHT_BLUE    =  2
                     0003    59 FW_RED            =  3
                     0004    60 FW_MAGENTA        =  4
                     0005    61 FW_MAUVE          =  5
                     0006    62 FW_BRIGHT_RED     =  6
                     0007    63 FW_PURPLE         =  7
                     0008    64 FW_BRIGHT_MAGENTA =  8
                     0009    65 FW_GREEN          =  9
                     000A    66 FW_CYAN           = 10
                     000B    67 FW_SKY_BLUE       = 11
                     000C    68 FW_YELLOW         = 12
                     000D    69 FW_WHITE          = 13
                     000E    70 FW_PASTEL_BLUE    = 14
                     000F    71 FW_ORANGE         = 15
                     0010    72 FW_PINK           = 16
                     0011    73 FW_PASTEL_MAGENTA = 17
                     0012    74 FW_BRIGHT_GREEN   = 18
                     0013    75 FW_SEA_GREEN      = 19
                     0014    76 FW_BRIGHT_CYAN    = 20
                     0015    77 FW_LIME           = 21
                     0016    78 FW_PASTEL_GREEN   = 22
                     0017    79 FW_PASTEL_CYAN    = 23
                     0018    80 FW_BRIGHT_YELLOW  = 24
                     0019    81 FW_PASTEL_YELLOW  = 25
                     001A    82 FW_BRIGHT_WHITE   = 26
                             83 
                             84 ;; Constant: Hardware colour values
                             85 ;;
                             86 ;;    Enumerates all 27 hardware colours for assembler programs
                             87 ;;
                             88 ;; Values:
                             89 ;; (start code)
                             90 ;;   [=====================================================]
                             91 ;;   | Identifier        | Value| Identifier        | Value|
                             92 ;;   |-----------------------------------------------------|
                             93 ;;   | HW_BLACK          | 0x14 | HW_BLUE           | 0x04 |
                             94 ;;   | HW_BRIGHT_BLUE    | 0x15 | HW_RED            | 0x1C |
                             95 ;;   | HW_MAGENTA        | 0x18 | HW_MAUVE          | 0x1D |
                             96 ;;   | HW_BRIGHT_RED     | 0x0C | HW_PURPLE         | 0x05 |
                             97 ;;   | HW_BRIGHT_MAGENTA | 0x0D | HW_GREEN          | 0x16 |
                             98 ;;   | HW_CYAN           | 0x06 | HW_SKY_BLUE       | 0x17 |
                             99 ;;   | HW_YELLOW         | 0x1E | HW_WHITE          | 0x00 |
                            100 ;;   | HW_PASTEL_BLUE    | 0x1F | HW_ORANGE         | 0x0E |
                            101 ;;   | HW_PINK           | 0x07 | HW_PASTEL_MAGENTA | 0x0F |
                            102 ;;   | HW_BRIGHT_GREEN   | 0x12 | HW_SEA_GREEN      | 0x02 |
                            103 ;;   | HW_BRIGHT_CYAN    | 0x13 | HW_LIME           | 0x1A |
                            104 ;;   | HW_PASTEL_GREEN   | 0x19 | HW_PASTEL_CYAN    | 0x1B |
                            105 ;;   | HW_BRIGHT_YELLOW  | 0x0A | HW_PASTEL_YELLOW  | 0x03 |
                            106 ;;   | HW_BRIGHT_WHITE   | 0x0B |                   |      |
                            107 ;;   [=====================================================]
                            108 ;; (end code)
                            109 ;;
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 76.
Hexadecimal [16-Bits]



                     0014   110 HW_BLACK          = 0x14
                     0004   111 HW_BLUE           = 0x04
                     0015   112 HW_BRIGHT_BLUE    = 0x15
                     001C   113 HW_RED            = 0x1C
                     0018   114 HW_MAGENTA        = 0x18
                     001D   115 HW_MAUVE          = 0x1D
                     000C   116 HW_BRIGHT_RED     = 0x0C
                     0005   117 HW_PURPLE         = 0x05
                     000D   118 HW_BRIGHT_MAGENTA = 0x0D
                     0016   119 HW_GREEN          = 0x16
                     0006   120 HW_CYAN           = 0x06
                     0017   121 HW_SKY_BLUE       = 0x17
                     001E   122 HW_YELLOW         = 0x1E
                     0000   123 HW_WHITE          = 0x00
                     001F   124 HW_PASTEL_BLUE    = 0x1F
                     000E   125 HW_ORANGE         = 0x0E
                     0007   126 HW_PINK           = 0x07
                     000F   127 HW_PASTEL_MAGENTA = 0x0F
                     0012   128 HW_BRIGHT_GREEN   = 0x12
                     0002   129 HW_SEA_GREEN      = 0x02
                     0013   130 HW_BRIGHT_CYAN    = 0x13
                     001A   131 HW_LIME           = 0x1A
                     0019   132 HW_PASTEL_GREEN   = 0x19
                     001B   133 HW_PASTEL_CYAN    = 0x1B
                     000A   134 HW_BRIGHT_YELLOW  = 0x0A
                     0003   135 HW_PASTEL_YELLOW  = 0x03
                     000B   136 HW_BRIGHT_WHITE   = 0x0B
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 77.
Hexadecimal [16-Bits]



                             25 
                             26 ;;
                             27 ;; Constant values
                             28 ;;
                     7F00    29 GA_port        = 0x7F00  ;; 16-bit Port of the Gate Array (for the use with BC register)
                     007F    30 GA_port_byte   = 0x7F    ;; 8-bit Port of the Gate Array
                     0000    31 PAL_PENR       = 0x00    ;; Command to select a PEN register in the PAL chip
                     0040    32 PAL_INKR       = 0x40    ;; Command to set the INK of a previously selected PEN register in the PAL chip
                     00F5    33 PPI_PORT_B     = 0xF5    ;; Port B of the PPI, used to read Vsync/Jumpers/PrinterBusy/CasIn/Exp information
                     00BC    34 CRTC_SELECTREG = 0xBC    ;; CRTC Port and command "Select Register"
                     00BD    35 CRTC_SETVAL    = 0xBD    ;; CRTC Port and command "Set Value"
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 78.
Hexadecimal [16-Bits]



                             23 .include "sprites/sprites.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;#####################################################################
                             20 ;;### MODULE: Sprites
                             21 ;;#####################################################################
                             22 ;;### Functions, macros and definitions used for managing sprites
                             23 ;;### in assembler code
                             24 ;;#####################################################################
                             25 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 79.
Hexadecimal [16-Bits]



                             26 .include "sprites/flipping/flipping_macros.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine
                              3 ;;  Copyright (C) 2018 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;#####################################################################
                             20 ;;### MODULE: Sprites
                             21 ;;### SUBMODULE: flipping.macros
                             22 ;;#####################################################################
                             23 ;;### Macros used to speed up calculations required for to assist
                             24 ;;### flipping functions. Assembler version.
                             25 ;;#####################################################################
                             26 
                             27 ;;
                             28 ;; Macro: cpctm_ld_spbloff
                             29 ;;
                             30 ;;    Macro that calculates the offset to add to a sprite pointer to point 
                             31 ;; to it sbottom left pixel.
                             32 ;;
                             33 ;; ASM Definition:
                             34 ;;    .macro <cpctm_ld_spbloff> *REG*, *W*, *H*
                             35 ;;
                             36 ;; Acronym stands for:
                             37 ;;    ld_sbloff = Load Sprite Bottom Left Offset
                             38 ;;
                             39 ;; Parameters:
                             40 ;;    (1-2B) REG - Register that will load the resulting offset (8 or 16 bits)
                             41 ;;    (1B) W     - Width of the sprite in *bytes*
                             42 ;;    (1B) H     - Height of the sprite in pixels
                             43 ;;
                             44 ;; Parameter Restrictions:
                             45 ;;    *REG* - Must be a valid 8/16 bits register that can be immediately loaded
                             46 ;; using ld REG, #immediate.
                             47 ;;    *W*   - Must be an immediate value representing the width of the sprite 
                             48 ;; in *bytes* (Beware! Not in pixels). For sprites having interlaced mask, you 
                             49 ;; may input 2 times the width of the sprite for appropriate results.
                             50 ;;    *H*   - Must be an immediate value representing the height of the sprite 
                             51 ;; in pixels.
                             52 ;;
                             53 ;; Returns:
                             54 ;; (start code)
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 80.
Hexadecimal [16-Bits]



                             55 ;;    REG = W * (H - 1) ;; Register loaded with the offset
                             56 ;; (end code)
                             57 ;;
                             58 ;; Details:
                             59 ;;    This macro calculates the offset of the initial byte of the last row 
                             60 ;; of a given sprite (i.e. its bottom-left byte), with respect to its first
                             61 ;; byte (top-left corner). This value can easily be added to any sprite 
                             62 ;; pointer to get a pointer to the bottom-left byte. This pointer is required
                             63 ;; byte many flipping functions (like <cpct_vflipSpriteM0>). Values for width
                             64 ;; and height of the sprite must be constant immediate values. Otherwise, this
                             65 ;; macro will generate incorrect code that will fail to compile. 
                             66 ;;    The macro calculates *W* * (*H*-1) at compile-time and loads it into
                             67 ;; the given register. Please, take into account that the macro does no check
                             68 ;; about the size of the resulting values. If multiplication results in a value
                             69 ;; greater than 255, you will need to load it into a 16-bit register. You must
                             70 ;; take care of the expected size of the offset value.
                             71 ;;
                             72 ;; Known issues:
                             73 ;;    * This is a assembler macro. It cannot be called or used from C code.
                             74 ;;
                             75 .macro cpctm_ld_spbloff REG, W, H
                             76    ld    REG, #W * (H-1)
                             77 .endm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 81.
Hexadecimal [16-Bits]



                             27 .include "sprites/pixel_macros.h.s"
                              1 ;;-----------------------------LICENSE NOTICE------------------------------------
                              2 ;;  This file is part of CPCtelera: An Amstrad CPC Game Engine 
                              3 ;;  Copyright (C) 2021 ronaldo / Fremos / Cheesetea / ByteRealms (@FranGallegoBR)
                              4 ;;
                              5 ;;  This program is free software: you can redistribute it and/or modify
                              6 ;;  it under the terms of the GNU Lesser General Public License as published by
                              7 ;;  the Free Software Foundation, either version 3 of the License, or
                              8 ;;  (at your option) any later version.
                              9 ;;
                             10 ;;  This program is distributed in the hope that it will be useful,
                             11 ;;  but WITHOUT ANY WARRANTY; without even the implied warranty of
                             12 ;;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                             13 ;;  GNU Lesser General Public License for more details.
                             14 ;;
                             15 ;;  You should have received a copy of the GNU Lesser General Public License
                             16 ;;  along with this program.  If not, see <http://www.gnu.org/licenses/>.
                             17 ;;-------------------------------------------------------------------------------
                             18 
                             19 ;;-------------------------------------------------------------------------------
                             20 ;; Title: Pixel Macros (ASM)
                             21 ;;-------------------------------------------------------------------------------
                             22 
                             23 ;; Macro: CPCTM_PEN2PIXELPATTERN_M1_ASM
                             24 ;;
                             25 ;;    Similarly to the function <cpct_pen2pixelPatternM1>, creates 1 byte in Mode 1 
                             26 ;; screen pixel format containing a pattern with all 4 pixels in the same pen colour 
                             27 ;; as given by the argument *PEN*.
                             28 ;;
                             29 ;; ASM Definition:
                             30 ;;    .macro <CPCTM_PEN2PIXELPATTERN_M1_ASM> *SYM*, *PEN*
                             31 ;;
                             32 ;; Parameters:
                             33 ;;    SYM - Name of a symbol to assign the resulting value of the calculation
                             34 ;;    PEN - ([0-3], unsigned) Pen Colour from which create the pixel pattern
                             35 ;; 
                             36 ;; Known limitations:
                             37 ;;    * It does not perform any kind of checking. Values other than unsigned integers [0-3]
                             38 ;; will produce undefined behaviour.
                             39 ;;    * As this is an assembly macro, it will only work with constant values or symbols. It
                             40 ;; will produce assembly errors when used with other kind of values.
                             41 ;;
                             42 ;; Details:
                             43 ;;    This macro does the same operations the function <cpct_pen2pixelPatternM1> does, but
                             44 ;; with an explicit operation that can be calculated at compile-time, producing a single 
                             45 ;; precalculated byte in your final binary (if you use it with constant values).
                             46 ;;
                             47 ;;    For more details on this operations, consult <cpct_pen2pixelPatternM1> help.
                             48 ;;
                             49 ;; Use example:
                             50 ;; (start code)
                             51 ;;    ;// Simple function that changes the Skin Colour 
                             52 ;;    ;// of a given Alien Sprite into Cyan (Alien Skin is yellow normally)  
                             53 ;;    ;// HL = Pointer to Alien Sprite
                             54 ;;    ;// BC = Size of Alien Sprite
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 82.
Hexadecimal [16-Bits]



                             55 ;;    changeAlienSkinColourToCyan:
                             56 ;;       CPCTM_PEN2PIXELPATTERN_M1_ASM OldPen, 1 ;// Produces 'OldPen = 0xF0'
                             57 ;;       CPCTM_PEN2PIXELPATTERN_M1_ASM NewPen, 2 ;// Produces 'NewPen = 0x0F'
                             58 ;;       ld    de, #(OldPen << 8) | NewPen
                             59 ;;       call  cpct_spriteColourizeM1_asm
                             60 ;;       ret
                             61 ;;    
                             62 ;;    ;// Simple function that restores the Skin Colour 
                             63 ;;    ;// of a given Alien Sprite to yellow (after being changed to Cyan)  
                             64 ;;    ;// HL = Pointer to Alien Sprite
                             65 ;;    ;// BC = Size of Alien Sprite
                             66 ;;    restoreAlienSkinColourToYellow:
                             67 ;;       CPCTM_PEN2PIXELPATTERN_M1_ASM OldPen, 2 ;// Produces 'OldPen = 0x0F'
                             68 ;;       CPCTM_PEN2PIXELPATTERN_M1_ASM NewPen, 1 ;// Produces 'NewPen = 0xF0'
                             69 ;;       ld    de, #(OldPen << 8) | NewPen
                             70 ;;       call  cpct_spriteColourizeM1_asm
                             71 ;;       ret
                             72 ;; (end code)
                             73 ;;
                             74 .mdelete CPCTM_PEN2PIXELPATTERN_M1_ASM
                             75 .macro CPCTM_PEN2PIXELPATTERN_M1_ASM _Sym, _Pen
                             76    _Sym = ((((_Pen) & 1) << 7) | (((_Pen) & 1) << 6) | (((_Pen) & 1) << 5) | (((_Pen) & 1) << 4) | (((_Pen) & 2) << 2) | (((_Pen) & 2) << 1) | (((_Pen) & 2)     ) | (((_Pen) & 2) >> 1))
                             77 .endm  
                             78 
                             79 ;;
                             80 ;; Macro: CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM
                             81 ;;
                             82 ;;    Similarly to the function <cpct_pens2pixelPatternPairM1>, creates a 16 bits 
                             83 ;; value in Mode 1 screen pixel format, containing two pattern with all 4 pixels in 
                             84 ;; the same pen colour as given by the arguments *OldPen* and *NewPen*. 
                             85 ;;
                             86 ;; C Definition:
                             87 ;;    .macro <CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM> *SYM*, *OldPen*, *NewPen*
                             88 ;;
                             89 ;; Parameters:
                             90 ;;    SYM    - Name of a symbol to assign the resulting value of the calculation
                             91 ;;    OldPen - ([0-3], unsigned) Pen Colour to be found and replaced in <cpct_spriteColourizeM1>
                             92 ;;    NewPen - ([0-3], unsigned) New Pen Colour to be inserted in <cpct_spriteColourizeM1>
                             93 ;; 
                             94 ;; Known limitations:
                             95 ;;    * It does not perform any kind of checking. Values other than unsigned integers [0-3]
                             96 ;; will produce undefined behaviour.
                             97 ;;    * As this is a macro, this is designed only for CONSTANT values, to perform compile-time
                             98 ;; calculations. If you use it with variables, it will generate poor & slow code. Moreover, 
                             99 ;; generated code will be repeated if the macro is used multiple times, bloating your binary.
                            100 ;; Use <cpct_pen2pixelPatternM1> function for variables instead.
                            101 ;;
                            102 ;; Details:
                            103 ;;    This macro does the same operations the function <cpct_pens2pixelPatternPairM1> does, 
                            104 ;; but with an explicit operation that can be calculated at compile-time, producing a single 
                            105 ;; precalculated 16-bits value in your final binary (if you use it with constant values).
                            106 ;;
                            107 ;;    For more details on this operations, consult <cpct_pens2pixelPatternPairM1> help.
                            108 ;;
                            109 ;; Use example:
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 83.
Hexadecimal [16-Bits]



                            110 ;; (start code)
                            111 ;; ;// Simple function that changes the Skin Colour 
                            112 ;; ;// of a given Alien Sprite into Cyan (2) (Alien Skin is yellow (1) normally)  
                            113 ;; ;// HL = Pointer to Alien Sprite
                            114 ;; ;// BC = Size of Alien Sprite
                            115 ;; changeAlienSkinColourToCyan:
                            116 ;;    CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM rplcPat, 1, 2   ;// Change Pen 1 into Pen 2
                            117 ;;    ld    de, #rplcPat                                 ;// rplcPat = 0xF00F
                            118 ;;    call  cpct_spriteColourizeM1_asm
                            119 ;;    ret
                            120 ;;
                            121 ;; ;// Simple function that restores the Skin Colour 
                            122 ;; ;// of a given Alien Sprite to yellow (1) (after being changed to Cyan (2) )
                            123 ;; ;// HL = Pointer to Alien Sprite
                            124 ;; ;// BC = Size of Alien Sprite
                            125 ;; restoreAlienSkinColourToYellow:
                            126 ;;    CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM rplcPat, 2, 1   ;// Change Pen 2 into Pen 1
                            127 ;;    ld    de, #rplcPat                                 ;// rplcPat = 0x0FF0
                            128 ;;    call  cpct_spriteColourizeM1_asm
                            129 ;;    ret
                            130 ;; (end code)
                            131 ;;
                            132 .mdelete CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM
                            133 .macro CPCTM_PENS2PIXELPATTERNPAIR_M1_ASM _Sym, _OldPen, _NewPen
                            134    CPCTM_PEN2PIXELPATTERN_M1_ASM _Sym'__h, _OldPen
                            135    CPCTM_PEN2PIXELPATTERN_M1_ASM _Sym'__l, _NewPen
                            136    _Sym = (_Sym'__h << 8) | _Sym'__l
                            137 .endm  
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 84.
Hexadecimal [16-Bits]



                             14 .include "entity_manager.h.s"
                              1 ;;####################################################################
                              2 ;;# GNU Free Documentation License                                   #
                              3 ;;# Version 1.3, 3 November 2008                                     #
                              4 ;;#                                                                  #
                              5 ;;# Copyright (C) 2021 Lumina                                        #
                              6 ;;# (Paula Garcia Morales, Laura Gil Lopez, Jorge Perez Dominguez)   #
                              7 ;;#                                                                  #
                              8 ;;# Everyone is permitted to copy and distribute verbatim copies     #
                              9 ;;# of this license document, but changing it is not allowed.        #
                             10 ;;####################################################################
                             11 
                             12 
                             13 ;;funciones de cpctelera
                             14 .globl cpct_getRandom_xsp40_u8_asm
                             15 
                             16 ;;funciones de render
                             17 .globl render_delete_entity
                             18 .globl render_getNivel_A
                             19 .globl render_getCamera_HL
                             20 
                             21 ;;funciones de clock
                             22 .globl reset_clock
                             23 
                             24 ;;funciones de live
                             25 .globl reset_lifes
                             26 .globl life_getLifes_A
                             27 
                             28 ;;sprites entidades
                             29 .globl _zacarias
                             30 .globl _zacarias2
                             31 .globl _roca
                             32 .globl _roca2
                             33 .globl _ave
                             34 .globl _ave2
                             35 .globl _reloj
                             36 .globl _corazon
                             37 .globl _queso
                             38 .globl _queso_sagrado
                             39 .globl _aranaR
                             40 .globl _aranaR2
                             41 .globl _aranaL
                             42 .globl _aranaL2
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 85.
Hexadecimal [16-Bits]



                             15 
   5AAB 00                   16 relojitoEntities: .db #0x00
   5AAC 00                   17 relojitoAnimW: .db #0x00
   5AAD 00                   18 relojitoAnimS: .db #0x00
                             19 
   5AAE 01                   20 generoentidades: .db #1
   5AAF 01                   21 quesogenerado: .db #1
   5AB0 01                   22 generoqueso: .db #1
                             23 
   5AB1                      24 Player:
                             25    ;;     0    1  2   3   4      5        6         7   8    9        10           11          12             13             14      15
                             26    ;;     x,   y, w,  h, vy, Color, Msc_Sys, Msc_Type, lx,  ly, spritebajo1, spritealto1,  spritebajo2,   spritealto2, contadorAnim, vx 
   5AB1 14 B8 04 10 00 00    27    .db   20, 184, 4, 16,  0, #0x00,      15,        1, 20, 184, #<_zacarias, #>_zacarias, #<_zacarias2,  #>_zacarias2,            1,  0
        0F 01 14 B8 24 0B
        E0 0A 01 00
                             28 
   5AC1                      29 Rock:
                             30    ;;     x,   y, w,  h, vy, Color, Msc_Sys, Msc_Type, lx,  ly, spritebajo1, spritealto1,  spritebajo2,   spritealto2, contadorAnim, vx  
   5AC1 05 11 02 08 01 00    31    .db    5,  17, 2,  8,  1, #0x00,       7,        2,  5,  17,     #<_roca,     #>_roca,     #<_roca2,      #>_roca2,            1,  0
        07 02 05 11 D0 09
        C0 09 01 00
                             32 
   5AD1                      33 SpiderR:
                             34    ;;     x,   y, w,  h, vy, Color, Msc_Sys, Msc_Type, lx,  ly, spritebajo1, spritealto1,  spritebajo2,   spritealto2, contadorAnim, vx  
   5AD1 22 18 02 08 02 00    35    .db   34,  24, 2,  8,  2, #0x00,       7,        8, 34,  24,   #<_aranaR,   #>_aranaR,   #<_aranaR2,    #>_aranaR2,            1,  0
        07 08 22 18 B0 09
        A0 09 01 00
                             36 
   5AE1                      37 SpiderL:
                             38    ;;     x,   y, w,  h, vy, Color, Msc_Sys, Msc_Type, lx,  ly, spritebajo1, spritealto1,  spritebajo2,   spritealto2, contadorAnim, vx  
   5AE1 04 18 02 08 02 00    39    .db    4,  24, 2,  8,  2, #0x00,       7,       16,  4,  24,   #<_aranaL,   #>_aranaL,   #<_aranaL2,    #>_aranaL2,            1,  0
        07 10 04 18 90 09
        80 09 01 00
                             40 
   5AF1                      41 Aguila:
                             42    ;;     x,   y, w,  h, vy, Color, Msc_Sys, Msc_Type, lx,  ly, spritebajo1, spritealto1,  spritebajo2,   spritealto2, contadorAnim, vx  
   5AF1 14 18 04 10 00 25    43    .db   20,  24, 4, 16,  0, #0x25,       7,        4,  20, 24,      #<_ave,      #>_ave,      #<_ave2,       #>_ave2,            1,  1
        07 04 14 18 40 09
        00 09 01 01
                             44 
   5B01                      45 Clock:
                             46    ;;     x,   y, w,  h, vy, Color, Msc_Sys, Msc_Type, lx,  ly, spritebajo1, spritealto1,  spritebajo2,   spritealto2, contadorAnim, vx  
   5B01 01 08 02 08 00 00    47    .db    1,   8, 2,  8,  0, #0x00,       1,       32,  1,   8,    #<_reloj,    #>_reloj,     #<_reloj,      #>_reloj,            1,  0
        01 20 01 08 40 08
        40 08 01 00
                             48 
   5B11                      49 Queso:
                             50    ;;     x,   y, w,  h, vy, Color, Msc_Sys, Msc_Type, lx,  ly, spritebajo1, spritealto1,  spritebajo2,   spritealto2, contadorAnim, vx  
   5B11 14 18 02 08 00 00    51    .db   20,  24, 2,  8,  0, #0x00,       7,       64, 20,  24,    #<_queso,    #>_queso,     #<_queso,      #>_queso,            1,  0
        07 40 14 18 F0 08
        F0 08 01 00
                             52 
   5B21                      53 Life:
                             54    ;;     x,   y, w,  h, vy, Color, Msc_Sys, Msc_Type, lx,  ly, spritebajo1, spritealto1,  spritebajo2,   spritealto2, contadorAnim, vx  
   5B21 22 07 02 08 00 00    55    .db   34,   7, 2,  8,  0, #0x00,       1,       32, 38,  10,  #<_corazon,  #>_corazon,   #<_corazon,    #>_corazon,            1,  0
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 86.
Hexadecimal [16-Bits]



        01 20 26 0A 50 08
        50 08 01 00
                             56 
   5B31                      57 Queso_Sagrado:
                             58    ;;     x,   y, w,  h, vy, Color, Msc_Sys, Msc_Type, lx,  ly,      spritebajo1,      spritealto1,      spritebajo2,      spritealto2, contadorAnim, vx  
   5B31 12 8C 06 18 00 00    59    .db   18, 140, 6, 24,  0, #0x00,       5,       64, 18, 140, #<_queso_sagrado, #>_queso_sagrado, #<_queso_sagrado, #>_queso_sagrado,            1,  0
        05 40 12 8C 60 08
        60 08 01 00
                             60 
                             61 
                     0008    62 max_entities == 8
                     0010    63 entity_size == 16
                             64 
                             65 ;;MASCARAS System
                     0000    66 Invalid_masc 	== #0b00000000
                     0001    67 Render_masc  	== #0b00000001
                     0002    68 Physics_masc 	== #0b00000010
                     0004    69 Collision_masc == #0b00000100
                     0008    70 Input_masc     == #0b00001000
                     0020    71 Delete_masc    == #0b00100000
                     0080    72 Dead_masc  		== #0b10000000
                     007F    73 Default_masc 	== #0b01111111
                             74 
                             75 ;;MASCARAS Type
                     0001    76 Player_masc  	       == #0b00000001
                     0002    77 Rock_masc 		       == #0b00000010
                     0004    78 Aguila_masc           == #0b00000100
                     0008    79 SpiderR_masc          == #0b00001000
                     0010    80 SpiderL_masc          == #0b00010000
                     0020    81 Heart_Clock_masc      == #0b00100000
                     0040    82 Queso_masc            == #0b01000000
                             83 
                             84 
                             85 
   5B41                      86 _num_entities::
   5B41 00                   87 	.db 0
                             88 
   5B42                      89 _last_entity_ptr::
   5B42 44 5B                90 	.dw _entity_array
                             91 
   5B44                      92 _entity_array::
   5B44                      93 	.ds max_entities*entity_size
                             94 
                             95 
                             96 ;;Guardamos en ix el array de entidades
   5BC4                      97 entityman_getEntityArray_IX::
   5BC4 DD 21 44 5B   [14]   98 	ld 	ix,	#_entity_array
   5BC8 C9            [10]   99 ret
                            100 
                            101 ;;Guardamos en a el numero de entidades
   5BC9                     102 entityman_getNumEntities_A::
   5BC9 3A 41 5B      [13]  103 	ld 	a,	(_num_entities)
   5BCC C9            [10]  104 ret
                            105 
   5BCD                     106 entityman_reset_game::
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 87.
Hexadecimal [16-Bits]



   5BCD CD C4 5B      [17]  107 	call entityman_getEntityArray_IX
   5BD0 DD 22 42 5B   [20]  108 	ld (_last_entity_ptr), ix
                            109 
   5BD4 3E 00         [ 7]  110 	ld a, #0
   5BD6 32 41 5B      [13]  111 	ld (_num_entities), a
                            112 
   5BD9 3E 01         [ 7]  113 	ld a, #1
   5BDB 32 AE 5A      [13]  114 	ld (generoentidades), a
                            115 
   5BDE 3E 01         [ 7]  116 	ld a, #1
   5BE0 32 AF 5A      [13]  117 	ld (quesogenerado), a
                            118 
   5BE3 3E 01         [ 7]  119 	ld a, #1
   5BE5 32 B0 5A      [13]  120 	ld (generoqueso), a
                            121 
   5BE8 CD 96 66      [17]  122 	call reset_clock
   5BEB CD F2 67      [17]  123 	call reset_lifes
   5BEE C9            [10]  124 ret
                            125 
   5BEF                     126 puedo_queso::
   5BEF 3E 01         [ 7]  127 	ld a, #1
   5BF1 32 B0 5A      [13]  128 	ld (generoqueso), a
   5BF4 C9            [10]  129 ret
                            130 
   5BF5                     131 crear_queso_sagrado::
   5BF5 CD C4 5B      [17]  132 	call entityman_getEntityArray_IX
   5BF8 DD 7E 01      [19]  133 	ld a, 1(ix)   ;;y
   5BFB D6 0A         [ 7]  134 	sub #10
                            135 
   5BFD 21 31 5B      [10]  136 	ld hl, #Queso_Sagrado
   5C00 23            [ 6]  137 	inc hl
   5C01 77            [ 7]  138 	ld (hl), a
   5C02 CD 27 5D      [17]  139     call entityman_create
   5C05 C9            [10]  140 ret
                            141 
   5C06                     142 entityman_init_level1:
   5C06 21 C1 5A      [10]  143 	ld hl, #Rock
   5C09 CD 5A 5D      [17]  144 	call entityman_valores_rock
   5C0C 21 C1 5A      [10]  145 	ld hl, #Rock
   5C0F CD 27 5D      [17]  146     call entityman_create
   5C12 C9            [10]  147 ret
                            148 
   5C13                     149 entityman_init_level2:
   5C13 21 F1 5A      [10]  150 	ld hl, #Aguila
   5C16 CD BE 5D      [17]  151 	call entityman_valores_Aguila
   5C19 21 F1 5A      [10]  152 	ld hl, #Aguila
   5C1C CD 27 5D      [17]  153     call entityman_create
   5C1F C9            [10]  154 ret
                            155 
   5C20                     156 entityman_init_level3:
   5C20 21 C1 5A      [10]  157 	ld hl, #Rock
   5C23 CD 5A 5D      [17]  158 	call entityman_valores_rock
   5C26 21 C1 5A      [10]  159 	ld hl, #Rock
   5C29 CD 27 5D      [17]  160     call entityman_create
                            161 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 88.
Hexadecimal [16-Bits]



   5C2C 21 D1 5A      [10]  162 	ld hl, #SpiderR
   5C2F CD AC 5D      [17]  163 	call entityman_valores_spider
   5C32 21 D1 5A      [10]  164 	ld hl, #SpiderR
   5C35 CD 27 5D      [17]  165     call entityman_create
                            166 
   5C38 21 E1 5A      [10]  167     ld hl, #SpiderL
   5C3B CD AC 5D      [17]  168     call entityman_valores_spider
   5C3E 21 E1 5A      [10]  169     ld hl, #SpiderL
   5C41 CD 27 5D      [17]  170     call entityman_create
   5C44 C9            [10]  171 ret
                            172 
   5C45                     173 entityman_init_level4:
   5C45 21 C1 5A      [10]  174 	ld hl, #Rock
   5C48 CD 5A 5D      [17]  175 	call entityman_valores_rock
   5C4B 21 C1 5A      [10]  176 	ld hl, #Rock
   5C4E CD 27 5D      [17]  177     call entityman_create
                            178 
   5C51 21 F1 5A      [10]  179     ld hl, #Aguila
   5C54 CD BE 5D      [17]  180 	call entityman_valores_Aguila
   5C57 21 F1 5A      [10]  181 	ld hl, #Aguila
   5C5A CD 27 5D      [17]  182     call entityman_create
   5C5D C9            [10]  183 ret
                            184 
   5C5E                     185 entityman_init_level5:
   5C5E 21 F1 5A      [10]  186 	ld hl, #Aguila
   5C61 CD BE 5D      [17]  187 	call entityman_valores_Aguila
   5C64 21 F1 5A      [10]  188 	ld hl, #Aguila
   5C67 CD 27 5D      [17]  189     call entityman_create
                            190 
   5C6A 21 D1 5A      [10]  191     ld hl, #SpiderR
   5C6D CD AC 5D      [17]  192 	call entityman_valores_spider
   5C70 21 D1 5A      [10]  193 	ld hl, #SpiderR
   5C73 CD 27 5D      [17]  194     call entityman_create
                            195 
   5C76 21 E1 5A      [10]  196     ld hl, #SpiderL
   5C79 CD AC 5D      [17]  197     call entityman_valores_spider
   5C7C 21 E1 5A      [10]  198     ld hl, #SpiderL
   5C7F CD 27 5D      [17]  199     call entityman_create
   5C82 C9            [10]  200 ret
                            201 
   5C83                     202 entityman_init_level6:
   5C83 21 C1 5A      [10]  203 	ld hl, #Rock
   5C86 CD 5A 5D      [17]  204 	call entityman_valores_rock
   5C89 21 C1 5A      [10]  205 	ld hl, #Rock
   5C8C CD 27 5D      [17]  206     call entityman_create
                            207 
   5C8F 21 D1 5A      [10]  208     ld hl, #SpiderR
   5C92 CD AC 5D      [17]  209 	call entityman_valores_spider
   5C95 21 D1 5A      [10]  210 	ld hl, #SpiderR
   5C98 CD 27 5D      [17]  211     call entityman_create
                            212 
   5C9B 21 E1 5A      [10]  213     ld hl, #SpiderL
   5C9E CD AC 5D      [17]  214     call entityman_valores_spider
   5CA1 21 E1 5A      [10]  215     ld hl, #SpiderL
   5CA4 CD 27 5D      [17]  216     call entityman_create
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 89.
Hexadecimal [16-Bits]



   5CA7 C9            [10]  217 ret
                            218 
   5CA8                     219 entityman_init_level7:
   5CA8 21 C1 5A      [10]  220 	ld hl, #Rock
   5CAB CD 5A 5D      [17]  221 	call entityman_valores_rock
   5CAE 21 C1 5A      [10]  222 	ld hl, #Rock
   5CB1 CD 27 5D      [17]  223     call entityman_create
                            224 
   5CB4 21 F1 5A      [10]  225     ld hl, #Aguila
   5CB7 CD BE 5D      [17]  226 	call entityman_valores_Aguila
   5CBA 21 F1 5A      [10]  227 	ld hl, #Aguila
   5CBD CD 27 5D      [17]  228     call entityman_create
                            229 
   5CC0 21 D1 5A      [10]  230     ld hl, #SpiderR
   5CC3 CD AC 5D      [17]  231 	call entityman_valores_spider
   5CC6 21 D1 5A      [10]  232 	ld hl, #SpiderR
   5CC9 CD 27 5D      [17]  233     call entityman_create
                            234 
   5CCC 21 E1 5A      [10]  235     ld hl, #SpiderL
   5CCF CD AC 5D      [17]  236     call entityman_valores_spider
   5CD2 21 E1 5A      [10]  237     ld hl, #SpiderL
   5CD5 CD 27 5D      [17]  238     call entityman_create
   5CD8 C9            [10]  239 ret
                            240 
   5CD9                     241 entityman_init::
                            242 	;;Creamos el espacio para el array y el numero de entidades
   5CD9 21 B1 5A      [10]  243 	ld hl, #Player
   5CDC CD 27 5D      [17]  244     call entityman_create
                            245 
   5CDF 21 01 5B      [10]  246     ld hl, #Clock
   5CE2 CD 27 5D      [17]  247     call entityman_create
                            248 
                            249 ;;    ld hl, #Queso
                            250 ;;	call entityman_valores_queso
                            251 ;;    ld hl, #Queso
                            252 ;;    call entityman_create
                            253  
   5CE5 21 21 5B      [10]  254     ld hl, #Life
   5CE8 CD 27 5D      [17]  255     call entityman_create
                            256 
                            257 
   5CEB CD 34 6E      [17]  258     call render_getNivel_A
   5CEE FE 00         [ 7]  259     cp #0
   5CF0 28 18         [12]  260     jr z, crear_nivel_1
                            261 
   5CF2 FE 01         [ 7]  262     cp #1
   5CF4 28 18         [12]  263     jr z, crear_nivel_2
                            264 
   5CF6 FE 02         [ 7]  265     cp #2
   5CF8 28 18         [12]  266     jr z, crear_nivel_3
                            267 
   5CFA FE 03         [ 7]  268     cp #3
   5CFC 28 18         [12]  269     jr z, crear_nivel_4
                            270 
   5CFE FE 04         [ 7]  271     cp #4
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 90.
Hexadecimal [16-Bits]



   5D00 28 18         [12]  272     jr z, crear_nivel_5
                            273 
   5D02 FE 05         [ 7]  274     cp #5
   5D04 28 18         [12]  275     jr z, crear_nivel_6
                            276 
   5D06 FE 06         [ 7]  277     cp #6
   5D08 28 18         [12]  278     jr z, crear_nivel_7
                            279 
   5D0A                     280     crear_nivel_1:
   5D0A CD 06 5C      [17]  281     	call entityman_init_level1
   5D0D C9            [10]  282     	ret
                            283 
   5D0E                     284     crear_nivel_2:
   5D0E CD 13 5C      [17]  285     	call entityman_init_level2
   5D11 C9            [10]  286     	ret
                            287 
   5D12                     288     crear_nivel_3:
   5D12 CD 20 5C      [17]  289     	call entityman_init_level3
   5D15 C9            [10]  290     	ret
                            291 
   5D16                     292     crear_nivel_4:
   5D16 CD 45 5C      [17]  293     	call entityman_init_level4
   5D19 C9            [10]  294     	ret
                            295 
   5D1A                     296     crear_nivel_5:
   5D1A CD 5E 5C      [17]  297     	call entityman_init_level5
   5D1D C9            [10]  298     	ret
                            299 
   5D1E                     300     crear_nivel_6:
   5D1E CD 83 5C      [17]  301     	call entityman_init_level6
   5D21 C9            [10]  302     	ret
                            303 
   5D22                     304     crear_nivel_7:
   5D22 CD A8 5C      [17]  305     	call entityman_init_level7
   5D25 C9            [10]  306     	ret
   5D26 C9            [10]  307 ret
                            308 
                            309 
                            310 ;;Crear una nueva entidad
                            311 ;; HL - Datos de la nueva entidad a crear
   5D27                     312 entityman_create::
                            313 	;;Loads info of array
   5D27 ED 5B 42 5B   [20]  314 	ld 		de, (_last_entity_ptr) ;;Con () carga los datos de la posicion de memoria
   5D2B 01 10 00      [10]  315 	ld 		bc, #entity_size
   5D2E ED B0         [21]  316 	ldir                           ;;Intercambia lo que hay en DE por lo que hay en HL
                            317 
                            318 	;;Increments num_entities
   5D30 3A 41 5B      [13]  319 	ld 		a, (_num_entities)
   5D33 3C            [ 4]  320 	inc   	a
   5D34 32 41 5B      [13]  321 	ld 		(_num_entities), a
                            322 
                            323 	;;Updates ptr of last entity
   5D37 2A 42 5B      [16]  324 	ld 		hl, (_last_entity_ptr)
   5D3A 01 10 00      [10]  325 	ld 		bc, #entity_size
   5D3D 09            [11]  326 	add   	hl, bc
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 91.
Hexadecimal [16-Bits]



   5D3E 22 42 5B      [16]  327 	ld 		(_last_entity_ptr), hl
   5D41 C9            [10]  328 ret
                            329 
                            330 
                            331 ;;Decrementar el numero de entidades cuando borramos una entidad y llamar al metodo de destruir entidad
   5D42                     332 entityman_check_delete:
                            333 	;;Decrements num_entities
   5D42 3A 41 5B      [13]  334 	ld 		a, (_num_entities)
   5D45 3D            [ 4]  335 	dec   	a
   5D46 32 41 5B      [13]  336 	ld 		(_num_entities), a
                            337 
   5D49 CD B1 60      [17]  338 	call entityman_destroy
   5D4C C9            [10]  339 ret
                            340 
                            341 ;;Obtener valores random para la posicion X de las entidades creadas
                            342 ;;La funcion de random modifica HL, por eso pusheamos HL antes de llamar a la funcion
   5D4D                     343 entityman_valores_queso:
   5D4D E5            [11]  344 	push hl
                            345 
   5D4E                     346 	pedir_numero_xQ:
   5D4E CD 53 7D      [17]  347 		call cpct_getRandom_xsp40_u8_asm
   5D51 FE 20         [ 7]  348 		cp #32
   5D53 30 F9         [12]  349 		jr nc, pedir_numero_xQ
   5D55 C6 04         [ 7]  350 		add #4
                            351 
   5D57 E1            [10]  352 	pop hl
   5D58 77            [ 7]  353 	ld (hl), a
   5D59 C9            [10]  354 ret
                            355 
                            356 
                            357 ;;Obtener valores random para la posicion X y la VY de las entidades creadas
                            358 ;;La funcion de random modifica HL, por eso pusheamos HL antes de llamar a la funcion
   5D5A                     359 entityman_valores_rock:
   5D5A E5            [11]  360 	push hl
                            361 
   5D5B                     362 	pedir_numero_x:
   5D5B CD 53 7D      [17]  363 		call cpct_getRandom_xsp40_u8_asm
   5D5E FE 0C         [ 7]  364 		cp #12
   5D60 30 F9         [12]  365 		jr nc, pedir_numero_x
   5D62 C6 FA         [ 7]  366 		add #-6
                            367 
   5D64 CD C4 5B      [17]  368 	call entityman_getEntityArray_IX
   5D67 DD 86 00      [19]  369 	add a, 0(ix)  ;;sumar posicion x jugador
                            370 
   5D6A E1            [10]  371 	pop hl
   5D6B 77            [ 7]  372 	ld (hl), a
                            373 
   5D6C 23            [ 6]  374 	inc hl
   5D6D 23            [ 6]  375 	inc hl 
   5D6E 23            [ 6]  376 	inc hl 
   5D6F 23            [ 6]  377 	inc hl
                            378 	;;incrementamos HL en 4 para pasar de X a VY (X-Y-W-H-VY)
                            379 
   5D70 E5            [11]  380 	push hl 
                            381 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 92.
Hexadecimal [16-Bits]



                            382 
   5D71 CD 34 6E      [17]  383 	call render_getNivel_A
   5D74 FE 02         [ 7]  384 	cp #2
   5D76 28 19         [12]  385 	jr z, pedir_numero_vy1
   5D78 FA 91 5D      [10]  386 	jp m, pedir_numero_vy1
                            387 
   5D7B CD 34 6E      [17]  388 	call render_getNivel_A
   5D7E FE 04         [ 7]  389 	cp #4
   5D80 28 1B         [12]  390 	jr z, pedir_numero_vy2
   5D82 FA 9D 5D      [10]  391 	jp m, pedir_numero_vy2
                            392 
                            393 
   5D85 CD 53 7D      [17]  394 	call cpct_getRandom_xsp40_u8_asm
   5D88 FE 0A         [ 7]  395 	cp #10
   5D8A 30 05         [12]  396 	jr nc, pedir_numero_vy1
   5D8C C6 06         [ 7]  397 	add #6
                            398 
   5D8E C3 A9 5D      [10]  399 	jp saltar_roca
                            400 
   5D91                     401 	pedir_numero_vy1:
   5D91 CD 53 7D      [17]  402 		call cpct_getRandom_xsp40_u8_asm
   5D94 FE 04         [ 7]  403 		cp #4
   5D96 30 F9         [12]  404 		jr nc, pedir_numero_vy1
   5D98 C6 02         [ 7]  405 		add #2
                            406 
   5D9A C3 A9 5D      [10]  407 		jp saltar_roca
                            408 
   5D9D                     409 	pedir_numero_vy2:
   5D9D CD 53 7D      [17]  410 		call cpct_getRandom_xsp40_u8_asm
   5DA0 FE 08         [ 7]  411 		cp #8
   5DA2 30 F9         [12]  412 		jr nc, pedir_numero_vy2
   5DA4 C6 04         [ 7]  413 		add #4
                            414 
   5DA6 C3 A9 5D      [10]  415 		jp saltar_roca
                            416 
   5DA9                     417 	saltar_roca:
   5DA9 E1            [10]  418 	pop hl
   5DAA 77            [ 7]  419 	ld (hl), a
   5DAB C9            [10]  420 ret
                            421 
                            422 ;;Obtener valores random para la Y de las entidades creadas
                            423 ;;La funcion de random modifica HL, por eso pusheamos HL antes de llamar a la funcion
   5DAC                     424 entityman_valores_spider:
                            425 
   5DAC 23            [ 6]  426 	inc hl
   5DAD 23            [ 6]  427 	inc hl 
   5DAE 23            [ 6]  428 	inc hl 
   5DAF 23            [ 6]  429 	inc hl 
   5DB0 23            [ 6]  430 	inc hl
                            431 	;;incrementamos HL en 5 para pasar de X a Y (X-Y-W-H-VY-Color)
                            432 
   5DB1 E5            [11]  433 	push hl 
                            434 
   5DB2                     435 	pedir_numero_y:
   5DB2 CD 53 7D      [17]  436 		call cpct_getRandom_xsp40_u8_asm
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 93.
Hexadecimal [16-Bits]



   5DB5 FE 64         [ 7]  437 		cp #100
   5DB7 30 F9         [12]  438 		jr nc, pedir_numero_y
   5DB9 C6 28         [ 7]  439 		add #40
                            440 
   5DBB E1            [10]  441 	pop hl
   5DBC 77            [ 7]  442 	ld (hl), a
   5DBD C9            [10]  443 ret
                            444 
                            445 ;;Obtener valores random para la posicion X y la VX de las entidades creadas
                            446 ;;La funcion de random modifica HL, por eso pusheamos HL antes de llamar a la funcion
   5DBE                     447 entityman_valores_Aguila:
   5DBE E5            [11]  448 	push hl
                            449 
   5DBF                     450 	pedir_numero_xA:
   5DBF CD 53 7D      [17]  451 		call cpct_getRandom_xsp40_u8_asm
   5DC2 FE 20         [ 7]  452 		cp #32
   5DC4 30 F9         [12]  453 		jr nc, pedir_numero_xA
   5DC6 C6 04         [ 7]  454 		add #4
                            455 
   5DC8 E1            [10]  456 	pop hl
   5DC9 77            [ 7]  457 	ld (hl), a
                            458 
   5DCA 23            [ 6]  459 	inc hl
   5DCB 23            [ 6]  460 	inc hl 
   5DCC 23            [ 6]  461 	inc hl 
   5DCD 23            [ 6]  462 	inc hl
   5DCE 23            [ 6]  463 	inc hl
   5DCF 23            [ 6]  464 	inc hl
   5DD0 23            [ 6]  465 	inc hl 
   5DD1 23            [ 6]  466 	inc hl 
   5DD2 23            [ 6]  467 	inc hl
   5DD3 23            [ 6]  468 	inc hl
   5DD4 23            [ 6]  469 	inc hl
   5DD5 23            [ 6]  470 	inc hl 
   5DD6 23            [ 6]  471 	inc hl 
   5DD7 23            [ 6]  472 	inc hl
   5DD8 23            [ 6]  473 	inc hl
                            474 	;;incrementamos HL en 15 para pasar de X a VY (X-Y-W-H-VY-Color-MSys-MType-lx-ly-sb1-sa1-sb2-sa2-cont-VX)
                            475 
   5DD9 E5            [11]  476 	push hl 
                            477 
                            478 
   5DDA                     479 	pedir_numero_vxA:
   5DDA CD 53 7D      [17]  480 		call cpct_getRandom_xsp40_u8_asm
   5DDD FE 7D         [ 7]  481 		cp #125
   5DDF FA 05 5E      [10]  482 		jp m, vel_neg
                            483 
   5DE2 CD 34 6E      [17]  484 	call render_getNivel_A
   5DE5 FE 02         [ 7]  485 	cp #2
   5DE7 28 12         [12]  486 	jr z, vel_pos1
   5DE9 FA FB 5D      [10]  487 	jp m, vel_pos1
                            488 
   5DEC CD 34 6E      [17]  489 	call render_getNivel_A
   5DEF FE 04         [ 7]  490 	cp #4
   5DF1 28 0D         [12]  491 	jr z, vel_pos2
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 94.
Hexadecimal [16-Bits]



   5DF3 FA 00 5E      [10]  492 	jp m, vel_pos2
                            493 
   5DF6 3E 03         [ 7]  494 	ld a, #3
   5DF8 C3 28 5E      [10]  495 	jp pop_aguila
                            496 
   5DFB                     497 	vel_pos1:
   5DFB 3E 01         [ 7]  498 		ld a, #1
   5DFD C3 28 5E      [10]  499 		jp pop_aguila
                            500 
   5E00                     501 	vel_pos2:
   5E00 3E 02         [ 7]  502 		ld a, #2
   5E02 C3 28 5E      [10]  503 		jp pop_aguila
                            504 
                            505 
   5E05                     506 	vel_neg:
   5E05 CD 34 6E      [17]  507 		call render_getNivel_A
   5E08 FE 02         [ 7]  508 		cp #2
   5E0A 28 12         [12]  509 		jr z, vel_neg1
   5E0C FA 1E 5E      [10]  510 		jp m, vel_neg1
                            511 
   5E0F CD 34 6E      [17]  512 		call render_getNivel_A
   5E12 FE 04         [ 7]  513 		cp #4
   5E14 28 0D         [12]  514 		jr z, vel_neg2
   5E16 FA 23 5E      [10]  515 		jp m, vel_neg2
                            516 
   5E19 3E FD         [ 7]  517 		ld a, #-3
   5E1B C3 28 5E      [10]  518 		jp pop_aguila
                            519 
   5E1E                     520 		vel_neg1:
   5E1E 3E FF         [ 7]  521 			ld a, #-1
   5E20 C3 28 5E      [10]  522 			jp pop_aguila
                            523 
   5E23                     524 		vel_neg2:
   5E23 3E FE         [ 7]  525 			ld a, #-2
   5E25 C3 28 5E      [10]  526 			jp pop_aguila
                            527 
   5E28                     528 	pop_aguila:
   5E28 E1            [10]  529 		pop hl
   5E29 77            [ 7]  530 		ld (hl), a
   5E2A C9            [10]  531 ret
                            532 
   5E2B                     533 actualizar_reloj_entities:
   5E2B 3A AB 5A      [13]  534 	ld a, (relojitoEntities)
   5E2E 3C            [ 4]  535 	inc a 
   5E2F 32 AB 5A      [13]  536 	ld (relojitoEntities), a
   5E32 C9            [10]  537 ret
                            538 
   5E33                     539 check_queso:
   5E33 3A B0 5A      [13]  540 	ld a, (generoqueso)
   5E36 FE 00         [ 7]  541 	cp #0
   5E38 C8            [11]  542 	ret z
                            543 
   5E39 21 11 5B      [10]  544 	ld hl, #Queso
   5E3C CD 4D 5D      [17]  545 	call entityman_valores_queso
   5E3F 21 11 5B      [10]  546 	ld hl, #Queso
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 95.
Hexadecimal [16-Bits]



   5E42 CD 27 5D      [17]  547 	call entityman_create
                            548 
   5E45 3E 00         [ 7]  549 	ld a, #0
   5E47 32 B0 5A      [13]  550 	ld (generoqueso), a
   5E4A C9            [10]  551 ret
                            552 
   5E4B                     553 entityman_generator_level1:
   5E4B CD 53 7D      [17]  554 	call cpct_getRandom_xsp40_u8_asm
   5E4E FE 0F         [ 7]  555 	cp #15
   5E50 FA 60 5E      [10]  556 	jp m, crear_queso_level1
                            557 
                            558 	;;crear rocas conforme se vayan borrando
   5E53 21 C1 5A      [10]  559 	ld hl, #Rock
   5E56 CD 5A 5D      [17]  560 	call entityman_valores_rock
   5E59 21 C1 5A      [10]  561 	ld hl, #Rock
   5E5C CD 27 5D      [17]  562 	call entityman_create
                            563 
   5E5F C9            [10]  564 	ret 
                            565 
   5E60                     566 	crear_queso_level1:
   5E60 CD F8 67      [17]  567 		call life_getLifes_A
   5E63 FE 33         [ 7]  568 		cp #51
   5E65 C8            [11]  569 		ret z
                            570 
   5E66 CD 33 5E      [17]  571 		call check_queso
   5E69 C9            [10]  572 ret
                            573 
   5E6A                     574 entityman_generator_level2:
   5E6A CD 53 7D      [17]  575 	call cpct_getRandom_xsp40_u8_asm
   5E6D FE 0F         [ 7]  576 	cp #15
   5E6F FA 7F 5E      [10]  577 	jp m, crear_queso_level2
                            578 
                            579 
   5E72 21 F1 5A      [10]  580 	ld hl, #Aguila
   5E75 CD BE 5D      [17]  581 	call entityman_valores_Aguila
   5E78 21 F1 5A      [10]  582 	ld hl, #Aguila
   5E7B CD 27 5D      [17]  583 	call entityman_create
                            584 
   5E7E C9            [10]  585 	ret 
                            586 
   5E7F                     587 	crear_queso_level2:
   5E7F CD F8 67      [17]  588 		call life_getLifes_A
   5E82 FE 33         [ 7]  589 		cp #51
   5E84 C8            [11]  590 		ret z
                            591 
   5E85 CD 33 5E      [17]  592 		call check_queso
   5E88 C9            [10]  593 ret
                            594 
   5E89                     595 entityman_generator_level3:
   5E89 CD 53 7D      [17]  596 	call cpct_getRandom_xsp40_u8_asm
   5E8C FE 0F         [ 7]  597 	cp #15
   5E8E FA C8 5E      [10]  598 	jp m, crear_queso_level3
                            599 
   5E91 CD 53 7D      [17]  600 	call cpct_getRandom_xsp40_u8_asm
   5E94 FE FA         [ 7]  601 	cp #250
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 96.
Hexadecimal [16-Bits]



   5E96 FA BB 5E      [10]  602 	jp m, crear_rock_level3
                            603 
   5E99 CD 53 7D      [17]  604 	call cpct_getRandom_xsp40_u8_asm
   5E9C FE 7D         [ 7]  605 	cp #125
   5E9E FA AE 5E      [10]  606 	jp m, crear_spiderL_level3
                            607 
                            608 
   5EA1 21 D1 5A      [10]  609 	ld hl, #SpiderR
   5EA4 CD AC 5D      [17]  610 	call entityman_valores_spider
   5EA7 21 D1 5A      [10]  611 	ld hl, #SpiderR
   5EAA CD 27 5D      [17]  612 	call entityman_create
                            613 
   5EAD C9            [10]  614 	ret 
                            615 
   5EAE                     616 	crear_spiderL_level3:
   5EAE 21 E1 5A      [10]  617 		ld hl, #SpiderL
   5EB1 CD AC 5D      [17]  618 		call entityman_valores_spider
   5EB4 21 E1 5A      [10]  619 		ld hl, #SpiderL
   5EB7 CD 27 5D      [17]  620 	    call entityman_create
                            621 
   5EBA C9            [10]  622 	    ret
                            623 
   5EBB                     624     crear_rock_level3:
   5EBB 21 C1 5A      [10]  625 	    ld hl, #Rock
   5EBE CD 5A 5D      [17]  626 		call entityman_valores_rock
   5EC1 21 C1 5A      [10]  627 		ld hl, #Rock
   5EC4 CD 27 5D      [17]  628 		call entityman_create
                            629 
   5EC7 C9            [10]  630 		ret 
                            631 
   5EC8                     632 	crear_queso_level3:
   5EC8 CD F8 67      [17]  633 		call life_getLifes_A
   5ECB FE 33         [ 7]  634 		cp #51
   5ECD C8            [11]  635 		ret z
                            636 
   5ECE CD 33 5E      [17]  637 		call check_queso
   5ED1 C9            [10]  638 ret
                            639 
   5ED2                     640 entityman_generator_level4:
   5ED2 CD 53 7D      [17]  641 	call cpct_getRandom_xsp40_u8_asm
   5ED5 FE 0F         [ 7]  642 	cp #15
   5ED7 FA FC 5E      [10]  643 	jp m, crear_queso_level4
                            644 
   5EDA CD 53 7D      [17]  645 	call cpct_getRandom_xsp40_u8_asm
   5EDD FE 7D         [ 7]  646 	cp #125
   5EDF FA EF 5E      [10]  647 	jp m, crear_aguilas_level4
                            648 
   5EE2 21 C1 5A      [10]  649 	ld hl, #Rock
   5EE5 CD 5A 5D      [17]  650 	call entityman_valores_rock
   5EE8 21 C1 5A      [10]  651 	ld hl, #Rock
   5EEB CD 27 5D      [17]  652 	call entityman_create
                            653 
   5EEE C9            [10]  654 	ret 
                            655 
   5EEF                     656 	crear_aguilas_level4:
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 97.
Hexadecimal [16-Bits]



   5EEF 21 F1 5A      [10]  657 		ld hl, #Aguila
   5EF2 CD BE 5D      [17]  658 		call entityman_valores_Aguila
   5EF5 21 F1 5A      [10]  659 		ld hl, #Aguila
   5EF8 CD 27 5D      [17]  660 		call entityman_create
                            661 
   5EFB C9            [10]  662 		ret 
                            663 
   5EFC                     664 	crear_queso_level4:
   5EFC CD F8 67      [17]  665 		call life_getLifes_A
   5EFF FE 33         [ 7]  666 		cp #51
   5F01 C8            [11]  667 		ret z
                            668 
   5F02 CD 33 5E      [17]  669 		call check_queso
   5F05 C9            [10]  670 ret
                            671 
   5F06                     672 entityman_generator_level5:
   5F06 CD 53 7D      [17]  673 	call cpct_getRandom_xsp40_u8_asm
   5F09 FE 0F         [ 7]  674 	cp #15
   5F0B FA 45 5F      [10]  675 	jp m, crear_queso_level5
                            676 
   5F0E CD 53 7D      [17]  677 	call cpct_getRandom_xsp40_u8_asm
   5F11 FE FA         [ 7]  678 	cp #250
   5F13 FA 38 5F      [10]  679 	jp m, crear_aquilas_level5
                            680 
   5F16 CD 53 7D      [17]  681 	call cpct_getRandom_xsp40_u8_asm
   5F19 FE 7D         [ 7]  682 	cp #125
   5F1B FA 2B 5F      [10]  683 	jp m, crear_spiderL_level5
                            684 
                            685 
   5F1E 21 D1 5A      [10]  686 	ld hl, #SpiderR
   5F21 CD AC 5D      [17]  687     call entityman_valores_spider
   5F24 21 D1 5A      [10]  688     ld hl, #SpiderR
   5F27 CD 27 5D      [17]  689     call entityman_create
                            690 
   5F2A C9            [10]  691 	ret 
                            692 
   5F2B                     693 	crear_spiderL_level5:
   5F2B 21 E1 5A      [10]  694 		ld hl, #SpiderL
   5F2E CD AC 5D      [17]  695 		call entityman_valores_spider
   5F31 21 E1 5A      [10]  696 		ld hl, #SpiderL
   5F34 CD 27 5D      [17]  697 	    call entityman_create
                            698 
   5F37 C9            [10]  699 	    ret
                            700 
   5F38                     701     crear_aquilas_level5:
   5F38 21 F1 5A      [10]  702 	    ld hl, #Aguila
   5F3B CD BE 5D      [17]  703 		call entityman_valores_Aguila
   5F3E 21 F1 5A      [10]  704 		ld hl, #Aguila
   5F41 CD 27 5D      [17]  705 		call entityman_create
                            706 
   5F44 C9            [10]  707 		ret 
                            708 
   5F45                     709 	crear_queso_level5:
   5F45 CD F8 67      [17]  710 		call life_getLifes_A
   5F48 FE 33         [ 7]  711 		cp #51
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 98.
Hexadecimal [16-Bits]



   5F4A C8            [11]  712 		ret z
                            713 
   5F4B CD 33 5E      [17]  714 		call check_queso
   5F4E C9            [10]  715 ret
                            716 
   5F4F                     717 entityman_generator_level6:
   5F4F CD 53 7D      [17]  718 	call cpct_getRandom_xsp40_u8_asm
   5F52 FE 0F         [ 7]  719 	cp #15
   5F54 FA 8E 5F      [10]  720 	jp m, crear_queso_level6
                            721 
   5F57 CD 53 7D      [17]  722 	call cpct_getRandom_xsp40_u8_asm
   5F5A FE FA         [ 7]  723 	cp #250
   5F5C FA 81 5F      [10]  724 	jp m, crear_rock_level6
                            725 
   5F5F CD 53 7D      [17]  726 	call cpct_getRandom_xsp40_u8_asm
   5F62 FE 7D         [ 7]  727 	cp #125
   5F64 FA 74 5F      [10]  728 	jp m, crear_spiderL_level6
                            729 
                            730 	
   5F67 21 D1 5A      [10]  731 	ld hl, #SpiderR
   5F6A CD AC 5D      [17]  732     call entityman_valores_spider
   5F6D 21 D1 5A      [10]  733     ld hl, #SpiderR
   5F70 CD 27 5D      [17]  734     call entityman_create
                            735     
                            736 
   5F73 C9            [10]  737 	ret 
                            738 
   5F74                     739 	crear_spiderL_level6:
   5F74 21 E1 5A      [10]  740 		ld hl, #SpiderL
   5F77 CD AC 5D      [17]  741 		call entityman_valores_spider
   5F7A 21 E1 5A      [10]  742 		ld hl, #SpiderL
   5F7D CD 27 5D      [17]  743 	    call entityman_create
                            744 
   5F80 C9            [10]  745 	    ret
                            746 
   5F81                     747     crear_rock_level6:
   5F81 21 C1 5A      [10]  748 	    ld hl, #Rock
   5F84 CD 5A 5D      [17]  749 		call entityman_valores_rock
   5F87 21 C1 5A      [10]  750 		ld hl, #Rock
   5F8A CD 27 5D      [17]  751 		call entityman_create
                            752 
   5F8D C9            [10]  753 		ret 
                            754 
   5F8E                     755 	crear_queso_level6:
   5F8E CD F8 67      [17]  756 		call life_getLifes_A
   5F91 FE 33         [ 7]  757 		cp #51
   5F93 C8            [11]  758 		ret z
                            759 
   5F94 CD 33 5E      [17]  760 		call check_queso
   5F97 C9            [10]  761 ret
                            762 
   5F98                     763 entityman_generator_level7:
   5F98 CD 53 7D      [17]  764 	call cpct_getRandom_xsp40_u8_asm
   5F9B FE 0F         [ 7]  765 	cp #15
   5F9D FA EC 5F      [10]  766 	jp m, crear_queso_level7
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 99.
Hexadecimal [16-Bits]



                            767 
   5FA0 CD 53 7D      [17]  768 	call cpct_getRandom_xsp40_u8_asm
   5FA3 FE 7D         [ 7]  769 	cp #125
   5FA5 FA DF 5F      [10]  770 	jp m, crear_rock_level7
                            771 
   5FA8 CD 53 7D      [17]  772 	call cpct_getRandom_xsp40_u8_asm
   5FAB FE FA         [ 7]  773 	cp #250
   5FAD FA C5 5F      [10]  774 	jp m, crear_aguilas_level7
                            775 
   5FB0 CD 53 7D      [17]  776 	call cpct_getRandom_xsp40_u8_asm
   5FB3 FE 1E         [ 7]  777 	cp #30
   5FB5 FA D2 5F      [10]  778 	jp m, crear_spiderL_level7
                            779 
                            780 
   5FB8 21 D1 5A      [10]  781 	ld hl, #SpiderR
   5FBB CD AC 5D      [17]  782     call entityman_valores_spider
   5FBE 21 D1 5A      [10]  783     ld hl, #SpiderR
   5FC1 CD 27 5D      [17]  784     call entityman_create
                            785 
   5FC4 C9            [10]  786 	ret 
                            787 
   5FC5                     788 	crear_aguilas_level7:
   5FC5 21 F1 5A      [10]  789 		ld hl, #Aguila
   5FC8 CD BE 5D      [17]  790 		call entityman_valores_Aguila
   5FCB 21 F1 5A      [10]  791 		ld hl, #Aguila
   5FCE CD 27 5D      [17]  792 		call entityman_create
                            793 
   5FD1 C9            [10]  794 		ret 
                            795 
                            796 
   5FD2                     797 	crear_spiderL_level7:
   5FD2 21 E1 5A      [10]  798 		ld hl, #SpiderL
   5FD5 CD AC 5D      [17]  799 		call entityman_valores_spider
   5FD8 21 E1 5A      [10]  800 		ld hl, #SpiderL
   5FDB CD 27 5D      [17]  801 	    call entityman_create
                            802 
   5FDE C9            [10]  803 	    ret
                            804 
   5FDF                     805     crear_rock_level7:
   5FDF 21 C1 5A      [10]  806 	    ld hl, #Rock
   5FE2 CD 5A 5D      [17]  807 		call entityman_valores_rock
   5FE5 21 C1 5A      [10]  808 		ld hl, #Rock
   5FE8 CD 27 5D      [17]  809 		call entityman_create
                            810 
   5FEB C9            [10]  811 		ret 
                            812 
   5FEC                     813 	crear_queso_level7:
   5FEC CD F8 67      [17]  814 		call life_getLifes_A
   5FEF FE 33         [ 7]  815 		cp #51
   5FF1 C8            [11]  816 		ret z
                            817 
   5FF2 CD 33 5E      [17]  818 		call check_queso
   5FF5 C9            [10]  819 ret
                            820 
   5FF6                     821 change_generoentidades::
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 100.
Hexadecimal [16-Bits]



   5FF6 3E 00         [ 7]  822 	ld a, #0
   5FF8 32 AE 5A      [13]  823 	ld (generoentidades), a
   5FFB C9            [10]  824 ret
                            825 
                            826 
                            827 
                            828 ;;Comprobar que hay espacio para crear una nueva entidad y crearla a partir de una plantilla
   5FFC                     829 entityman_generator:
   5FFC 3A 41 5B      [13]  830 	ld a, (_num_entities)
   5FFF FE 08         [ 7]  831 	cp #max_entities
   6001 C8            [11]  832 	ret z
                            833 
                            834 	;;comprobar variable de generar entidades
   6002 3A AE 5A      [13]  835 	ld a, (generoentidades)
   6005 FE 00         [ 7]  836 	cp #0
   6007 CA 45 60      [10]  837 	jp z, check_queso_sagrado
                            838 
   600A CD 34 6E      [17]  839 	call render_getNivel_A
   600D FE 00         [ 7]  840     cp #0
   600F 28 18         [12]  841     jr z, generator_nivel_1
                            842 
   6011 FE 01         [ 7]  843     cp #1
   6013 28 18         [12]  844     jr z, generator_nivel_2
                            845 
   6015 FE 02         [ 7]  846     cp #2
   6017 28 18         [12]  847     jr z, generator_nivel_3
                            848 
   6019 FE 03         [ 7]  849     cp #3
   601B 28 18         [12]  850     jr z, generator_nivel_4
                            851 
   601D FE 04         [ 7]  852     cp #4
   601F 28 18         [12]  853     jr z, generator_nivel_5
                            854 
   6021 FE 05         [ 7]  855     cp #5
   6023 28 18         [12]  856     jr z, generator_nivel_6
                            857 
   6025 FE 06         [ 7]  858     cp #6
   6027 28 18         [12]  859     jr z, generator_nivel_7
                            860 
   6029                     861     generator_nivel_1:
   6029 CD 4B 5E      [17]  862     	call entityman_generator_level1
   602C C9            [10]  863     	ret
                            864 
   602D                     865     generator_nivel_2:
   602D CD 6A 5E      [17]  866     	call entityman_generator_level2
   6030 C9            [10]  867     	ret
                            868 
   6031                     869     generator_nivel_3:
   6031 CD 89 5E      [17]  870     	call entityman_generator_level3
   6034 C9            [10]  871     	ret
                            872 
   6035                     873     generator_nivel_4:
   6035 CD D2 5E      [17]  874     	call entityman_generator_level4
   6038 C9            [10]  875     	ret
                            876 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 101.
Hexadecimal [16-Bits]



   6039                     877     generator_nivel_5:
   6039 CD 06 5F      [17]  878     	call entityman_generator_level5
   603C C9            [10]  879     	ret
                            880 
   603D                     881     generator_nivel_6:
   603D CD 4F 5F      [17]  882     	call entityman_generator_level6
   6040 C9            [10]  883     	ret
                            884 
   6041                     885     generator_nivel_7:
   6041 CD 98 5F      [17]  886     	call entityman_generator_level7
   6044 C9            [10]  887     	ret
                            888 
   6045                     889     check_queso_sagrado:
   6045 CD 34 6E      [17]  890     	call render_getNivel_A
   6048 FE 06         [ 7]  891     	cp #6
   604A 20 12         [12]  892     	jr nz, no_creo_quesito
                            893 
   604C 3A AF 5A      [13]  894     	ld a, (quesogenerado)
   604F FE 00         [ 7]  895     	cp #0
   6051 28 0B         [12]  896     	jr z, no_creo_quesito
                            897 
   6053 21 31 5B      [10]  898     	ld hl, #Queso_Sagrado
   6056 CD 27 5D      [17]  899     	call entityman_create
                            900 
   6059 3E 00         [ 7]  901     	ld a, #0
   605B 32 AF 5A      [13]  902     	ld (quesogenerado), a
                            903 
   605E                     904     	no_creo_quesito:
   605E C9            [10]  905 ret
                            906 
                            907 
                            908 ;;Actualizar entidades que tienen que ser borradas
   605F                     909 entityman_update::
   605F CD 2B 5E      [17]  910 	call actualizar_reloj_entities
                            911 
   6062 F5            [11]  912 	push af
                            913 
   6063 CD 34 6E      [17]  914 	call render_getNivel_A
   6066 FE 02         [ 7]  915 	cp #2
   6068 28 12         [12]  916 	jr z, valor1
   606A FA 7C 60      [10]  917 	jp m, valor1
                            918 
   606D CD 34 6E      [17]  919 	call render_getNivel_A
   6070 FE 04         [ 7]  920 	cp #4
   6072 28 0D         [12]  921 	jr z, valor2
   6074 FA 81 60      [10]  922 	jp m, valor2
                            923 
   6077 06 08         [ 7]  924 	ld b, #0x08
   6079 C3 86 60      [10]  925 	jp salto_g
                            926 
   607C                     927 	valor1:
   607C 06 0A         [ 7]  928 		ld b, #0x0A
   607E C3 86 60      [10]  929 		jp salto_g
                            930 
   6081                     931 	valor2:
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 102.
Hexadecimal [16-Bits]



   6081 06 02         [ 7]  932 		ld b, #0x02
   6083 C3 86 60      [10]  933 		jp salto_g
                            934 
   6086                     935 	salto_g:
                            936 
   6086 F1            [10]  937 	pop af
                            938 
   6087 B8            [ 4]  939 	cp b
   6088 20 08         [12]  940 	jr nz, salto_no_generator
                            941 
   608A 3E 00         [ 7]  942 	ld a, #0x00
   608C 32 AB 5A      [13]  943 	ld (relojitoEntities), a
                            944 
                            945 
   608F CD FC 5F      [17]  946 	call entityman_generator
                            947 
   6092                     948 	salto_no_generator:
                            949 
   6092 CD C4 5B      [17]  950 	call entityman_getEntityArray_IX
   6095 CD C9 5B      [17]  951 	call entityman_getNumEntities_A
                            952 
   6098 47            [ 4]  953 	ld b, a ;;load b numentities
                            954 
   6099                     955 	_loop_muerte:
                            956 		;;Comparar si tiene mascara de Delete
                            957 
   6099 DD 7E 06      [19]  958 		ld a, 6(ix)
   609C E6 20         [ 7]  959 		and #Delete_masc
   609E FE 20         [ 7]  960 		cp #Delete_masc
                            961 
   60A0 20 05         [12]  962 		jr nz, no_morir
                            963 
   60A2 C5            [11]  964 		push bc
                            965 		;;Pusheamos bc porque entityman_check_delete lo modifica
                            966 
   60A3 CD 42 5D      [17]  967 		call entityman_check_delete
                            968 
   60A6 C1            [10]  969 		pop bc
                            970 
   60A7                     971 		no_morir:
                            972 
   60A7 05            [ 4]  973 		dec	b 	;;Dec numentities
   60A8 C8            [11]  974 		ret z
                            975 
   60A9 11 10 00      [10]  976 		ld de,	#entity_size
   60AC DD 19         [15]  977 		add	ix,	de
   60AE 18 E9         [12]  978 	jr _loop_muerte
   60B0 C9            [10]  979 ret
                            980 
   60B1                     981 entityman_destroy::
                            982 	;;Borrado de entidades y reordenacion del array
                            983 
                            984 	;;Modificamos el puntero a la ultima posicion libre para que ahora apunte a la ultima posicion ocupada
   60B1 2A 42 5B      [16]  985 	ld hl, (_last_entity_ptr)
   60B4 01 F0 FF      [10]  986 	ld bc, #-entity_size
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 103.
Hexadecimal [16-Bits]



   60B7 09            [11]  987 	add hl, bc
   60B8 22 42 5B      [16]  988 	ld (_last_entity_ptr), hl
                            989 
   0610                     990 	ld__a_ixl
   60BB DD 7D                 1    .dw #0x7DDD  ;; Opcode for ld a, ixl
   60BD 95            [ 4]  991 	sub l
                            992 
   60BE 20 05         [12]  993 	jr nz, _copiar
                            994 
   0615                     995 	ld__a_ixh
   60C0 DD 7C                 1    .dw #0x7CDD  ;; Opcode for ld a, ixh
   60C2 94            [ 4]  996 	sub h
                            997 
   60C3 28 09         [12]  998 	jr z, _no_copiar
                            999 
   60C5                    1000 	_copiar:
   061A                    1001 		ld__e_ixl
   60C5 DD 5D                 1    .dw #0x5DDD  ;; Opcode for ld e, ixl
   061C                    1002 		ld__d_ixh
   60C7 DD 54                 1    .dw #0x54DD  ;; Opcode for ld d, ixh
   60C9 01 10 00      [10] 1003 		ld bc, #entity_size
   60CC ED B0         [21] 1004 		ldir
                           1005 
   60CE                    1006 	_no_copiar:
   60CE 2A 42 5B      [16] 1007 		ld hl, (_last_entity_ptr)
   60D1 36 00         [10] 1008 		ld (hl), #0
                           1009 
   60D3 C9            [10] 1010 	ret
                           1011 
                           1012 ;;Funcion para comprobar si la entidad cumple el requisito de mascara y llamar a la funcion de HL
                           1013 ;;
                           1014 ;;HL = LLamada al metodo correspondiente
                           1015 ;; A = Mascara que indica el tipo a enviar
                           1016 ;;
                           1017 
   60D4                    1018 entityman_forall_matching::	
   60D4 4F            [ 4] 1019 	ld c, a                             ;;Saves Masc into C
                           1020 
   60D5 CD C4 5B      [17] 1021 	call entityman_getEntityArray_IX	;;Get the array in IX
   60D8 CD C9 5B      [17] 1022 	call entityman_getNumEntities_A		;;Get in A numentitites
                           1023 
   60DB 47            [ 4] 1024 	ld b, a 							;;Saves A into B
   60DC EB            [ 4] 1025 	ex de, hl 							;;Saves in DE the Llamada al metodo
                           1026 
   60DD                    1027 	_loop_matching:
   60DD DD 7E 06      [19] 1028 		ld a, 6(ix)			;;Saves Entity.Masc into A
   60E0 A1            [ 4] 1029 		and c 				;;And with Masc
   60E1 B9            [ 4] 1030 		cp  c 				;;Comapare A with masc
                           1031 
   60E2 D5            [11] 1032 		push de
   60E3 C5            [11] 1033 		push bc
                           1034 		;;Pusheamos DE y BC para que la funcion que viene en HL no modifique sus valores
                           1035 
   60E4 20 06         [12] 1036 		jr nz, saltar_hl	;;If != 0
                           1037 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 104.
Hexadecimal [16-Bits]



   60E6 21 EC 60      [10] 1038 		ld hl, #saltar_hl
   60E9 E5            [11] 1039 		push hl
                           1040 
   60EA EB            [ 4] 1041 		ex de, hl
                           1042 
   60EB E9            [ 4] 1043 		jp (hl)				;;Jumps to render_one_entity
                           1044 
   60EC                    1045 		saltar_hl:
                           1046 
   60EC C1            [10] 1047 		pop bc
   60ED D1            [10] 1048 		pop de
                           1049 
   60EE 05            [ 4] 1050 		dec	b 	;;Dec numentities
   60EF C8            [11] 1051 		ret z 	;;Si vale 0 se sale de la funcion, si no pues continua
                           1052 
   60F0 D5            [11] 1053 		push de
                           1054 		;;Pusheamos DE para no modificarlo con respecto al incremento de abajo
                           1055 
   60F1 11 10 00      [10] 1056 		ld de,	#entity_size
   60F4 DD 19         [15] 1057 		add	ix,	de
                           1058 
   60F6 D1            [10] 1059 		pop de
                           1060 
   60F7 18 E4         [12] 1061 	jr _loop_matching
   60F9 C9            [10] 1062 ret
                           1063 
                           1064 
                           1065 ;;Funcion para comprobar colisiones entre 2 entidades
                           1066 ;;
                           1067 ;;HL = LLamada al metodo correspondiente
                           1068 ;; A = Mascara que indica el tipo a enviar
                           1069 ;;
   60FA                    1070 entityman_forall_matching_pairs::
   60FA 4F            [ 4] 1071 	ld c, a                             ;;Saves Masc into C
                           1072 
   60FB CD C4 5B      [17] 1073 	call entityman_getEntityArray_IX	;;Get the array in IX
   60FE CD C9 5B      [17] 1074 	call entityman_getNumEntities_A		;;Get in A numentitites
                           1075 
   6101 47            [ 4] 1076 	ld b, a 							;;Saves A into B
                           1077 
   0657                    1078 	ld__iy_ix                           ;;Crea una copia de lo que hay en IX en IY
                              1    ;; LD IY, IX
                              2    ;;------------
   0657                       3    ld__a_ixl
   6102 DD 7D                 1    .dw #0x7DDD  ;; Opcode for ld a, ixl
   0659                       4    ld__iyl_a
   6104 FD 6F                 1    .dw #0x6FFD  ;; Opcode for ld iyl, a
   065B                       5    ld__a_ixh
   6106 DD 7C                 1    .dw #0x7CDD  ;; Opcode for ld a, ixh
   065D                       6    ld__iyh_a
   6108 FD 67                 1    .dw #0x67FD  ;; Opcode for ld iyh, a
                              7    ;;------------
                           1079 	;;Hacemos la copia, pero recorremos el bucle con ix 
                           1080 	;;porque sino no se actualizan bien los valores de las entidades borradas
                           1081 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 105.
Hexadecimal [16-Bits]



   610A C5            [11] 1082 	push bc
                           1083 
   610B 01 10 00      [10] 1084 	ld 	bc, #entity_size                ;;Hacer que IY apunte a la siguiente entidad para no comparar la misma
   610E DD 09         [15] 1085 	add ix,	bc
                           1086 
   6110 C1            [10] 1087 	pop bc
                           1088 
   6111 EB            [ 4] 1089 	ex de, hl 							;;Saves in DE the Llamada al metodo
                           1090 
   6112                    1091 	_loop_matching_pairs:
   6112 D5            [11] 1092 		push de
   6113 C5            [11] 1093 		push bc
                           1094 
                           1095 		;;Comprobar que la primera entidad es colisionable, sino ya no comprueba la segunda
   6114 DD 7E 06      [19] 1096 		ld a, 6(ix)			;;Saves Entity.Masc into A
   6117 A1            [ 4] 1097 		and c 				;;And with Masc
   6118 B9            [ 4] 1098 		cp  c 				;;Compare A with masc
                           1099 
   6119 20 0D         [12] 1100 		jr nz, saltar_hl_pairs	;;If != 0
                           1101 
                           1102 		;;Comprobar que la segunda y las siguientes (una cada vez) son colisionables
   611B FD 7E 06      [19] 1103 		ld a, 6(iy)         ;;Saves Entity.Masc into A
   611E A1            [ 4] 1104 		and c               ;;And with Masc
   611F B9            [ 4] 1105 		cp c                ;;Compare A with masc
   6120 20 06         [12] 1106 		jr nz, saltar_hl_pairs
                           1107 
                           1108 
   6122 21 28 61      [10] 1109 		ld hl, #saltar_hl_pairs
   6125 E5            [11] 1110 		push hl
                           1111 
   6126 EB            [ 4] 1112 		ex de, hl
                           1113 
   6127 E9            [ 4] 1114 		jp (hl)				;;Jumps to render_one_entity
                           1115 
   6128                    1116 		saltar_hl_pairs:
   6128 C1            [10] 1117 		pop bc
   6129 D1            [10] 1118 		pop de
                           1119 
   612A 05            [ 4] 1120 		dec	b 	;;Dec numentities
   612B C8            [11] 1121 		ret z 	;;Si vale 0 se sale de la funcion, si no pues continua
                           1122 
   612C D5            [11] 1123 		push de
                           1124 
   612D 11 10 00      [10] 1125 		ld de,	#entity_size
   6130 DD 19         [15] 1126 		add	ix,	de
                           1127 
   6132 D1            [10] 1128 		pop de
                           1129 
   6133 18 DD         [12] 1130 	jr _loop_matching_pairs
   6135 C9            [10] 1131 ret
                           1132 
                           1133 
                           1134 ;;Poner mascara de delete a la entidad cuando no se llama desde colision
   6136                    1135 entityman_set_for_destruction::
   6136 DD 7E 06      [19] 1136 	ld  a, 6(ix)
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 106.
Hexadecimal [16-Bits]



   6139 F6 20         [ 7] 1137 	or  #Delete_masc
   613B DD 77 06      [19] 1138 	ld  6(ix), a
   613E DD 36 05 00   [19] 1139 	ld  5(ix), #0x00
                           1140 
   6142 CD C9 70      [17] 1141 	call render_delete_entity
   6145 C9            [10] 1142 ret
                           1143 
                           1144 
                           1145 ;;
                           1146 ;;
                           1147 ;;
                           1148 ;;
                           1149 ;;
                           1150 ;;
                           1151 
   6146                    1152 change_sprite::
   6146 DD 7E 0E      [19] 1153 	ld a, 14(ix)
   6149 D6 01         [ 7] 1154 	sub #1
   614B 20 07         [12] 1155 	jr nz, cambio
                           1156 		
   614D 3E 02         [ 7] 1157 	ld a, #2
   614F DD 77 0E      [19] 1158 	ld 14(ix), a
   6152 18 05         [12] 1159 	jr continuar
                           1160 
   6154                    1161 	cambio:
   6154 3E 01         [ 7] 1162 		ld a, #1
   6156 DD 77 0E      [19] 1163 		ld 14(ix), a
                           1164 
   6159                    1165 	continuar:
   6159 C9            [10] 1166 ret
                           1167 
   615A                    1168 entityman_velx0::
   615A DD 36 0F 00   [19] 1169 	ld 15(ix), #0    ;;vx
   615E C9            [10] 1170 ret
                           1171 
   615F                    1172 entityman_vely0::
   615F DD 36 04 00   [19] 1173 	ld 4(ix), #0     ;;vy
   6163 C9            [10] 1174 ret
                           1175 
   6164                    1176 actualizar_reloj_anim_S:
   6164 3A AD 5A      [13] 1177 	ld a, (relojitoAnimS)
   6167 3C            [ 4] 1178 	inc a 
   6168 32 AD 5A      [13] 1179 	ld (relojitoAnimS), a
   616B C9            [10] 1180 ret
                           1181 
   616C                    1182 actualizar_reloj_anim_W:
   616C 3A AC 5A      [13] 1183 	ld a, (relojitoAnimW)
   616F 3C            [ 4] 1184 	inc a 
   6170 32 AC 5A      [13] 1185 	ld (relojitoAnimW), a
   6173 C9            [10] 1186 ret
                           1187 
                           1188 ;;S pressed
   6174                    1189 entityman_posY::
   6174 DD 36 04 04   [19] 1190     ld  4(ix), #4
                           1191 
ASxxxx Assembler V02.00 + NoICE + SDCC mods  (Zilog Z80 / Hitachi HD64180), page 107.
Hexadecimal [16-Bits]



   6178 CD 64 61      [17] 1192     call actualizar_reloj_anim_S
                           1193 
   617B FE 02         [ 7] 1194 	cp #0x02 
   617D 20 08         [12] 1195 	jr nz, saltar_change_S
                           1196 
   617F 3E 00         [ 7] 1197 	ld a, #0x00
   6181 32 AD 5A      [13] 1198 	ld (relojitoAnimS), a
                           1199 
   6184 CD 46 61      [17] 1200 	call change_sprite
                           1201 
   6187                    1202 	saltar_change_S:
   6187 C9            [10] 1203 ret
                           1204 
                           1205 ;;W pressed
   6188                    1206 entityman_negY::
   6188 DD 36 04 FE   [19] 1207 	ld  4(ix), 	#-2
                           1208 
   618C CD 6C 61      [17] 1209 	call actualizar_reloj_anim_W
                           1210 
   618F FE 02         [ 7] 1211 	cp #0x02 
   6191 20 08         [12] 1212 	jr nz, saltar_change_W
                           1213 
   6193 3E 00         [ 7] 1214 	ld a, #0x00
   6195 32 AC 5A      [13] 1215 	ld (relojitoAnimW), a
                           1216 
   6198 CD 46 61      [17] 1217 	call change_sprite
                           1218 
   619B                    1219 	saltar_change_W:
   619B C9            [10] 1220 ret
                           1221 
                           1222 ;;D pressed
   619C                    1223 entityman_posX::
   619C DD 36 0F 01   [19] 1224 	ld  15(ix), #1
   61A0 CD 46 61      [17] 1225 	call change_sprite
   61A3 C9            [10] 1226 ret
                           1227 
                           1228 ;;A pressed
   61A4                    1229 entityman_negX::
   61A4 DD 36 0F FF   [19] 1230 	ld  15(ix), #-1
   61A8 CD 46 61      [17] 1231 	call change_sprite
   61AB C9            [10] 1232 ret
                           1233 
                           1234 
                           1235 ;;Guardar anterior posicion de la entidad para luego renderizarla
   61AC                    1236 entityman_save_lasts_pos::
   61AC DD 56 01      [19] 1237 	ld  d, 1(ix)	;;Y pos
   61AF DD 72 09      [19] 1238 	ld  9(ix), d 	;;Saves the y position into last y position
                           1239 
   61B2 DD 56 00      [19] 1240 	ld  d, 0(ix)	;;X pos
   61B5 DD 72 08      [19] 1241 	ld  8(ix), d 	;;Saves the x position into last x position
   61B8 C9            [10] 1242 ret
