To change the value of these registers, the register number should be output on address &BCxx and then the data output on &BDxx
| Reg | Function | Default Value | Reg | Function | Default Value | ||||
| R0 | Horizontal Total | 63 | R1 | Horizontal Displayed | 40 | ||||
| R2 | Horizontal Sync Pos. | 46 | R3 | Sync Width | 112 | ||||
| R4 | Vertical Total | 38 | R5 | Vertical Total Adjust | 0 | ||||
| R6 | Vertical Displayed | 25 | R7 | Vertical Sync Position | 30 | ||||
| R8 | Interlace and Skew | 0 | R9 | Maximum Raster Addr | 7 | ||||
| R10 | Cursor Start Raster | 0 | R11 | Cursor End Raster | 0 | ||||
| R12 | Start Address (H) | 48 | R13 | Start Address (L) | 0 | ||||
| R14 | Cursor Register (H) | 192 | R15 | Cursor Register (L) | 07 |
From https://www.cpcwiki.eu:
The internal registers of the 6845 are:
| Register Index | Register Name | Range | CPC Setting | Notes |
|---|---|---|---|---|
| 0 | Horizontal Total (-1) | 00000000 | 63 | Width of the screen, in characters. Should always be 63 (64 characters). 1 character == 1μs. |
| 1 | Horizontal Displayed | 00000000 | 40 | Number of characters displayed. Once horizontal character count (HCC) matches this value, DISPTMG is set to 1. |
| 2 | Horizontal Sync Position | 00000000 | 46 | When to start the HSync signal. |
| 3 | Horizontal and Vertical Sync Widths | VVVVHHHH | 128+14 | HSync pulse width in characters (0 means 16 only on some CRTCs. Needs to be at least 2 for Gate Array to change the video mode); VSync width in scan-lines (0 always means 16. Not present on all CRTCs, fixed to 16 lines on these). |
| 4 | Vertical Total (-1) | x0000000 | 38 | Height of the screen, in characters. |
| 5 | Vertical Total Adjust | xxx00000 | 0 | Measured in scanlines, can be used for smooth vertical scrolling on CPC. |
| 6 | Vertical Displayed | x0000000 | 25 | Height of displayed screen in characters. Once vertical character count (VCC) matches this value, DISPTMG is set to 1. |
| 7 | Vertical Sync Position | x0000000 | 30 | When to start the VSync signal, in characters. |
| 8 | Interlace and Skew | CCDDxxII | 0 | CC: Cursor Skew (Only in CRTCs 0, 3 and 4). DD: Display Skew (Only in CRTCs 0, 3 and 4). II: Interlace Mode. |
| 9 | Maximum Raster Address (aka Number of Scan Lines) (-1) | xxx00000 | 7 | Maximum scan line address on CPC can hold between 0 and 7, higher values' upper bits are ignored |
| 10 | Cursor Start Raster | xBP00000 | 0 | Cursor signal is not connected to the Gate Array but is provided to the expansion port. B = Blink On/Off; P = Blink Period Control (Slow/Fast). Sets first raster row of character that cursor is on to invert. |
| 11 | Cursor End Raster | xxx00000 | 0 | Sets last raster row of character that cursor is on to invert |
| 12 | Display Start Address (High) | xx000000 | 48 | On Amstrad Plus, bit7 of the printer port is controlled by bit3 of CRTC R12 (ie. bit11 of Display Start Address) |
| 13 | Display Start Address (Low) | 00000000 | 0 | Allows you to offset the start of screen memory for hardware scrolling, and if using memory from address &0000 with the firmware. |
| 14 | Cursor Address (High) | xx000000 | 0 | |
| 15 | Cursor Address (Low) | 00000000 | 0 | |
| 16 | Light Pen Address (High) | xx000000 | Read Only. On CRTC1, bit6 of Status register goes to 0 when R16 is read | |
| 17 | Light Pen Address (Low) | 00000000 | Read Only. On CRTC1, bit6 of Status register goes to 0 when R17 is read |