; Source code to produce fake interlace
;
; This code will display 640x400 image. 
;
; The graphics are stored so that the image at &c000 has all even
; lines and the image at &4000 has all odd lines of the final image.
;
; VSYNC 1: reg 5 = 0, display &C000
; VSYNC 2: reg 5 = 1, display &4000
;
; We can modify this code to work with the firmware, but I have
; written it without because it is easier at the moment.
;
; If we have different colours for each screen then we can mix colours
; to produce new ones.
;
; Extra colours can be produced by flashing two existing colours rapidly.
;
; A better Interlace effect may be produced without the reg 5 trick.

	org &8000

	ld a,2
	call &bc0e			; mode 2

	xor a
	ld bc,&0000
	call &bc32			; background = black

	ld a,1
	ld bc,&1a1a
	call &bc32			; foreground = white

					; we now have a black and white
					; standard mode 2 screen

.main_loop
	ld b,&f5
.m1	in a,(c)
	rra
	jr nc,.m1

	; this should be executed every VSYNC 

	ld e,0				; reg 5 offset = 0
	ld hl,&3000			; screen in range &c000-&ffff

.frame	ld a,0				; frame we are displaying (0 or &ff)
	xor &ff
	ld (frame+1),a
	or a
	jr z,frame_0

	ld e,1
	ld hl,&1000

.frame_0
	; set screen vertical shift

	ld bc,&bc05
	out (c),c
	inc b
	ld a,e
	out (c),a

	; set screen address
	
	ld bc,&bc0c
	out (c),c
	ld a,h
	inc b
	out (c),a
	ld bc,&bc0d
	out (c),c
	ld a,l
	inc b
	out (c),a


	halt
	halt
	halt
	halt
	halt
	halt
	jp	main_loop

